1 //===- llvm/unittests/IR/DominatorTreeTest.cpp - Constants unit tests -----===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/Analysis/PostDominators.h"
11 #include "llvm/AsmParser/Parser.h"
12 #include "llvm/IR/Constants.h"
13 #include "llvm/IR/Dominators.h"
14 #include "llvm/IR/Instructions.h"
15 #include "llvm/IR/LLVMContext.h"
16 #include "llvm/IR/Module.h"
17 #include "llvm/Support/SourceMgr.h"
18 #include "gtest/gtest.h"
19 
20 using namespace llvm;
21 
22 /// Build the dominator tree for the function and run the Test.
23 static void
24 runWithDomTree(Module &M, StringRef FuncName,
25                function_ref<void(Function &F, DominatorTree *DT,
26                                  DominatorTreeBase<BasicBlock> *PDT)>
27                    Test) {
28   auto *F = M.getFunction(FuncName);
29   ASSERT_NE(F, nullptr) << "Could not find " << FuncName;
30   // Compute the dominator tree for the function.
31   DominatorTree DT(*F);
32   DominatorTreeBase<BasicBlock> PDT(/*isPostDom*/ true);
33   PDT.recalculate(*F);
34   Test(*F, &DT, &PDT);
35 }
36 
37 static std::unique_ptr<Module> makeLLVMModule(LLVMContext &Context,
38                                               StringRef ModuleStr) {
39   SMDiagnostic Err;
40   std::unique_ptr<Module> M = parseAssemblyString(ModuleStr, Err, Context);
41   assert(M && "Bad assembly?");
42   return M;
43 }
44 
45 TEST(DominatorTree, Unreachable) {
46   StringRef ModuleString =
47       "declare i32 @g()\n"
48       "define void @f(i32 %x) personality i32 ()* @g {\n"
49       "bb0:\n"
50       "  %y1 = add i32 %x, 1\n"
51       "  %y2 = add i32 %x, 1\n"
52       "  %y3 = invoke i32 @g() to label %bb1 unwind label %bb2\n"
53       "bb1:\n"
54       "  %y4 = add i32 %x, 1\n"
55       "  br label %bb4\n"
56       "bb2:\n"
57       "  %y5 = landingpad i32\n"
58       "          cleanup\n"
59       "  br label %bb4\n"
60       "bb3:\n"
61       "  %y6 = add i32 %x, 1\n"
62       "  %y7 = add i32 %x, 1\n"
63       "  ret void\n"
64       "bb4:\n"
65       "  %y8 = phi i32 [0, %bb2], [%y4, %bb1]\n"
66       "  %y9 = phi i32 [0, %bb2], [%y4, %bb1]\n"
67       "  ret void\n"
68       "}\n";
69 
70   // Parse the module.
71   LLVMContext Context;
72   std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
73 
74   runWithDomTree(
75       *M, "f",
76       [&](Function &F, DominatorTree *DT, DominatorTreeBase<BasicBlock> *PDT) {
77         Function::iterator FI = F.begin();
78 
79         BasicBlock *BB0 = &*FI++;
80         BasicBlock::iterator BBI = BB0->begin();
81         Instruction *Y1 = &*BBI++;
82         Instruction *Y2 = &*BBI++;
83         Instruction *Y3 = &*BBI++;
84 
85         BasicBlock *BB1 = &*FI++;
86         BBI = BB1->begin();
87         Instruction *Y4 = &*BBI++;
88 
89         BasicBlock *BB2 = &*FI++;
90         BBI = BB2->begin();
91         Instruction *Y5 = &*BBI++;
92 
93         BasicBlock *BB3 = &*FI++;
94         BBI = BB3->begin();
95         Instruction *Y6 = &*BBI++;
96         Instruction *Y7 = &*BBI++;
97 
98         BasicBlock *BB4 = &*FI++;
99         BBI = BB4->begin();
100         Instruction *Y8 = &*BBI++;
101         Instruction *Y9 = &*BBI++;
102 
103         // Reachability
104         EXPECT_TRUE(DT->isReachableFromEntry(BB0));
105         EXPECT_TRUE(DT->isReachableFromEntry(BB1));
106         EXPECT_TRUE(DT->isReachableFromEntry(BB2));
107         EXPECT_FALSE(DT->isReachableFromEntry(BB3));
108         EXPECT_TRUE(DT->isReachableFromEntry(BB4));
109 
110         // BB dominance
111         EXPECT_TRUE(DT->dominates(BB0, BB0));
112         EXPECT_TRUE(DT->dominates(BB0, BB1));
113         EXPECT_TRUE(DT->dominates(BB0, BB2));
114         EXPECT_TRUE(DT->dominates(BB0, BB3));
115         EXPECT_TRUE(DT->dominates(BB0, BB4));
116 
117         EXPECT_FALSE(DT->dominates(BB1, BB0));
118         EXPECT_TRUE(DT->dominates(BB1, BB1));
119         EXPECT_FALSE(DT->dominates(BB1, BB2));
120         EXPECT_TRUE(DT->dominates(BB1, BB3));
121         EXPECT_FALSE(DT->dominates(BB1, BB4));
122 
123         EXPECT_FALSE(DT->dominates(BB2, BB0));
124         EXPECT_FALSE(DT->dominates(BB2, BB1));
125         EXPECT_TRUE(DT->dominates(BB2, BB2));
126         EXPECT_TRUE(DT->dominates(BB2, BB3));
127         EXPECT_FALSE(DT->dominates(BB2, BB4));
128 
129         EXPECT_FALSE(DT->dominates(BB3, BB0));
130         EXPECT_FALSE(DT->dominates(BB3, BB1));
131         EXPECT_FALSE(DT->dominates(BB3, BB2));
132         EXPECT_TRUE(DT->dominates(BB3, BB3));
133         EXPECT_FALSE(DT->dominates(BB3, BB4));
134 
135         // BB proper dominance
136         EXPECT_FALSE(DT->properlyDominates(BB0, BB0));
137         EXPECT_TRUE(DT->properlyDominates(BB0, BB1));
138         EXPECT_TRUE(DT->properlyDominates(BB0, BB2));
139         EXPECT_TRUE(DT->properlyDominates(BB0, BB3));
140 
141         EXPECT_FALSE(DT->properlyDominates(BB1, BB0));
142         EXPECT_FALSE(DT->properlyDominates(BB1, BB1));
143         EXPECT_FALSE(DT->properlyDominates(BB1, BB2));
144         EXPECT_TRUE(DT->properlyDominates(BB1, BB3));
145 
146         EXPECT_FALSE(DT->properlyDominates(BB2, BB0));
147         EXPECT_FALSE(DT->properlyDominates(BB2, BB1));
148         EXPECT_FALSE(DT->properlyDominates(BB2, BB2));
149         EXPECT_TRUE(DT->properlyDominates(BB2, BB3));
150 
151         EXPECT_FALSE(DT->properlyDominates(BB3, BB0));
152         EXPECT_FALSE(DT->properlyDominates(BB3, BB1));
153         EXPECT_FALSE(DT->properlyDominates(BB3, BB2));
154         EXPECT_FALSE(DT->properlyDominates(BB3, BB3));
155 
156         // Instruction dominance in the same reachable BB
157         EXPECT_FALSE(DT->dominates(Y1, Y1));
158         EXPECT_TRUE(DT->dominates(Y1, Y2));
159         EXPECT_FALSE(DT->dominates(Y2, Y1));
160         EXPECT_FALSE(DT->dominates(Y2, Y2));
161 
162         // Instruction dominance in the same unreachable BB
163         EXPECT_TRUE(DT->dominates(Y6, Y6));
164         EXPECT_TRUE(DT->dominates(Y6, Y7));
165         EXPECT_TRUE(DT->dominates(Y7, Y6));
166         EXPECT_TRUE(DT->dominates(Y7, Y7));
167 
168         // Invoke
169         EXPECT_TRUE(DT->dominates(Y3, Y4));
170         EXPECT_FALSE(DT->dominates(Y3, Y5));
171 
172         // Phi
173         EXPECT_TRUE(DT->dominates(Y2, Y9));
174         EXPECT_FALSE(DT->dominates(Y3, Y9));
175         EXPECT_FALSE(DT->dominates(Y8, Y9));
176 
177         // Anything dominates unreachable
178         EXPECT_TRUE(DT->dominates(Y1, Y6));
179         EXPECT_TRUE(DT->dominates(Y3, Y6));
180 
181         // Unreachable doesn't dominate reachable
182         EXPECT_FALSE(DT->dominates(Y6, Y1));
183 
184         // Instruction, BB dominance
185         EXPECT_FALSE(DT->dominates(Y1, BB0));
186         EXPECT_TRUE(DT->dominates(Y1, BB1));
187         EXPECT_TRUE(DT->dominates(Y1, BB2));
188         EXPECT_TRUE(DT->dominates(Y1, BB3));
189         EXPECT_TRUE(DT->dominates(Y1, BB4));
190 
191         EXPECT_FALSE(DT->dominates(Y3, BB0));
192         EXPECT_TRUE(DT->dominates(Y3, BB1));
193         EXPECT_FALSE(DT->dominates(Y3, BB2));
194         EXPECT_TRUE(DT->dominates(Y3, BB3));
195         EXPECT_FALSE(DT->dominates(Y3, BB4));
196 
197         EXPECT_TRUE(DT->dominates(Y6, BB3));
198 
199         // Post dominance.
200         EXPECT_TRUE(PDT->dominates(BB0, BB0));
201         EXPECT_FALSE(PDT->dominates(BB1, BB0));
202         EXPECT_FALSE(PDT->dominates(BB2, BB0));
203         EXPECT_FALSE(PDT->dominates(BB3, BB0));
204         EXPECT_TRUE(PDT->dominates(BB4, BB1));
205 
206         // Dominance descendants.
207         SmallVector<BasicBlock *, 8> DominatedBBs, PostDominatedBBs;
208 
209         DT->getDescendants(BB0, DominatedBBs);
210         PDT->getDescendants(BB0, PostDominatedBBs);
211         EXPECT_EQ(DominatedBBs.size(), 4UL);
212         EXPECT_EQ(PostDominatedBBs.size(), 1UL);
213 
214         // BB3 is unreachable. It should have no dominators nor postdominators.
215         DominatedBBs.clear();
216         PostDominatedBBs.clear();
217         DT->getDescendants(BB3, DominatedBBs);
218         DT->getDescendants(BB3, PostDominatedBBs);
219         EXPECT_EQ(DominatedBBs.size(), 0UL);
220         EXPECT_EQ(PostDominatedBBs.size(), 0UL);
221 
222         // Check DFS Numbers before
223         EXPECT_EQ(DT->getNode(BB0)->getDFSNumIn(), 0UL);
224         EXPECT_EQ(DT->getNode(BB0)->getDFSNumOut(), 7UL);
225         EXPECT_EQ(DT->getNode(BB1)->getDFSNumIn(), 1UL);
226         EXPECT_EQ(DT->getNode(BB1)->getDFSNumOut(), 2UL);
227         EXPECT_EQ(DT->getNode(BB2)->getDFSNumIn(), 5UL);
228         EXPECT_EQ(DT->getNode(BB2)->getDFSNumOut(), 6UL);
229         EXPECT_EQ(DT->getNode(BB4)->getDFSNumIn(), 3UL);
230         EXPECT_EQ(DT->getNode(BB4)->getDFSNumOut(), 4UL);
231 
232         // Reattach block 3 to block 1 and recalculate
233         BB1->getTerminator()->eraseFromParent();
234         BranchInst::Create(BB4, BB3, ConstantInt::getTrue(F.getContext()), BB1);
235         DT->recalculate(F);
236 
237         // Check DFS Numbers after
238         EXPECT_EQ(DT->getNode(BB0)->getDFSNumIn(), 0UL);
239         EXPECT_EQ(DT->getNode(BB0)->getDFSNumOut(), 9UL);
240         EXPECT_EQ(DT->getNode(BB1)->getDFSNumIn(), 1UL);
241         EXPECT_EQ(DT->getNode(BB1)->getDFSNumOut(), 4UL);
242         EXPECT_EQ(DT->getNode(BB2)->getDFSNumIn(), 7UL);
243         EXPECT_EQ(DT->getNode(BB2)->getDFSNumOut(), 8UL);
244         EXPECT_EQ(DT->getNode(BB3)->getDFSNumIn(), 2UL);
245         EXPECT_EQ(DT->getNode(BB3)->getDFSNumOut(), 3UL);
246         EXPECT_EQ(DT->getNode(BB4)->getDFSNumIn(), 5UL);
247         EXPECT_EQ(DT->getNode(BB4)->getDFSNumOut(), 6UL);
248 
249         // Change root node
250         DT->verifyDomTree();
251         BasicBlock *NewEntry =
252             BasicBlock::Create(F.getContext(), "new_entry", &F, BB0);
253         BranchInst::Create(BB0, NewEntry);
254         EXPECT_EQ(F.begin()->getName(), NewEntry->getName());
255         EXPECT_TRUE(&F.getEntryBlock() == NewEntry);
256         DT->setNewRoot(NewEntry);
257         DT->verifyDomTree();
258       });
259 }
260 
261 TEST(DominatorTree, NonUniqueEdges) {
262   StringRef ModuleString =
263       "define i32 @f(i32 %i, i32 *%p) {\n"
264       "bb0:\n"
265       "   store i32 %i, i32 *%p\n"
266       "   switch i32 %i, label %bb2 [\n"
267       "     i32 0, label %bb1\n"
268       "     i32 1, label %bb1\n"
269       "   ]\n"
270       " bb1:\n"
271       "   ret i32 1\n"
272       " bb2:\n"
273       "   ret i32 4\n"
274       "}\n";
275 
276   // Parse the module.
277   LLVMContext Context;
278   std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
279 
280   runWithDomTree(
281       *M, "f",
282       [&](Function &F, DominatorTree *DT, DominatorTreeBase<BasicBlock> *PDT) {
283         Function::iterator FI = F.begin();
284 
285         BasicBlock *BB0 = &*FI++;
286         BasicBlock *BB1 = &*FI++;
287         BasicBlock *BB2 = &*FI++;
288 
289         const TerminatorInst *TI = BB0->getTerminator();
290         assert(TI->getNumSuccessors() == 3 && "Switch has three successors");
291 
292         BasicBlockEdge Edge_BB0_BB2(BB0, TI->getSuccessor(0));
293         assert(Edge_BB0_BB2.getEnd() == BB2 &&
294                "Default label is the 1st successor");
295 
296         BasicBlockEdge Edge_BB0_BB1_a(BB0, TI->getSuccessor(1));
297         assert(Edge_BB0_BB1_a.getEnd() == BB1 && "BB1 is the 2nd successor");
298 
299         BasicBlockEdge Edge_BB0_BB1_b(BB0, TI->getSuccessor(2));
300         assert(Edge_BB0_BB1_b.getEnd() == BB1 && "BB1 is the 3rd successor");
301 
302         EXPECT_TRUE(DT->dominates(Edge_BB0_BB2, BB2));
303         EXPECT_FALSE(DT->dominates(Edge_BB0_BB2, BB1));
304 
305         EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_a, BB1));
306         EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_b, BB1));
307 
308         EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_a, BB2));
309         EXPECT_FALSE(DT->dominates(Edge_BB0_BB1_b, BB2));
310       });
311 }
312