1 //===------------- llvm/unittest/CodeGen/InstrRefLDVTest.cpp --------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/CodeGen/MachineModuleInfo.h" 10 #include "llvm/CodeGen/TargetLowering.h" 11 #include "llvm/CodeGen/TargetSubtargetInfo.h" 12 #include "llvm/IR/DIBuilder.h" 13 #include "llvm/IR/DebugInfoMetadata.h" 14 #include "llvm/IR/IRBuilder.h" 15 #include "llvm/MC/TargetRegistry.h" 16 #include "llvm/Support/TargetSelect.h" 17 #include "llvm/Target/TargetMachine.h" 18 #include "llvm/Target/TargetOptions.h" 19 20 #include "../lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h" 21 22 #include "gtest/gtest.h" 23 24 using namespace llvm; 25 using namespace LiveDebugValues; 26 27 // Include helper functions to ease the manipulation of MachineFunctions 28 #include "MFCommon.inc" 29 30 class InstrRefLDVTest : public testing::Test { 31 public: 32 friend class InstrRefBasedLDV; 33 using MLocTransferMap = InstrRefBasedLDV::MLocTransferMap; 34 35 LLVMContext Ctx; 36 Module Mod; 37 std::unique_ptr<TargetMachine> Machine; 38 std::unique_ptr<MachineFunction> MF; 39 std::unique_ptr<MachineDominatorTree> DomTree; 40 DICompileUnit *OurCU; 41 DIFile *OurFile; 42 DISubprogram *OurFunc; 43 DILexicalBlock *OurBlock, *AnotherBlock; 44 DISubprogram *ToInlineFunc; 45 DILexicalBlock *ToInlineBlock; 46 DILocalVariable *FuncVariable; 47 DIBasicType *LongInt; 48 DIExpression *EmptyExpr; 49 50 DebugLoc OutermostLoc, InBlockLoc, NotNestedBlockLoc, InlinedLoc; 51 52 MachineBasicBlock *MBB0, *MBB1, *MBB2, *MBB3, *MBB4; 53 54 std::unique_ptr<InstrRefBasedLDV> LDV; 55 std::unique_ptr<MLocTracker> MTracker; 56 std::unique_ptr<VLocTracker> VTracker; 57 58 InstrRefLDVTest() : Ctx(), Mod("beehives", Ctx) { 59 } 60 61 void SetUp() { 62 // Boilerplate that creates a MachineFunction and associated blocks. 63 64 Mod.setDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-f80:32-n8:16:32-S128"); 65 Triple TargetTriple("x86_64--"); 66 std::string Error; 67 const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error); 68 if (!T) 69 GTEST_SKIP(); 70 71 TargetOptions Options; 72 Machine = std::unique_ptr<TargetMachine>(T->createTargetMachine( 73 "X86", "", "", Options, None, None, CodeGenOpt::Aggressive)); 74 75 auto Type = FunctionType::get(Type::getVoidTy(Ctx), false); 76 auto F = Function::Create(Type, GlobalValue::ExternalLinkage, "Test", &Mod); 77 78 unsigned FunctionNum = 42; 79 MachineModuleInfo MMI((LLVMTargetMachine*)&*Machine); 80 const TargetSubtargetInfo &STI = *Machine->getSubtargetImpl(*F); 81 82 MF = std::make_unique<MachineFunction>(*F, (LLVMTargetMachine&)*Machine, STI, FunctionNum, MMI); 83 84 // Create metadata: CU, subprogram, some blocks and an inline function 85 // scope. 86 DIBuilder DIB(Mod); 87 OurFile = DIB.createFile("xyzzy.c", "/cave"); 88 OurCU = 89 DIB.createCompileUnit(dwarf::DW_LANG_C99, OurFile, "nou", false, "", 0); 90 auto OurSubT = DIB.createSubroutineType(DIB.getOrCreateTypeArray(None)); 91 OurFunc = 92 DIB.createFunction(OurCU, "bees", "", OurFile, 1, OurSubT, 1, 93 DINode::FlagZero, DISubprogram::SPFlagDefinition); 94 F->setSubprogram(OurFunc); 95 OurBlock = DIB.createLexicalBlock(OurFunc, OurFile, 2, 3); 96 AnotherBlock = DIB.createLexicalBlock(OurFunc, OurFile, 2, 6); 97 ToInlineFunc = 98 DIB.createFunction(OurFile, "shoes", "", OurFile, 10, OurSubT, 10, 99 DINode::FlagZero, DISubprogram::SPFlagDefinition); 100 101 // Make some nested scopes. 102 OutermostLoc = DILocation::get(Ctx, 3, 1, OurFunc); 103 InBlockLoc = DILocation::get(Ctx, 4, 1, OurBlock); 104 InlinedLoc = DILocation::get(Ctx, 10, 1, ToInlineFunc, InBlockLoc.get()); 105 106 // Make a scope that isn't nested within the others. 107 NotNestedBlockLoc = DILocation::get(Ctx, 4, 1, AnotherBlock); 108 109 LongInt = DIB.createBasicType("long", 64, llvm::dwarf::DW_ATE_unsigned); 110 FuncVariable = DIB.createAutoVariable(OurFunc, "lala", OurFile, 1, LongInt); 111 EmptyExpr = DIExpression::get(Ctx, {}); 112 113 DIB.finalize(); 114 } 115 116 Register getRegByName(const char *WantedName) { 117 auto *TRI = MF->getRegInfo().getTargetRegisterInfo(); 118 // Slow, but works. 119 for (unsigned int I = 1; I < TRI->getNumRegs(); ++I) { 120 const char *Name = TRI->getName(I); 121 if (strcmp(WantedName, Name) == 0) 122 return I; 123 } 124 125 // If this ever fails, something is very wrong with this unit test. 126 llvm_unreachable("Can't find register by name"); 127 } 128 129 InstrRefBasedLDV *setupLDVObj() { 130 // Create a new LDV object, and plug some relevant object ptrs into it. 131 LDV = std::make_unique<InstrRefBasedLDV>(); 132 const TargetSubtargetInfo &STI = MF->getSubtarget(); 133 LDV->TII = STI.getInstrInfo(); 134 LDV->TRI = STI.getRegisterInfo(); 135 LDV->TFI = STI.getFrameLowering(); 136 LDV->MFI = &MF->getFrameInfo(); 137 138 DomTree = std::make_unique<MachineDominatorTree>(*MF); 139 LDV->DomTree = &*DomTree; 140 141 // Future work: unit tests for mtracker / vtracker / ttracker. 142 143 // Setup things like the artifical block map, and BlockNo <=> RPO Order 144 // mappings. 145 LDV->initialSetup(*MF); 146 LDV->LS.initialize(*MF); 147 addMTracker(); 148 addVTracker(); 149 return &*LDV; 150 } 151 152 void addMTracker() { 153 ASSERT_TRUE(LDV); 154 // Add a machine-location-tracking object to LDV. Don't initialize any 155 // register locations within it though. 156 const TargetSubtargetInfo &STI = MF->getSubtarget(); 157 MTracker = std::make_unique<MLocTracker>( 158 *MF, *LDV->TII, *LDV->TRI, *STI.getTargetLowering()); 159 LDV->MTracker = &*MTracker; 160 } 161 162 void addVTracker() { 163 ASSERT_TRUE(LDV); 164 VTracker = std::make_unique<VLocTracker>(); 165 LDV->VTracker = &*VTracker; 166 } 167 168 // Some routines for bouncing into LDV, 169 void buildMLocValueMap(ValueIDNum **MInLocs, ValueIDNum **MOutLocs, 170 SmallVectorImpl<MLocTransferMap> &MLocTransfer) { 171 LDV->buildMLocValueMap(*MF, MInLocs, MOutLocs, MLocTransfer); 172 } 173 174 Optional<ValueIDNum> 175 pickVPHILoc(const MachineBasicBlock &MBB, const DebugVariable &Var, 176 const InstrRefBasedLDV::LiveIdxT &LiveOuts, ValueIDNum **MOutLocs, 177 const SmallVectorImpl<const MachineBasicBlock *> &BlockOrders) { 178 return LDV->pickVPHILoc(MBB, Var, LiveOuts, MOutLocs, BlockOrders); 179 } 180 181 bool vlocJoin(MachineBasicBlock &MBB, InstrRefBasedLDV::LiveIdxT &VLOCOutLocs, 182 InstrRefBasedLDV::LiveIdxT &VLOCInLocs, 183 const SmallSet<DebugVariable, 4> &AllVars, 184 SmallPtrSet<const MachineBasicBlock *, 8> &InScopeBlocks, 185 SmallPtrSet<const MachineBasicBlock *, 8> &BlocksToExplore, 186 DenseMap<DebugVariable, DbgValue> &InLocsT) { 187 return LDV->vlocJoin(MBB, VLOCOutLocs, VLOCInLocs, AllVars, 188 InScopeBlocks, BlocksToExplore, InLocsT); 189 } 190 191 void buildVLocValueMap(const DILocation *DILoc, 192 const SmallSet<DebugVariable, 4> &VarsWeCareAbout, 193 SmallPtrSetImpl<MachineBasicBlock *> &AssignBlocks, 194 InstrRefBasedLDV::LiveInsT &Output, ValueIDNum **MOutLocs, 195 ValueIDNum **MInLocs, 196 SmallVectorImpl<VLocTracker> &AllTheVLocs) { 197 LDV->buildVLocValueMap(DILoc, VarsWeCareAbout, AssignBlocks, Output, 198 MOutLocs, MInLocs, AllTheVLocs); 199 } 200 201 void initValueArray(ValueIDNum **Nums, unsigned Blks, unsigned Locs) { 202 for (unsigned int I = 0; I < Blks; ++I) 203 for (unsigned int J = 0; J < Locs; ++J) 204 Nums[I][J] = ValueIDNum::EmptyValue; 205 } 206 207 void setupSingleBlock() { 208 // Add an entry block with nothing but 'ret void' in it. 209 Function &F = const_cast<llvm::Function &>(MF->getFunction()); 210 auto *BB0 = BasicBlock::Create(Ctx, "entry", &F); 211 IRBuilder<> IRB(BB0); 212 IRB.CreateRetVoid(); 213 MBB0 = MF->CreateMachineBasicBlock(BB0); 214 MF->insert(MF->end(), MBB0); 215 MF->RenumberBlocks(); 216 217 setupLDVObj(); 218 } 219 220 void setupDiamondBlocks() { 221 // entry 222 // / \ 223 // br1 br2 224 // \ / 225 // ret 226 llvm::Function &F = const_cast<llvm::Function &>(MF->getFunction()); 227 auto *BB0 = BasicBlock::Create(Ctx, "a", &F); 228 auto *BB1 = BasicBlock::Create(Ctx, "b", &F); 229 auto *BB2 = BasicBlock::Create(Ctx, "c", &F); 230 auto *BB3 = BasicBlock::Create(Ctx, "d", &F); 231 IRBuilder<> IRB0(BB0), IRB1(BB1), IRB2(BB2), IRB3(BB3); 232 IRB0.CreateBr(BB1); 233 IRB1.CreateBr(BB2); 234 IRB2.CreateBr(BB3); 235 IRB3.CreateRetVoid(); 236 MBB0 = MF->CreateMachineBasicBlock(BB0); 237 MF->insert(MF->end(), MBB0); 238 MBB1 = MF->CreateMachineBasicBlock(BB1); 239 MF->insert(MF->end(), MBB1); 240 MBB2 = MF->CreateMachineBasicBlock(BB2); 241 MF->insert(MF->end(), MBB2); 242 MBB3 = MF->CreateMachineBasicBlock(BB3); 243 MF->insert(MF->end(), MBB3); 244 MBB0->addSuccessor(MBB1); 245 MBB0->addSuccessor(MBB2); 246 MBB1->addSuccessor(MBB3); 247 MBB2->addSuccessor(MBB3); 248 MF->RenumberBlocks(); 249 250 setupLDVObj(); 251 } 252 253 void setupSimpleLoop() { 254 // entry 255 // | 256 // |/-----\ 257 // loopblk | 258 // |\-----/ 259 // | 260 // ret 261 llvm::Function &F = const_cast<llvm::Function &>(MF->getFunction()); 262 auto *BB0 = BasicBlock::Create(Ctx, "entry", &F); 263 auto *BB1 = BasicBlock::Create(Ctx, "loop", &F); 264 auto *BB2 = BasicBlock::Create(Ctx, "ret", &F); 265 IRBuilder<> IRB0(BB0), IRB1(BB1), IRB2(BB2); 266 IRB0.CreateBr(BB1); 267 IRB1.CreateBr(BB2); 268 IRB2.CreateRetVoid(); 269 MBB0 = MF->CreateMachineBasicBlock(BB0); 270 MF->insert(MF->end(), MBB0); 271 MBB1 = MF->CreateMachineBasicBlock(BB1); 272 MF->insert(MF->end(), MBB1); 273 MBB2 = MF->CreateMachineBasicBlock(BB2); 274 MF->insert(MF->end(), MBB2); 275 MBB0->addSuccessor(MBB1); 276 MBB1->addSuccessor(MBB2); 277 MBB1->addSuccessor(MBB1); 278 MF->RenumberBlocks(); 279 280 setupLDVObj(); 281 } 282 283 void setupNestedLoops() { 284 // entry 285 // | 286 // loop1 287 // ^\ 288 // | \ /-\ 289 // | loop2 | 290 // | / \-/ 291 // ^ / 292 // join 293 // | 294 // ret 295 llvm::Function &F = const_cast<llvm::Function &>(MF->getFunction()); 296 auto *BB0 = BasicBlock::Create(Ctx, "entry", &F); 297 auto *BB1 = BasicBlock::Create(Ctx, "loop1", &F); 298 auto *BB2 = BasicBlock::Create(Ctx, "loop2", &F); 299 auto *BB3 = BasicBlock::Create(Ctx, "join", &F); 300 auto *BB4 = BasicBlock::Create(Ctx, "ret", &F); 301 IRBuilder<> IRB0(BB0), IRB1(BB1), IRB2(BB2), IRB3(BB3), IRB4(BB4); 302 IRB0.CreateBr(BB1); 303 IRB1.CreateBr(BB2); 304 IRB2.CreateBr(BB3); 305 IRB3.CreateBr(BB4); 306 IRB4.CreateRetVoid(); 307 MBB0 = MF->CreateMachineBasicBlock(BB0); 308 MF->insert(MF->end(), MBB0); 309 MBB1 = MF->CreateMachineBasicBlock(BB1); 310 MF->insert(MF->end(), MBB1); 311 MBB2 = MF->CreateMachineBasicBlock(BB2); 312 MF->insert(MF->end(), MBB2); 313 MBB3 = MF->CreateMachineBasicBlock(BB3); 314 MF->insert(MF->end(), MBB3); 315 MBB4 = MF->CreateMachineBasicBlock(BB4); 316 MF->insert(MF->end(), MBB4); 317 MBB0->addSuccessor(MBB1); 318 MBB1->addSuccessor(MBB2); 319 MBB2->addSuccessor(MBB2); 320 MBB2->addSuccessor(MBB3); 321 MBB3->addSuccessor(MBB1); 322 MBB3->addSuccessor(MBB4); 323 MF->RenumberBlocks(); 324 325 setupLDVObj(); 326 } 327 328 void setupNoDominatingLoop() { 329 // entry 330 // / \ 331 // / \ 332 // / \ 333 // head1 head2 334 // ^ \ / ^ 335 // ^ \ / ^ 336 // \-joinblk -/ 337 // | 338 // ret 339 llvm::Function &F = const_cast<llvm::Function &>(MF->getFunction()); 340 auto *BB0 = BasicBlock::Create(Ctx, "entry", &F); 341 auto *BB1 = BasicBlock::Create(Ctx, "head1", &F); 342 auto *BB2 = BasicBlock::Create(Ctx, "head2", &F); 343 auto *BB3 = BasicBlock::Create(Ctx, "joinblk", &F); 344 auto *BB4 = BasicBlock::Create(Ctx, "ret", &F); 345 IRBuilder<> IRB0(BB0), IRB1(BB1), IRB2(BB2), IRB3(BB3), IRB4(BB4); 346 IRB0.CreateBr(BB1); 347 IRB1.CreateBr(BB2); 348 IRB2.CreateBr(BB3); 349 IRB3.CreateBr(BB4); 350 IRB4.CreateRetVoid(); 351 MBB0 = MF->CreateMachineBasicBlock(BB0); 352 MF->insert(MF->end(), MBB0); 353 MBB1 = MF->CreateMachineBasicBlock(BB1); 354 MF->insert(MF->end(), MBB1); 355 MBB2 = MF->CreateMachineBasicBlock(BB2); 356 MF->insert(MF->end(), MBB2); 357 MBB3 = MF->CreateMachineBasicBlock(BB3); 358 MF->insert(MF->end(), MBB3); 359 MBB4 = MF->CreateMachineBasicBlock(BB4); 360 MF->insert(MF->end(), MBB4); 361 MBB0->addSuccessor(MBB1); 362 MBB0->addSuccessor(MBB2); 363 MBB1->addSuccessor(MBB3); 364 MBB2->addSuccessor(MBB3); 365 MBB3->addSuccessor(MBB1); 366 MBB3->addSuccessor(MBB2); 367 MBB3->addSuccessor(MBB4); 368 MF->RenumberBlocks(); 369 370 setupLDVObj(); 371 } 372 373 void setupBadlyNestedLoops() { 374 // entry 375 // | 376 // loop1 -o 377 // | ^ 378 // | ^ 379 // loop2 -o 380 // | ^ 381 // | ^ 382 // loop3 -o 383 // | 384 // ret 385 // 386 // NB: the loop blocks self-loop, which is a bit too fiddly to draw on 387 // accurately. 388 llvm::Function &F = const_cast<llvm::Function &>(MF->getFunction()); 389 auto *BB0 = BasicBlock::Create(Ctx, "entry", &F); 390 auto *BB1 = BasicBlock::Create(Ctx, "loop1", &F); 391 auto *BB2 = BasicBlock::Create(Ctx, "loop2", &F); 392 auto *BB3 = BasicBlock::Create(Ctx, "loop3", &F); 393 auto *BB4 = BasicBlock::Create(Ctx, "ret", &F); 394 IRBuilder<> IRB0(BB0), IRB1(BB1), IRB2(BB2), IRB3(BB3), IRB4(BB4); 395 IRB0.CreateBr(BB1); 396 IRB1.CreateBr(BB2); 397 IRB2.CreateBr(BB3); 398 IRB3.CreateBr(BB4); 399 IRB4.CreateRetVoid(); 400 MBB0 = MF->CreateMachineBasicBlock(BB0); 401 MF->insert(MF->end(), MBB0); 402 MBB1 = MF->CreateMachineBasicBlock(BB1); 403 MF->insert(MF->end(), MBB1); 404 MBB2 = MF->CreateMachineBasicBlock(BB2); 405 MF->insert(MF->end(), MBB2); 406 MBB3 = MF->CreateMachineBasicBlock(BB3); 407 MF->insert(MF->end(), MBB3); 408 MBB4 = MF->CreateMachineBasicBlock(BB4); 409 MF->insert(MF->end(), MBB4); 410 MBB0->addSuccessor(MBB1); 411 MBB1->addSuccessor(MBB1); 412 MBB1->addSuccessor(MBB2); 413 MBB2->addSuccessor(MBB1); 414 MBB2->addSuccessor(MBB2); 415 MBB2->addSuccessor(MBB3); 416 MBB3->addSuccessor(MBB2); 417 MBB3->addSuccessor(MBB3); 418 MBB3->addSuccessor(MBB4); 419 MF->RenumberBlocks(); 420 421 setupLDVObj(); 422 } 423 }; 424 425 TEST_F(InstrRefLDVTest, MLocSingleBlock) { 426 // Test some very simple properties about interpreting the transfer function. 427 setupSingleBlock(); 428 429 // We should start with a single location, the stack pointer. 430 ASSERT_TRUE(MTracker->getNumLocs() == 1); 431 LocIdx RspLoc(0); 432 433 // Set up live-in and live-out tables for this function: two locations (we 434 // add one later) in a single block. 435 ValueIDNum InLocs[2], OutLocs[2]; 436 ValueIDNum *InLocsPtr[1] = {&InLocs[0]}; 437 ValueIDNum *OutLocsPtr[1] = {&OutLocs[0]}; 438 439 // Transfer function: nothing. 440 SmallVector<MLocTransferMap, 1> TransferFunc = {{}}; 441 442 // Try and build value maps... 443 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 444 445 // The result should be that RSP is marked as a live-in-PHI -- this represents 446 // an argument. And as there's no transfer function, the block live-out should 447 // be the same. 448 EXPECT_EQ(InLocs[0], ValueIDNum(0, 0, RspLoc)); 449 EXPECT_EQ(OutLocs[0], ValueIDNum(0, 0, RspLoc)); 450 451 // Try again, this time initialising the in-locs to be defined by an 452 // instruction. The entry block should always be re-assigned to be the 453 // arguments. 454 initValueArray(InLocsPtr, 1, 2); 455 initValueArray(OutLocsPtr, 1, 2); 456 InLocs[0] = ValueIDNum(0, 1, RspLoc); 457 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 458 EXPECT_EQ(InLocs[0], ValueIDNum(0, 0, RspLoc)); 459 EXPECT_EQ(OutLocs[0], ValueIDNum(0, 0, RspLoc)); 460 461 // Now insert something into the transfer function to assign to the single 462 // machine location. 463 TransferFunc[0].insert({RspLoc, ValueIDNum(0, 1, RspLoc)}); 464 initValueArray(InLocsPtr, 1, 2); 465 initValueArray(OutLocsPtr, 1, 2); 466 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 467 EXPECT_EQ(InLocs[0], ValueIDNum(0, 0, RspLoc)); 468 EXPECT_EQ(OutLocs[0], ValueIDNum(0, 1, RspLoc)); 469 TransferFunc[0].clear(); 470 471 // Add a new register to be tracked, and insert it into the transfer function 472 // as a copy. The output of $rax should be the live-in value of $rsp. 473 Register RAX = getRegByName("RAX"); 474 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 475 TransferFunc[0].insert({RspLoc, ValueIDNum(0, 1, RspLoc)}); 476 TransferFunc[0].insert({RaxLoc, ValueIDNum(0, 0, RspLoc)}); 477 initValueArray(InLocsPtr, 1, 2); 478 initValueArray(OutLocsPtr, 1, 2); 479 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 480 EXPECT_EQ(InLocs[0], ValueIDNum(0, 0, RspLoc)); 481 EXPECT_EQ(InLocs[1], ValueIDNum(0, 0, RaxLoc)); 482 EXPECT_EQ(OutLocs[0], ValueIDNum(0, 1, RspLoc)); 483 EXPECT_EQ(OutLocs[1], ValueIDNum(0, 0, RspLoc)); // Rax contains RspLoc. 484 TransferFunc[0].clear(); 485 } 486 487 TEST_F(InstrRefLDVTest, MLocDiamondBlocks) { 488 // Test that information flows from the entry block to two successors. 489 // entry 490 // / \ 491 // br1 br2 492 // \ / 493 // ret 494 setupDiamondBlocks(); 495 496 ASSERT_TRUE(MTracker->getNumLocs() == 1); 497 LocIdx RspLoc(0); 498 Register RAX = getRegByName("RAX"); 499 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 500 501 ValueIDNum InLocs[4][2], OutLocs[4][2]; 502 ValueIDNum *InLocsPtr[4] = {InLocs[0], InLocs[1], InLocs[2], InLocs[3]}; 503 ValueIDNum *OutLocsPtr[4] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3]}; 504 505 // Transfer function: start with nothing. 506 SmallVector<MLocTransferMap, 1> TransferFunc; 507 TransferFunc.resize(4); 508 509 // Name some values. 510 unsigned EntryBlk = 0, BrBlk1 = 1, BrBlk2 = 2, RetBlk = 3; 511 512 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 513 ValueIDNum RspDefInBlk0(EntryBlk, 1, RspLoc); 514 ValueIDNum RspDefInBlk1(BrBlk1, 1, RspLoc); 515 ValueIDNum RspDefInBlk2(BrBlk2, 1, RspLoc); 516 ValueIDNum RspPHIInBlk3(RetBlk, 0, RspLoc); 517 ValueIDNum RaxLiveInBlk1(BrBlk1, 0, RaxLoc); 518 ValueIDNum RaxLiveInBlk2(BrBlk2, 0, RaxLoc); 519 520 // With no transfer function, the live-in values to the entry block should 521 // propagate to all live-outs and the live-ins to the two successor blocks. 522 // IN ADDITION: this checks that the exit block doesn't get a PHI put in it. 523 initValueArray(InLocsPtr, 4, 2); 524 initValueArray(OutLocsPtr, 4, 2); 525 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 526 EXPECT_EQ(InLocs[0][0], LiveInRsp); 527 EXPECT_EQ(InLocs[1][0], LiveInRsp); 528 EXPECT_EQ(InLocs[2][0], LiveInRsp); 529 EXPECT_EQ(InLocs[3][0], LiveInRsp); 530 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 531 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 532 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 533 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 534 // (Skipped writing out locations for $rax). 535 536 // Check that a def of $rsp in the entry block will likewise reach all the 537 // successors. 538 TransferFunc[0].insert({RspLoc, RspDefInBlk0}); 539 initValueArray(InLocsPtr, 4, 2); 540 initValueArray(OutLocsPtr, 4, 2); 541 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 542 EXPECT_EQ(InLocs[0][0], LiveInRsp); 543 EXPECT_EQ(InLocs[1][0], RspDefInBlk0); 544 EXPECT_EQ(InLocs[2][0], RspDefInBlk0); 545 EXPECT_EQ(InLocs[3][0], RspDefInBlk0); 546 EXPECT_EQ(OutLocs[0][0], RspDefInBlk0); 547 EXPECT_EQ(OutLocs[1][0], RspDefInBlk0); 548 EXPECT_EQ(OutLocs[2][0], RspDefInBlk0); 549 EXPECT_EQ(OutLocs[3][0], RspDefInBlk0); 550 TransferFunc[0].clear(); 551 552 // Def in one branch of the diamond means that we need a PHI in the ret block 553 TransferFunc[0].insert({RspLoc, RspDefInBlk0}); 554 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 555 initValueArray(InLocsPtr, 4, 2); 556 initValueArray(OutLocsPtr, 4, 2); 557 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 558 // This value map: like above, where RspDefInBlk0 is propagated through one 559 // branch of the diamond, but is def'ed in the live-outs of the other. The 560 // ret / merging block should have a PHI in its live-ins. 561 EXPECT_EQ(InLocs[0][0], LiveInRsp); 562 EXPECT_EQ(InLocs[1][0], RspDefInBlk0); 563 EXPECT_EQ(InLocs[2][0], RspDefInBlk0); 564 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 565 EXPECT_EQ(OutLocs[0][0], RspDefInBlk0); 566 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 567 EXPECT_EQ(OutLocs[2][0], RspDefInBlk0); 568 EXPECT_EQ(OutLocs[3][0], RspPHIInBlk3); 569 TransferFunc[0].clear(); 570 TransferFunc[1].clear(); 571 572 // If we have differeing defs in either side of the diamond, we should 573 // continue to produce a PHI, 574 TransferFunc[0].insert({RspLoc, RspDefInBlk0}); 575 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 576 TransferFunc[2].insert({RspLoc, RspDefInBlk2}); 577 initValueArray(InLocsPtr, 4, 2); 578 initValueArray(OutLocsPtr, 4, 2); 579 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 580 EXPECT_EQ(InLocs[0][0], LiveInRsp); 581 EXPECT_EQ(InLocs[1][0], RspDefInBlk0); 582 EXPECT_EQ(InLocs[2][0], RspDefInBlk0); 583 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 584 EXPECT_EQ(OutLocs[0][0], RspDefInBlk0); 585 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 586 EXPECT_EQ(OutLocs[2][0], RspDefInBlk2); 587 EXPECT_EQ(OutLocs[3][0], RspPHIInBlk3); 588 TransferFunc[0].clear(); 589 TransferFunc[1].clear(); 590 TransferFunc[2].clear(); 591 592 // If we have defs of the same value on either side of the branch, a PHI will 593 // initially be created, however value propagation should then eliminate it. 594 // Encode this by copying the live-in value to $rax, and copying it to $rsp 595 // from $rax in each branch of the diamond. We don't allow the definition of 596 // arbitary values in transfer functions. 597 TransferFunc[0].insert({RspLoc, RspDefInBlk0}); 598 TransferFunc[0].insert({RaxLoc, LiveInRsp}); 599 TransferFunc[1].insert({RspLoc, RaxLiveInBlk1}); 600 TransferFunc[2].insert({RspLoc, RaxLiveInBlk2}); 601 initValueArray(InLocsPtr, 4, 2); 602 initValueArray(OutLocsPtr, 4, 2); 603 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 604 EXPECT_EQ(InLocs[0][0], LiveInRsp); 605 EXPECT_EQ(InLocs[1][0], RspDefInBlk0); 606 EXPECT_EQ(InLocs[2][0], RspDefInBlk0); 607 EXPECT_EQ(InLocs[3][0], LiveInRsp); 608 EXPECT_EQ(OutLocs[0][0], RspDefInBlk0); 609 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 610 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 611 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 612 TransferFunc[0].clear(); 613 TransferFunc[1].clear(); 614 TransferFunc[2].clear(); 615 } 616 617 TEST_F(InstrRefLDVTest, MLocSimpleLoop) { 618 // entry 619 // | 620 // |/-----\ 621 // loopblk | 622 // |\-----/ 623 // | 624 // ret 625 setupSimpleLoop(); 626 627 ASSERT_TRUE(MTracker->getNumLocs() == 1); 628 LocIdx RspLoc(0); 629 Register RAX = getRegByName("RAX"); 630 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 631 632 ValueIDNum InLocs[3][2], OutLocs[3][2]; 633 ValueIDNum *InLocsPtr[3] = {InLocs[0], InLocs[1], InLocs[2]}; 634 ValueIDNum *OutLocsPtr[3] = {OutLocs[0], OutLocs[1], OutLocs[2]}; 635 636 SmallVector<MLocTransferMap, 1> TransferFunc; 637 TransferFunc.resize(3); 638 639 // Name some values. 640 unsigned EntryBlk = 0, LoopBlk = 1, RetBlk = 2; 641 642 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 643 ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc); 644 ValueIDNum RspDefInBlk1(LoopBlk, 1, RspLoc); 645 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 646 ValueIDNum RaxPHIInBlk1(LoopBlk, 0, RaxLoc); 647 ValueIDNum RaxPHIInBlk2(RetBlk, 0, RaxLoc); 648 649 // Begin test with all locations being live-through. 650 initValueArray(InLocsPtr, 3, 2); 651 initValueArray(OutLocsPtr, 3, 2); 652 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 653 EXPECT_EQ(InLocs[0][0], LiveInRsp); 654 EXPECT_EQ(InLocs[1][0], LiveInRsp); 655 EXPECT_EQ(InLocs[2][0], LiveInRsp); 656 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 657 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 658 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 659 660 // Add a def of $rsp to the loop block: it should be in the live-outs, but 661 // should cause a PHI to be placed in the live-ins. Test the transfer function 662 // by copying that PHI into $rax in the loop, then back to $rsp in the ret 663 // block. 664 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 665 TransferFunc[1].insert({RaxLoc, RspPHIInBlk1}); 666 TransferFunc[2].insert({RspLoc, RaxPHIInBlk2}); 667 initValueArray(InLocsPtr, 3, 2); 668 initValueArray(OutLocsPtr, 3, 2); 669 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 670 EXPECT_EQ(InLocs[0][0], LiveInRsp); 671 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 672 EXPECT_EQ(InLocs[2][0], RspDefInBlk1); 673 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 674 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 675 EXPECT_EQ(OutLocs[2][0], RspPHIInBlk1); 676 // Check rax as well, 677 EXPECT_EQ(InLocs[0][1], LiveInRax); 678 EXPECT_EQ(InLocs[1][1], RaxPHIInBlk1); 679 EXPECT_EQ(InLocs[2][1], RspPHIInBlk1); 680 EXPECT_EQ(OutLocs[0][1], LiveInRax); 681 EXPECT_EQ(OutLocs[1][1], RspPHIInBlk1); 682 EXPECT_EQ(OutLocs[2][1], RspPHIInBlk1); 683 TransferFunc[1].clear(); 684 TransferFunc[2].clear(); 685 686 // As with the diamond case, a PHI will be created if there's a (implicit) 687 // def in the entry block and loop block; but should be value propagated away 688 // if it copies in the same value. Copy live-in $rsp to $rax, then copy it 689 // into $rsp in the loop. Encoded as copying the live-in $rax value in block 1 690 // to $rsp. 691 TransferFunc[0].insert({RaxLoc, LiveInRsp}); 692 TransferFunc[1].insert({RspLoc, RaxPHIInBlk1}); 693 initValueArray(InLocsPtr, 3, 2); 694 initValueArray(OutLocsPtr, 3, 2); 695 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 696 EXPECT_EQ(InLocs[0][0], LiveInRsp); 697 EXPECT_EQ(InLocs[1][0], LiveInRsp); 698 EXPECT_EQ(InLocs[2][0], LiveInRsp); 699 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 700 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 701 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 702 // Check $rax's values. 703 EXPECT_EQ(InLocs[0][1], LiveInRax); 704 EXPECT_EQ(InLocs[1][1], LiveInRsp); 705 EXPECT_EQ(InLocs[2][1], LiveInRsp); 706 EXPECT_EQ(OutLocs[0][1], LiveInRsp); 707 EXPECT_EQ(OutLocs[1][1], LiveInRsp); 708 EXPECT_EQ(OutLocs[2][1], LiveInRsp); 709 TransferFunc[0].clear(); 710 TransferFunc[1].clear(); 711 } 712 713 TEST_F(InstrRefLDVTest, MLocNestedLoop) { 714 // entry 715 // | 716 // loop1 717 // ^\ 718 // | \ /-\ 719 // | loop2 | 720 // | / \-/ 721 // ^ / 722 // join 723 // | 724 // ret 725 setupNestedLoops(); 726 727 ASSERT_TRUE(MTracker->getNumLocs() == 1); 728 LocIdx RspLoc(0); 729 Register RAX = getRegByName("RAX"); 730 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 731 732 ValueIDNum InLocs[5][2], OutLocs[5][2]; 733 ValueIDNum *InLocsPtr[5] = {InLocs[0], InLocs[1], InLocs[2], InLocs[3], 734 InLocs[4]}; 735 ValueIDNum *OutLocsPtr[5] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3], 736 OutLocs[4]}; 737 738 SmallVector<MLocTransferMap, 1> TransferFunc; 739 TransferFunc.resize(5); 740 741 unsigned EntryBlk = 0, Loop1Blk = 1, Loop2Blk = 2, JoinBlk = 3; 742 743 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 744 ValueIDNum RspPHIInBlk1(Loop1Blk, 0, RspLoc); 745 ValueIDNum RspDefInBlk1(Loop1Blk, 1, RspLoc); 746 ValueIDNum RspPHIInBlk2(Loop2Blk, 0, RspLoc); 747 ValueIDNum RspDefInBlk2(Loop2Blk, 1, RspLoc); 748 ValueIDNum RspDefInBlk3(JoinBlk, 1, RspLoc); 749 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 750 ValueIDNum RaxPHIInBlk1(Loop1Blk, 0, RaxLoc); 751 ValueIDNum RaxPHIInBlk2(Loop2Blk, 0, RaxLoc); 752 753 // Like the other tests: first ensure that if there's nothing in the transfer 754 // function, then everything is live-through (check $rsp). 755 initValueArray(InLocsPtr, 5, 2); 756 initValueArray(OutLocsPtr, 5, 2); 757 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 758 EXPECT_EQ(InLocs[0][0], LiveInRsp); 759 EXPECT_EQ(InLocs[1][0], LiveInRsp); 760 EXPECT_EQ(InLocs[2][0], LiveInRsp); 761 EXPECT_EQ(InLocs[3][0], LiveInRsp); 762 EXPECT_EQ(InLocs[4][0], LiveInRsp); 763 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 764 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 765 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 766 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 767 EXPECT_EQ(OutLocs[4][0], LiveInRsp); 768 769 // A def in the inner loop means we should get PHIs at the heads of both 770 // loops. Live-outs of the last three blocks will be the def, as it dominates 771 // those. 772 TransferFunc[2].insert({RspLoc, RspDefInBlk2}); 773 initValueArray(InLocsPtr, 5, 2); 774 initValueArray(OutLocsPtr, 5, 2); 775 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 776 EXPECT_EQ(InLocs[0][0], LiveInRsp); 777 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 778 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 779 EXPECT_EQ(InLocs[3][0], RspDefInBlk2); 780 EXPECT_EQ(InLocs[4][0], RspDefInBlk2); 781 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 782 EXPECT_EQ(OutLocs[1][0], RspPHIInBlk1); 783 EXPECT_EQ(OutLocs[2][0], RspDefInBlk2); 784 EXPECT_EQ(OutLocs[3][0], RspDefInBlk2); 785 EXPECT_EQ(OutLocs[4][0], RspDefInBlk2); 786 TransferFunc[2].clear(); 787 788 // Adding a def to the outer loop header shouldn't affect this much -- the 789 // live-out of block 1 changes. 790 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 791 TransferFunc[2].insert({RspLoc, RspDefInBlk2}); 792 initValueArray(InLocsPtr, 5, 2); 793 initValueArray(OutLocsPtr, 5, 2); 794 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 795 EXPECT_EQ(InLocs[0][0], LiveInRsp); 796 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 797 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 798 EXPECT_EQ(InLocs[3][0], RspDefInBlk2); 799 EXPECT_EQ(InLocs[4][0], RspDefInBlk2); 800 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 801 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 802 EXPECT_EQ(OutLocs[2][0], RspDefInBlk2); 803 EXPECT_EQ(OutLocs[3][0], RspDefInBlk2); 804 EXPECT_EQ(OutLocs[4][0], RspDefInBlk2); 805 TransferFunc[1].clear(); 806 TransferFunc[2].clear(); 807 808 // Likewise, putting a def in the outer loop tail shouldn't affect where 809 // the PHIs go, and should propagate into the ret block. 810 811 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 812 TransferFunc[2].insert({RspLoc, RspDefInBlk2}); 813 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 814 initValueArray(InLocsPtr, 5, 2); 815 initValueArray(OutLocsPtr, 5, 2); 816 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 817 EXPECT_EQ(InLocs[0][0], LiveInRsp); 818 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 819 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 820 EXPECT_EQ(InLocs[3][0], RspDefInBlk2); 821 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 822 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 823 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 824 EXPECT_EQ(OutLocs[2][0], RspDefInBlk2); 825 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 826 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 827 TransferFunc[1].clear(); 828 TransferFunc[2].clear(); 829 TransferFunc[3].clear(); 830 831 // However: if we don't def in the inner-loop, then we just have defs in the 832 // head and tail of the outer loop. The inner loop should be live-through. 833 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 834 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 835 initValueArray(InLocsPtr, 5, 2); 836 initValueArray(OutLocsPtr, 5, 2); 837 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 838 EXPECT_EQ(InLocs[0][0], LiveInRsp); 839 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 840 EXPECT_EQ(InLocs[2][0], RspDefInBlk1); 841 EXPECT_EQ(InLocs[3][0], RspDefInBlk1); 842 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 843 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 844 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 845 EXPECT_EQ(OutLocs[2][0], RspDefInBlk1); 846 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 847 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 848 TransferFunc[1].clear(); 849 TransferFunc[3].clear(); 850 851 // Check that this still works if we copy RspDefInBlk1 to $rax and then 852 // copy it back into $rsp in the inner loop. 853 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 854 TransferFunc[1].insert({RaxLoc, RspDefInBlk1}); 855 TransferFunc[2].insert({RspLoc, RaxPHIInBlk2}); 856 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 857 initValueArray(InLocsPtr, 5, 2); 858 initValueArray(OutLocsPtr, 5, 2); 859 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 860 EXPECT_EQ(InLocs[0][0], LiveInRsp); 861 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 862 EXPECT_EQ(InLocs[2][0], RspDefInBlk1); 863 EXPECT_EQ(InLocs[3][0], RspDefInBlk1); 864 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 865 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 866 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 867 EXPECT_EQ(OutLocs[2][0], RspDefInBlk1); 868 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 869 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 870 // Look at raxes value in the relevant blocks, 871 EXPECT_EQ(InLocs[2][1], RspDefInBlk1); 872 EXPECT_EQ(OutLocs[1][1], RspDefInBlk1); 873 TransferFunc[1].clear(); 874 TransferFunc[2].clear(); 875 TransferFunc[3].clear(); 876 877 // If we have a single def in the tail of the outer loop, that should produce 878 // a PHI at the loop head, and be live-through the inner loop. 879 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 880 initValueArray(InLocsPtr, 5, 2); 881 initValueArray(OutLocsPtr, 5, 2); 882 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 883 EXPECT_EQ(InLocs[0][0], LiveInRsp); 884 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 885 EXPECT_EQ(InLocs[2][0], RspPHIInBlk1); 886 EXPECT_EQ(InLocs[3][0], RspPHIInBlk1); 887 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 888 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 889 EXPECT_EQ(OutLocs[1][0], RspPHIInBlk1); 890 EXPECT_EQ(OutLocs[2][0], RspPHIInBlk1); 891 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 892 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 893 TransferFunc[3].clear(); 894 895 // And if we copy from $rsp to $rax in block 2, it should resolve to the PHI 896 // in block 1, and we should keep that value in rax until the ret block. 897 // There'll be a PHI in block 1 and 2, because we're putting a def in the 898 // inner loop. 899 TransferFunc[2].insert({RaxLoc, RspPHIInBlk2}); 900 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 901 initValueArray(InLocsPtr, 5, 2); 902 initValueArray(OutLocsPtr, 5, 2); 903 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 904 // Examining the values of rax, 905 EXPECT_EQ(InLocs[0][1], LiveInRax); 906 EXPECT_EQ(InLocs[1][1], RaxPHIInBlk1); 907 EXPECT_EQ(InLocs[2][1], RaxPHIInBlk2); 908 EXPECT_EQ(InLocs[3][1], RspPHIInBlk1); 909 EXPECT_EQ(InLocs[4][1], RspPHIInBlk1); 910 EXPECT_EQ(OutLocs[0][1], LiveInRax); 911 EXPECT_EQ(OutLocs[1][1], RaxPHIInBlk1); 912 EXPECT_EQ(OutLocs[2][1], RspPHIInBlk1); 913 EXPECT_EQ(OutLocs[3][1], RspPHIInBlk1); 914 EXPECT_EQ(OutLocs[4][1], RspPHIInBlk1); 915 TransferFunc[2].clear(); 916 TransferFunc[3].clear(); 917 } 918 919 TEST_F(InstrRefLDVTest, MLocNoDominatingLoop) { 920 // entry 921 // / \ 922 // / \ 923 // / \ 924 // head1 head2 925 // ^ \ / ^ 926 // ^ \ / ^ 927 // \-joinblk -/ 928 // | 929 // ret 930 setupNoDominatingLoop(); 931 932 ASSERT_TRUE(MTracker->getNumLocs() == 1); 933 LocIdx RspLoc(0); 934 Register RAX = getRegByName("RAX"); 935 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 936 937 ValueIDNum InLocs[5][2], OutLocs[5][2]; 938 ValueIDNum *InLocsPtr[5] = {InLocs[0], InLocs[1], InLocs[2], InLocs[3], 939 InLocs[4]}; 940 ValueIDNum *OutLocsPtr[5] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3], 941 OutLocs[4]}; 942 943 SmallVector<MLocTransferMap, 1> TransferFunc; 944 TransferFunc.resize(5); 945 946 unsigned EntryBlk = 0, Head1Blk = 1, Head2Blk = 2, JoinBlk = 3; 947 948 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 949 ValueIDNum RspPHIInBlk1(Head1Blk, 0, RspLoc); 950 ValueIDNum RspDefInBlk1(Head1Blk, 1, RspLoc); 951 ValueIDNum RspPHIInBlk2(Head2Blk, 0, RspLoc); 952 ValueIDNum RspDefInBlk2(Head2Blk, 1, RspLoc); 953 ValueIDNum RspPHIInBlk3(JoinBlk, 0, RspLoc); 954 ValueIDNum RspDefInBlk3(JoinBlk, 1, RspLoc); 955 ValueIDNum RaxPHIInBlk1(Head1Blk, 0, RaxLoc); 956 ValueIDNum RaxPHIInBlk2(Head2Blk, 0, RaxLoc); 957 958 // As ever, test that everything is live-through if there are no defs. 959 initValueArray(InLocsPtr, 5, 2); 960 initValueArray(OutLocsPtr, 5, 2); 961 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 962 EXPECT_EQ(InLocs[0][0], LiveInRsp); 963 EXPECT_EQ(InLocs[1][0], LiveInRsp); 964 EXPECT_EQ(InLocs[2][0], LiveInRsp); 965 EXPECT_EQ(InLocs[3][0], LiveInRsp); 966 EXPECT_EQ(InLocs[4][0], LiveInRsp); 967 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 968 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 969 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 970 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 971 EXPECT_EQ(OutLocs[4][0], LiveInRsp); 972 973 // Putting a def in the 'join' block will cause us to have two distinct 974 // PHIs in each loop head, then on entry to the join block. 975 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 976 initValueArray(InLocsPtr, 5, 2); 977 initValueArray(OutLocsPtr, 5, 2); 978 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 979 EXPECT_EQ(InLocs[0][0], LiveInRsp); 980 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 981 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 982 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 983 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 984 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 985 EXPECT_EQ(OutLocs[1][0], RspPHIInBlk1); 986 EXPECT_EQ(OutLocs[2][0], RspPHIInBlk2); 987 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 988 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 989 TransferFunc[3].clear(); 990 991 // We should get the same behaviour if we put the def in either of the 992 // loop heads -- it should force the other head to be a PHI. 993 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 994 initValueArray(InLocsPtr, 5, 2); 995 initValueArray(OutLocsPtr, 5, 2); 996 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 997 EXPECT_EQ(InLocs[0][0], LiveInRsp); 998 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 999 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 1000 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 1001 EXPECT_EQ(InLocs[4][0], RspPHIInBlk3); 1002 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1003 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 1004 EXPECT_EQ(OutLocs[2][0], RspPHIInBlk2); 1005 EXPECT_EQ(OutLocs[3][0], RspPHIInBlk3); 1006 EXPECT_EQ(OutLocs[4][0], RspPHIInBlk3); 1007 TransferFunc[1].clear(); 1008 1009 // Check symmetry, 1010 TransferFunc[2].insert({RspLoc, RspDefInBlk2}); 1011 initValueArray(InLocsPtr, 5, 2); 1012 initValueArray(OutLocsPtr, 5, 2); 1013 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1014 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1015 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 1016 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 1017 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 1018 EXPECT_EQ(InLocs[4][0], RspPHIInBlk3); 1019 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1020 EXPECT_EQ(OutLocs[1][0], RspPHIInBlk1); 1021 EXPECT_EQ(OutLocs[2][0], RspDefInBlk2); 1022 EXPECT_EQ(OutLocs[3][0], RspPHIInBlk3); 1023 EXPECT_EQ(OutLocs[4][0], RspPHIInBlk3); 1024 TransferFunc[2].clear(); 1025 1026 // Test some scenarios where there _shouldn't_ be any PHIs created at heads. 1027 // These are those PHIs are created, but value propagation eliminates them. 1028 // For example, lets copy rsp-livein to $rsp inside each loop head, so that 1029 // there's no need for a PHI in the join block. Put a def of $rsp in block 3 1030 // to force PHIs elsewhere. 1031 TransferFunc[0].insert({RaxLoc, LiveInRsp}); 1032 TransferFunc[1].insert({RspLoc, RaxPHIInBlk1}); 1033 TransferFunc[2].insert({RspLoc, RaxPHIInBlk2}); 1034 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 1035 initValueArray(InLocsPtr, 5, 2); 1036 initValueArray(OutLocsPtr, 5, 2); 1037 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1038 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1039 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 1040 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 1041 EXPECT_EQ(InLocs[3][0], LiveInRsp); 1042 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 1043 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1044 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 1045 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 1046 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 1047 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 1048 TransferFunc[0].clear(); 1049 TransferFunc[1].clear(); 1050 TransferFunc[2].clear(); 1051 TransferFunc[3].clear(); 1052 1053 // In fact, if we eliminate the def in block 3, none of those PHIs are 1054 // necessary, as we're just repeatedly copying LiveInRsp into $rsp. They 1055 // should all be value propagated out. 1056 TransferFunc[0].insert({RaxLoc, LiveInRsp}); 1057 TransferFunc[1].insert({RspLoc, RaxPHIInBlk1}); 1058 TransferFunc[2].insert({RspLoc, RaxPHIInBlk2}); 1059 initValueArray(InLocsPtr, 5, 2); 1060 initValueArray(OutLocsPtr, 5, 2); 1061 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1062 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1063 EXPECT_EQ(InLocs[1][0], LiveInRsp); 1064 EXPECT_EQ(InLocs[2][0], LiveInRsp); 1065 EXPECT_EQ(InLocs[3][0], LiveInRsp); 1066 EXPECT_EQ(InLocs[4][0], LiveInRsp); 1067 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1068 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 1069 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 1070 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 1071 EXPECT_EQ(OutLocs[4][0], LiveInRsp); 1072 TransferFunc[0].clear(); 1073 TransferFunc[1].clear(); 1074 TransferFunc[2].clear(); 1075 } 1076 1077 TEST_F(InstrRefLDVTest, MLocBadlyNestedLoops) { 1078 // entry 1079 // | 1080 // loop1 -o 1081 // | ^ 1082 // | ^ 1083 // loop2 -o 1084 // | ^ 1085 // | ^ 1086 // loop3 -o 1087 // | 1088 // ret 1089 setupBadlyNestedLoops(); 1090 1091 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1092 LocIdx RspLoc(0); 1093 Register RAX = getRegByName("RAX"); 1094 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1095 1096 ValueIDNum InLocs[5][2], OutLocs[5][2]; 1097 ValueIDNum *InLocsPtr[5] = {InLocs[0], InLocs[1], InLocs[2], InLocs[3], 1098 InLocs[4]}; 1099 ValueIDNum *OutLocsPtr[5] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3], 1100 OutLocs[4]}; 1101 1102 SmallVector<MLocTransferMap, 1> TransferFunc; 1103 TransferFunc.resize(5); 1104 1105 unsigned EntryBlk = 0, Loop1Blk = 1, Loop2Blk = 2, Loop3Blk = 3; 1106 1107 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1108 ValueIDNum RspPHIInBlk1(Loop1Blk, 0, RspLoc); 1109 ValueIDNum RspDefInBlk1(Loop1Blk, 1, RspLoc); 1110 ValueIDNum RspPHIInBlk2(Loop2Blk, 0, RspLoc); 1111 ValueIDNum RspPHIInBlk3(Loop3Blk, 0, RspLoc); 1112 ValueIDNum RspDefInBlk3(Loop3Blk, 1, RspLoc); 1113 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1114 ValueIDNum RaxPHIInBlk3(Loop3Blk, 0, RaxLoc); 1115 1116 // As ever, test that everything is live-through if there are no defs. 1117 initValueArray(InLocsPtr, 5, 2); 1118 initValueArray(OutLocsPtr, 5, 2); 1119 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1120 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1121 EXPECT_EQ(InLocs[1][0], LiveInRsp); 1122 EXPECT_EQ(InLocs[2][0], LiveInRsp); 1123 EXPECT_EQ(InLocs[3][0], LiveInRsp); 1124 EXPECT_EQ(InLocs[4][0], LiveInRsp); 1125 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1126 EXPECT_EQ(OutLocs[1][0], LiveInRsp); 1127 EXPECT_EQ(OutLocs[2][0], LiveInRsp); 1128 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 1129 EXPECT_EQ(OutLocs[4][0], LiveInRsp); 1130 1131 // A def in loop3 should cause PHIs in every loop block: they're all 1132 // reachable from each other. 1133 TransferFunc[3].insert({RspLoc, RspDefInBlk3}); 1134 initValueArray(InLocsPtr, 5, 2); 1135 initValueArray(OutLocsPtr, 5, 2); 1136 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1137 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1138 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 1139 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 1140 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 1141 EXPECT_EQ(InLocs[4][0], RspDefInBlk3); 1142 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1143 EXPECT_EQ(OutLocs[1][0], RspPHIInBlk1); 1144 EXPECT_EQ(OutLocs[2][0], RspPHIInBlk2); 1145 EXPECT_EQ(OutLocs[3][0], RspDefInBlk3); 1146 EXPECT_EQ(OutLocs[4][0], RspDefInBlk3); 1147 TransferFunc[3].clear(); 1148 1149 // A def in loop1 should cause a PHI in loop1, but not the other blocks. 1150 // loop2 and loop3 are dominated by the def in loop1, so they should have 1151 // that value live-through. 1152 TransferFunc[1].insert({RspLoc, RspDefInBlk1}); 1153 initValueArray(InLocsPtr, 5, 2); 1154 initValueArray(OutLocsPtr, 5, 2); 1155 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1156 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1157 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 1158 EXPECT_EQ(InLocs[2][0], RspDefInBlk1); 1159 EXPECT_EQ(InLocs[3][0], RspDefInBlk1); 1160 EXPECT_EQ(InLocs[4][0], RspDefInBlk1); 1161 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1162 EXPECT_EQ(OutLocs[1][0], RspDefInBlk1); 1163 EXPECT_EQ(OutLocs[2][0], RspDefInBlk1); 1164 EXPECT_EQ(OutLocs[3][0], RspDefInBlk1); 1165 EXPECT_EQ(OutLocs[4][0], RspDefInBlk1); 1166 TransferFunc[1].clear(); 1167 1168 // As with earlier tricks: copy $rsp to $rax in the entry block, then $rax 1169 // to $rsp in block 3. The only def of $rsp is simply copying the same value 1170 // back into itself, and the value of $rsp is LiveInRsp all the way through. 1171 // PHIs should be created, then value-propagated away... however this 1172 // doesn't work in practice. 1173 // Consider the entry to loop3: we can determine that there's an incoming 1174 // PHI value from loop2, and LiveInRsp from the self-loop. This would still 1175 // justify having a PHI on entry to loop3. The only way to completely 1176 // value-propagate these PHIs away would be to speculatively explore what 1177 // PHIs could be eliminated and what that would lead to; which is 1178 // combinatorially complex. 1179 // Happily: 1180 // a) In this scenario, we always have a tracked location for LiveInRsp 1181 // anyway, so there's no loss in availability, 1182 // b) Only DBG_PHIs of a register would be vunlerable to this scenario, and 1183 // even then only if a true PHI became a DBG_PHI and was then optimised 1184 // through branch folding to no longer be at a CFG join, 1185 // c) The register allocator can spot this kind of redundant COPY easily, 1186 // and eliminate it. 1187 // 1188 // This unit test left in as a reference for the limitations of this 1189 // approach. PHIs will be left in $rsp on entry to each block. 1190 TransferFunc[0].insert({RaxLoc, LiveInRsp}); 1191 TransferFunc[3].insert({RspLoc, RaxPHIInBlk3}); 1192 initValueArray(InLocsPtr, 5, 2); 1193 initValueArray(OutLocsPtr, 5, 2); 1194 buildMLocValueMap(InLocsPtr, OutLocsPtr, TransferFunc); 1195 EXPECT_EQ(InLocs[0][0], LiveInRsp); 1196 EXPECT_EQ(InLocs[1][0], RspPHIInBlk1); 1197 EXPECT_EQ(InLocs[2][0], RspPHIInBlk2); 1198 EXPECT_EQ(InLocs[3][0], RspPHIInBlk3); 1199 EXPECT_EQ(InLocs[4][0], LiveInRsp); 1200 EXPECT_EQ(OutLocs[0][0], LiveInRsp); 1201 EXPECT_EQ(OutLocs[1][0], RspPHIInBlk1); 1202 EXPECT_EQ(OutLocs[2][0], RspPHIInBlk2); 1203 EXPECT_EQ(OutLocs[3][0], LiveInRsp); 1204 EXPECT_EQ(OutLocs[4][0], LiveInRsp); 1205 // Check $rax's value. It should have $rsps value from the entry block 1206 // onwards. 1207 EXPECT_EQ(InLocs[0][1], LiveInRax); 1208 EXPECT_EQ(InLocs[1][1], LiveInRsp); 1209 EXPECT_EQ(InLocs[2][1], LiveInRsp); 1210 EXPECT_EQ(InLocs[3][1], LiveInRsp); 1211 EXPECT_EQ(InLocs[4][1], LiveInRsp); 1212 EXPECT_EQ(OutLocs[0][1], LiveInRsp); 1213 EXPECT_EQ(OutLocs[1][1], LiveInRsp); 1214 EXPECT_EQ(OutLocs[2][1], LiveInRsp); 1215 EXPECT_EQ(OutLocs[3][1], LiveInRsp); 1216 EXPECT_EQ(OutLocs[4][1], LiveInRsp); 1217 } 1218 1219 TEST_F(InstrRefLDVTest, pickVPHILocDiamond) { 1220 // entry 1221 // / \ 1222 // br1 br2 1223 // \ / 1224 // ret 1225 setupDiamondBlocks(); 1226 1227 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1228 LocIdx RspLoc(0); 1229 Register RAX = getRegByName("RAX"); 1230 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1231 1232 ValueIDNum OutLocs[4][2]; 1233 ValueIDNum *OutLocsPtr[4] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3]}; 1234 1235 initValueArray(OutLocsPtr, 4, 2); 1236 1237 unsigned EntryBlk = 0, Br2Blk = 2, RetBlk = 3; 1238 1239 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1240 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1241 ValueIDNum RspPHIInBlk2(Br2Blk, 0, RspLoc); 1242 ValueIDNum RspPHIInBlk3(RetBlk, 0, RspLoc); 1243 1244 DebugVariable Var(FuncVariable, None, nullptr); 1245 DbgValueProperties EmptyProps(EmptyExpr, false); 1246 SmallVector<DenseMap<DebugVariable, DbgValue>, 32> VLiveOuts; 1247 VLiveOuts.resize(4); 1248 InstrRefBasedLDV::LiveIdxT VLiveOutIdx; 1249 VLiveOutIdx[MBB0] = &VLiveOuts[0]; 1250 VLiveOutIdx[MBB1] = &VLiveOuts[1]; 1251 VLiveOutIdx[MBB2] = &VLiveOuts[2]; 1252 VLiveOutIdx[MBB3] = &VLiveOuts[3]; 1253 1254 SmallVector<const MachineBasicBlock *, 2> Preds; 1255 for (const auto *Pred : MBB3->predecessors()) 1256 Preds.push_back(Pred); 1257 1258 // Specify the live-outs around the joining block. 1259 OutLocs[1][0] = LiveInRsp; 1260 OutLocs[2][0] = LiveInRax; 1261 1262 Optional<ValueIDNum> Result; 1263 1264 // Simple case: join two distinct values on entry to the block. 1265 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1266 VLiveOuts[2].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1267 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1268 // Should have picked a PHI in $rsp in block 3. 1269 EXPECT_TRUE(Result); 1270 if (Result) 1271 EXPECT_EQ(*Result, RspPHIInBlk3); 1272 1273 // If the incoming values are swapped between blocks, we should not 1274 // successfully join. The CFG merge would select the right values, but in 1275 // the wrong conditions. 1276 std::swap(VLiveOuts[1], VLiveOuts[2]); 1277 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1278 EXPECT_FALSE(Result); 1279 1280 // Swap back, 1281 std::swap(VLiveOuts[1], VLiveOuts[2]); 1282 // Setting one of these to being a constant should prohibit merging. 1283 VLiveOuts[1].find(Var)->second.Kind = DbgValue::Const; 1284 VLiveOuts[1].find(Var)->second.MO = MachineOperand::CreateImm(0); 1285 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1286 EXPECT_FALSE(Result); 1287 1288 // Seeing both to being a constant -> still prohibit, it shouldn't become 1289 // a value in the register file anywhere. 1290 VLiveOuts[2].find(Var)->second = VLiveOuts[1].find(Var)->second; 1291 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1292 EXPECT_FALSE(Result); 1293 1294 // NoVals shouldn't join with anything else. 1295 VLiveOuts[1].clear(); 1296 VLiveOuts[2].clear(); 1297 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1298 VLiveOuts[2].insert({Var, DbgValue(2, EmptyProps, DbgValue::NoVal)}); 1299 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1300 EXPECT_FALSE(Result); 1301 1302 // We might merge in another VPHI in such a join. Present pickVPHILoc with 1303 // such a scenario: first, where one incoming edge has a VPHI with no known 1304 // value. This represents an edge where there was a PHI value that can't be 1305 // found in the register file -- we can't subsequently find a PHI here. 1306 VLiveOuts[2].clear(); 1307 VLiveOuts[2].insert({Var, DbgValue(2, EmptyProps, DbgValue::VPHI)}); 1308 EXPECT_EQ(VLiveOuts[2].find(Var)->second.ID, ValueIDNum::EmptyValue); 1309 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1310 EXPECT_FALSE(Result); 1311 1312 // However, if we know the value of the incoming VPHI, we can search for its 1313 // location. Use a PHI machine-value for doing this, as VPHIs should always 1314 // have PHI values, or they should have been eliminated. 1315 OutLocs[2][0] = RspPHIInBlk2; 1316 VLiveOuts[2].find(Var)->second.ID = RspPHIInBlk2; 1317 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1318 EXPECT_TRUE(Result); 1319 if (Result) 1320 EXPECT_EQ(*Result, RspPHIInBlk3); 1321 1322 // If that value isn't available from that block, don't join. 1323 OutLocs[2][0] = LiveInRsp; 1324 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1325 EXPECT_FALSE(Result); 1326 1327 // Check that we don't pick values when the properties disagree, for example 1328 // different indirectness or DIExpression. 1329 DIExpression *NewExpr = DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4); 1330 DbgValueProperties PropsWithExpr(NewExpr, false); 1331 VLiveOuts[2].clear(); 1332 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, PropsWithExpr, DbgValue::Def)}); 1333 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1334 EXPECT_FALSE(Result); 1335 1336 DbgValueProperties PropsWithIndirect(EmptyExpr, true); 1337 VLiveOuts[2].clear(); 1338 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def)}); 1339 Result = pickVPHILoc(*MBB3, Var, VLiveOutIdx, OutLocsPtr, Preds); 1340 EXPECT_FALSE(Result); 1341 } 1342 1343 TEST_F(InstrRefLDVTest, pickVPHILocLoops) { 1344 setupSimpleLoop(); 1345 // entry 1346 // | 1347 // |/-----\ 1348 // loopblk | 1349 // |\-----/ 1350 // | 1351 // ret 1352 1353 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1354 LocIdx RspLoc(0); 1355 Register RAX = getRegByName("RAX"); 1356 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1357 1358 ValueIDNum OutLocs[3][2]; 1359 ValueIDNum *OutLocsPtr[4] = {OutLocs[0], OutLocs[1], OutLocs[2]}; 1360 1361 initValueArray(OutLocsPtr, 3, 2); 1362 1363 unsigned EntryBlk = 0, LoopBlk = 1; 1364 1365 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1366 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1367 ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc); 1368 ValueIDNum RaxPHIInBlk1(LoopBlk, 0, RaxLoc); 1369 1370 DebugVariable Var(FuncVariable, None, nullptr); 1371 DbgValueProperties EmptyProps(EmptyExpr, false); 1372 SmallVector<DenseMap<DebugVariable, DbgValue>, 32> VLiveOuts; 1373 VLiveOuts.resize(3); 1374 InstrRefBasedLDV::LiveIdxT VLiveOutIdx; 1375 VLiveOutIdx[MBB0] = &VLiveOuts[0]; 1376 VLiveOutIdx[MBB1] = &VLiveOuts[1]; 1377 VLiveOutIdx[MBB2] = &VLiveOuts[2]; 1378 1379 SmallVector<const MachineBasicBlock *, 2> Preds; 1380 for (const auto *Pred : MBB1->predecessors()) 1381 Preds.push_back(Pred); 1382 1383 // Specify the live-outs around the joining block. 1384 OutLocs[0][0] = LiveInRsp; 1385 OutLocs[1][0] = LiveInRax; 1386 1387 Optional<ValueIDNum> Result; 1388 1389 // See that we can merge as normal on a backedge. 1390 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1391 VLiveOuts[1].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1392 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1393 // Should have picked a PHI in $rsp in block 1. 1394 EXPECT_TRUE(Result); 1395 if (Result) 1396 EXPECT_EQ(*Result, RspPHIInBlk1); 1397 1398 // And that, if the desired values aren't available, we don't merge. 1399 OutLocs[1][0] = LiveInRsp; 1400 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1401 EXPECT_FALSE(Result); 1402 1403 // Test the backedge behaviour: PHIs that feed back into themselves can 1404 // carry this variables value. Feed in LiveInRsp in both $rsp and $rax 1405 // from the entry block, but only put an appropriate backedge PHI in $rax. 1406 // Only the $rax location can form the correct PHI. 1407 OutLocs[0][0] = LiveInRsp; 1408 OutLocs[0][1] = LiveInRsp; 1409 OutLocs[1][0] = RaxPHIInBlk1; 1410 OutLocs[1][1] = RaxPHIInBlk1; 1411 VLiveOuts[0].clear(); 1412 VLiveOuts[1].clear(); 1413 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1414 // Crucially, a VPHI originating in this block: 1415 VLiveOuts[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1416 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1417 EXPECT_TRUE(Result); 1418 if (Result) 1419 EXPECT_EQ(*Result, RaxPHIInBlk1); 1420 1421 // Merging should not be permitted if there's a usable PHI on the backedge, 1422 // but it's in the wrong place. (Overwrite $rax). 1423 OutLocs[1][1] = LiveInRax; 1424 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1425 EXPECT_FALSE(Result); 1426 1427 // Additionally, if the VPHI coming back on the loop backedge isn't from 1428 // this block (block 1), we can't merge it. 1429 OutLocs[1][1] = RaxPHIInBlk1; 1430 VLiveOuts[1].clear(); 1431 VLiveOuts[1].insert({Var, DbgValue(0, EmptyProps, DbgValue::VPHI)}); 1432 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1433 EXPECT_FALSE(Result); 1434 } 1435 1436 TEST_F(InstrRefLDVTest, pickVPHILocBadlyNestedLoops) { 1437 // Run some tests similar to pickVPHILocLoops, with more than one backedge, 1438 // and check that we merge correctly over many candidate locations. 1439 setupBadlyNestedLoops(); 1440 // entry 1441 // | 1442 // loop1 -o 1443 // | ^ 1444 // | ^ 1445 // loop2 -o 1446 // | ^ 1447 // | ^ 1448 // loop3 -o 1449 // | 1450 // ret 1451 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1452 LocIdx RspLoc(0); 1453 Register RAX = getRegByName("RAX"); 1454 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1455 Register RBX = getRegByName("RBX"); 1456 LocIdx RbxLoc = MTracker->lookupOrTrackRegister(RBX); 1457 1458 ValueIDNum OutLocs[5][3]; 1459 ValueIDNum *OutLocsPtr[5] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3], OutLocs[4]}; 1460 1461 initValueArray(OutLocsPtr, 5, 3); 1462 1463 unsigned EntryBlk = 0, Loop1Blk = 1; 1464 1465 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1466 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1467 ValueIDNum LiveInRbx(EntryBlk, 0, RbxLoc); 1468 ValueIDNum RspPHIInBlk1(Loop1Blk, 0, RspLoc); 1469 ValueIDNum RaxPHIInBlk1(Loop1Blk, 0, RaxLoc); 1470 ValueIDNum RbxPHIInBlk1(Loop1Blk, 0, RbxLoc); 1471 1472 DebugVariable Var(FuncVariable, None, nullptr); 1473 DbgValueProperties EmptyProps(EmptyExpr, false); 1474 SmallVector<DenseMap<DebugVariable, DbgValue>, 32> VLiveOuts; 1475 VLiveOuts.resize(5); 1476 InstrRefBasedLDV::LiveIdxT VLiveOutIdx; 1477 VLiveOutIdx[MBB0] = &VLiveOuts[0]; 1478 VLiveOutIdx[MBB1] = &VLiveOuts[1]; 1479 VLiveOutIdx[MBB2] = &VLiveOuts[2]; 1480 VLiveOutIdx[MBB3] = &VLiveOuts[3]; 1481 VLiveOutIdx[MBB4] = &VLiveOuts[4]; 1482 1483 // We're going to focus on block 1. 1484 SmallVector<const MachineBasicBlock *, 2> Preds; 1485 for (const auto *Pred : MBB1->predecessors()) 1486 Preds.push_back(Pred); 1487 1488 // Specify the live-outs around the joining block. Incoming edges from the 1489 // entry block, self, and loop2. 1490 OutLocs[0][0] = LiveInRsp; 1491 OutLocs[1][0] = LiveInRax; 1492 OutLocs[2][0] = LiveInRbx; 1493 1494 Optional<ValueIDNum> Result; 1495 1496 // See that we can merge as normal on a backedge. 1497 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1498 VLiveOuts[1].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1499 VLiveOuts[2].insert({Var, DbgValue(LiveInRbx, EmptyProps, DbgValue::Def)}); 1500 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1501 // Should have picked a PHI in $rsp in block 1. 1502 EXPECT_TRUE(Result); 1503 if (Result) 1504 EXPECT_EQ(*Result, RspPHIInBlk1); 1505 1506 // Check too that permuting the live-out locations prevents merging 1507 OutLocs[0][0] = LiveInRax; 1508 OutLocs[1][0] = LiveInRbx; 1509 OutLocs[2][0] = LiveInRsp; 1510 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1511 EXPECT_FALSE(Result); 1512 1513 OutLocs[0][0] = LiveInRsp; 1514 OutLocs[1][0] = LiveInRax; 1515 OutLocs[2][0] = LiveInRbx; 1516 1517 // Feeding a PHI back on one backedge shouldn't merge (block 1 self backedge 1518 // wants LiveInRax). 1519 OutLocs[1][0] = RspPHIInBlk1; 1520 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1521 EXPECT_FALSE(Result); 1522 1523 // If the variables value on that edge is a VPHI feeding into itself, that's 1524 // fine. 1525 VLiveOuts[1].clear(); 1526 VLiveOuts[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1527 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1528 EXPECT_TRUE(Result); 1529 if (Result) 1530 EXPECT_EQ(*Result, RspPHIInBlk1); 1531 1532 // Likewise: the other backedge being a VPHI from block 1 should be accepted. 1533 OutLocs[2][0] = RspPHIInBlk1; 1534 VLiveOuts[2].clear(); 1535 VLiveOuts[2].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1536 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1537 EXPECT_TRUE(Result); 1538 if (Result) 1539 EXPECT_EQ(*Result, RspPHIInBlk1); 1540 1541 // Here's where it becomes tricky: we should not merge if there are two 1542 // _distinct_ backedge PHIs. We can't have a PHI that happens in both rsp 1543 // and rax for example. We can only pick one location as the live-in. 1544 OutLocs[2][0] = RaxPHIInBlk1; 1545 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1546 EXPECT_FALSE(Result); 1547 1548 // The above test sources correct machine-PHI-value from two places. Now 1549 // try with one machine-PHI-value, but placed in two different locations 1550 // on the backedge. Again, we can't merge a location here, there's no 1551 // location that works on all paths. 1552 OutLocs[0][0] = LiveInRsp; 1553 OutLocs[1][0] = RspPHIInBlk1; 1554 OutLocs[2][0] = LiveInRsp; 1555 OutLocs[2][1] = RspPHIInBlk1; 1556 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1557 EXPECT_FALSE(Result); 1558 1559 // Scatter various PHI values across the available locations. Only rbx (loc 2) 1560 // has the right value in both backedges -- that's the loc that should be 1561 // picked. 1562 OutLocs[0][2] = LiveInRsp; 1563 OutLocs[1][0] = RspPHIInBlk1; 1564 OutLocs[1][1] = RaxPHIInBlk1; 1565 OutLocs[1][2] = RbxPHIInBlk1; 1566 OutLocs[2][0] = LiveInRsp; 1567 OutLocs[2][1] = RspPHIInBlk1; 1568 OutLocs[2][2] = RbxPHIInBlk1; 1569 Result = pickVPHILoc(*MBB1, Var, VLiveOutIdx, OutLocsPtr, Preds); 1570 EXPECT_TRUE(Result); 1571 if (Result) 1572 EXPECT_EQ(*Result, RbxPHIInBlk1); 1573 } 1574 1575 TEST_F(InstrRefLDVTest, vlocJoinDiamond) { 1576 // entry 1577 // / \ 1578 // br1 br2 1579 // \ / 1580 // ret 1581 setupDiamondBlocks(); 1582 1583 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1584 LocIdx RspLoc(0); 1585 Register RAX = getRegByName("RAX"); 1586 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1587 1588 unsigned EntryBlk = 0, Br2Blk = 2, RetBlk = 3; 1589 1590 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1591 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1592 ValueIDNum RspPHIInBlkBr2Blk(Br2Blk, 0, RspLoc); 1593 ValueIDNum RspPHIInBlkRetBlk(RetBlk, 0, RspLoc); 1594 1595 DebugVariable Var(FuncVariable, None, nullptr); 1596 DbgValueProperties EmptyProps(EmptyExpr, false); 1597 SmallVector<DenseMap<DebugVariable, DbgValue>, 32> VLiveOuts, VLiveIns; 1598 VLiveOuts.resize(4); 1599 VLiveIns.resize(4); 1600 InstrRefBasedLDV::LiveIdxT VLiveOutIdx, VLiveInIdx; 1601 VLiveOutIdx[MBB0] = &VLiveOuts[0]; 1602 VLiveOutIdx[MBB1] = &VLiveOuts[1]; 1603 VLiveOutIdx[MBB2] = &VLiveOuts[2]; 1604 VLiveOutIdx[MBB3] = &VLiveOuts[3]; 1605 VLiveInIdx[MBB0] = &VLiveIns[0]; 1606 VLiveInIdx[MBB1] = &VLiveIns[1]; 1607 VLiveInIdx[MBB2] = &VLiveIns[2]; 1608 VLiveInIdx[MBB3] = &VLiveIns[3]; 1609 1610 SmallPtrSet<const MachineBasicBlock *, 8> AllBlocks; 1611 AllBlocks.insert(MBB0); 1612 AllBlocks.insert(MBB1); 1613 AllBlocks.insert(MBB2); 1614 AllBlocks.insert(MBB3); 1615 1616 SmallVector<const MachineBasicBlock *, 2> Preds; 1617 for (const auto *Pred : MBB3->predecessors()) 1618 Preds.push_back(Pred); 1619 1620 SmallSet<DebugVariable, 4> AllVars; 1621 AllVars.insert(Var); 1622 1623 DenseMap<DebugVariable, DbgValue> JoinedLocs; 1624 1625 // vlocJoin is here to propagate incoming values, and eliminate PHIs. Start 1626 // off by propagating a value into the merging block, number 3. 1627 VLiveIns[3].insert({Var, DbgValue(3, EmptyProps, DbgValue::NoVal)}); 1628 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1629 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1630 bool Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1631 AllBlocks, AllBlocks, JoinedLocs); 1632 EXPECT_TRUE(Result); // Output locs should have changed. 1633 auto It = VLiveIns[3].find(Var); 1634 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1635 EXPECT_EQ(It->second.ID, LiveInRsp); 1636 JoinedLocs.clear(); 1637 1638 // And if we did it a second time, leaving the live-ins as it was, then 1639 // we should report no change. 1640 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1641 AllBlocks, AllBlocks, JoinedLocs); 1642 EXPECT_FALSE(Result); 1643 JoinedLocs.clear(); 1644 VLiveIns[3].clear(); 1645 1646 // If the live-in variable values are different, but there's no PHI placed 1647 // in this block, then just pick a location. It should be the first (in RPO) 1648 // predecessor to avoid being a backedge. 1649 VLiveOuts[2].clear(); 1650 VLiveOuts[2].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1651 VLiveIns[3].insert({Var, DbgValue(3, EmptyProps, DbgValue::NoVal)}); 1652 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1653 AllBlocks, AllBlocks, JoinedLocs); 1654 EXPECT_TRUE(Result); 1655 It = VLiveIns[3].find(Var); 1656 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1657 // RPO is blocks 0 2 1 3, so LiveInRax is picked as the first predecessor 1658 // of this join. 1659 EXPECT_EQ(It->second.ID, LiveInRax); 1660 JoinedLocs.clear(); 1661 VLiveIns[3].clear(); 1662 1663 // No tests for whether vlocJoin will pass-through a variable with differing 1664 // expressions / properties. Those can only come about due to assignments; and 1665 // for any assignment at all, a PHI should have been placed at the dominance 1666 // frontier. We rely on the IDF calculator being accurate (which is OK, 1667 // because so does the rest of LLVM). 1668 1669 // Try placing a PHI. With differing input values (LiveInRsp, LiveInRax), 1670 // this PHI should not be eliminated. 1671 VLiveIns[3].insert({Var, DbgValue(3, EmptyProps, DbgValue::VPHI)}); 1672 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1673 AllBlocks, AllBlocks, JoinedLocs); 1674 // Expect no change. 1675 EXPECT_FALSE(Result); 1676 It = VLiveIns[3].find(Var); 1677 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1678 // This should not have been assigned a fixed value. 1679 EXPECT_EQ(It->second.ID, ValueIDNum::EmptyValue); 1680 EXPECT_EQ(It->second.BlockNo, 3); 1681 JoinedLocs.clear(); 1682 VLiveIns[3].clear(); 1683 1684 // Try a simple PHI elimination. Put a PHI in block 3, but LiveInRsp on both 1685 // incoming edges. Re-load in and out-locs with unrelated values; they're 1686 // irrelevant. 1687 VLiveOuts[1].clear(); 1688 VLiveOuts[2].clear(); 1689 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1690 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1691 VLiveIns[3].insert({Var, DbgValue(3, EmptyProps, DbgValue::VPHI)}); 1692 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1693 AllBlocks, AllBlocks, JoinedLocs); 1694 EXPECT_TRUE(Result); 1695 It = VLiveIns[3].find(Var); 1696 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1697 EXPECT_EQ(It->second.ID, LiveInRsp); 1698 JoinedLocs.clear(); 1699 VLiveIns[3].clear(); 1700 1701 // If the "current" live-in is a VPHI, but not a VPHI generated in the current 1702 // block, then it's the remains of an earlier value propagation. We should 1703 // value propagate through this merge. Even if the current incoming values 1704 // disagree, because we've previously determined any VPHI here is redundant. 1705 VLiveOuts[1].clear(); 1706 VLiveOuts[2].clear(); 1707 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1708 VLiveOuts[2].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1709 VLiveIns[3].insert({Var, DbgValue(2, EmptyProps, DbgValue::VPHI)}); 1710 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1711 AllBlocks, AllBlocks, JoinedLocs); 1712 EXPECT_TRUE(Result); 1713 It = VLiveIns[3].find(Var); 1714 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1715 EXPECT_EQ(It->second.ID, LiveInRax); // from block 2 1716 JoinedLocs.clear(); 1717 VLiveIns[3].clear(); 1718 1719 // The above test, but test that we will install one value-propagated VPHI 1720 // over another. 1721 VLiveOuts[1].clear(); 1722 VLiveOuts[2].clear(); 1723 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1724 VLiveOuts[2].insert({Var, DbgValue(0, EmptyProps, DbgValue::VPHI)}); 1725 VLiveIns[3].insert({Var, DbgValue(2, EmptyProps, DbgValue::VPHI)}); 1726 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1727 AllBlocks, AllBlocks, JoinedLocs); 1728 EXPECT_TRUE(Result); 1729 It = VLiveIns[3].find(Var); 1730 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1731 EXPECT_EQ(It->second.BlockNo, 0); 1732 JoinedLocs.clear(); 1733 VLiveIns[3].clear(); 1734 1735 // We shouldn't eliminate PHIs when properties disagree. 1736 DbgValueProperties PropsWithIndirect(EmptyExpr, true); 1737 VLiveOuts[1].clear(); 1738 VLiveOuts[2].clear(); 1739 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1740 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def)}); 1741 VLiveIns[3].insert({Var, DbgValue(3, EmptyProps, DbgValue::VPHI)}); 1742 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1743 AllBlocks, AllBlocks, JoinedLocs); 1744 EXPECT_FALSE(Result); 1745 It = VLiveIns[3].find(Var); 1746 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1747 EXPECT_EQ(It->second.BlockNo, 3); 1748 JoinedLocs.clear(); 1749 VLiveIns[3].clear(); 1750 1751 // Even if properties disagree, we should still value-propagate if there's no 1752 // PHI to be eliminated. The disagreeing values should work themselves out, 1753 // seeing how we've determined no PHI is necessary. 1754 VLiveOuts[1].clear(); 1755 VLiveOuts[2].clear(); 1756 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1757 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, PropsWithIndirect, DbgValue::Def)}); 1758 VLiveIns[3].insert({Var, DbgValue(2, EmptyProps, DbgValue::VPHI)}); 1759 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1760 AllBlocks, AllBlocks, JoinedLocs); 1761 EXPECT_TRUE(Result); 1762 It = VLiveIns[3].find(Var); 1763 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1764 EXPECT_EQ(It->second.ID, LiveInRsp); 1765 // Also check properties come from block 2, the first RPO predecessor to block 1766 // three. 1767 EXPECT_EQ(It->second.Properties, PropsWithIndirect); 1768 JoinedLocs.clear(); 1769 VLiveIns[3].clear(); 1770 1771 // Again, disagreeing properties, this time the expr, should cause a PHI to 1772 // not be eliminated. 1773 DIExpression *NewExpr = DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4); 1774 DbgValueProperties PropsWithExpr(NewExpr, false); 1775 VLiveOuts[1].clear(); 1776 VLiveOuts[2].clear(); 1777 VLiveOuts[1].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1778 VLiveOuts[2].insert({Var, DbgValue(LiveInRsp, PropsWithExpr, DbgValue::Def)}); 1779 VLiveIns[3].insert({Var, DbgValue(3, EmptyProps, DbgValue::VPHI)}); 1780 Result = vlocJoin(*MBB3, VLiveOutIdx, VLiveInIdx, AllVars, 1781 AllBlocks, AllBlocks, JoinedLocs); 1782 EXPECT_FALSE(Result); 1783 It = VLiveIns[3].find(Var); 1784 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1785 EXPECT_EQ(It->second.BlockNo, 3); 1786 EXPECT_EQ(It->second.Properties, EmptyProps); 1787 JoinedLocs.clear(); 1788 VLiveIns[3].clear(); 1789 } 1790 1791 TEST_F(InstrRefLDVTest, vlocJoinLoops) { 1792 setupSimpleLoop(); 1793 // entry 1794 // | 1795 // |/-----\ 1796 // loopblk | 1797 // |\-----/ 1798 // | 1799 // ret 1800 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1801 LocIdx RspLoc(0); 1802 Register RAX = getRegByName("RAX"); 1803 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1804 1805 unsigned EntryBlk = 0, LoopBlk = 1; 1806 1807 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1808 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1809 ValueIDNum RspPHIInBlk1(LoopBlk, 0, RspLoc); 1810 1811 DebugVariable Var(FuncVariable, None, nullptr); 1812 DbgValueProperties EmptyProps(EmptyExpr, false); 1813 SmallVector<DenseMap<DebugVariable, DbgValue>, 32> VLiveOuts, VLiveIns; 1814 VLiveOuts.resize(3); 1815 VLiveIns.resize(3); 1816 InstrRefBasedLDV::LiveIdxT VLiveOutIdx, VLiveInIdx; 1817 VLiveOutIdx[MBB0] = &VLiveOuts[0]; 1818 VLiveOutIdx[MBB1] = &VLiveOuts[1]; 1819 VLiveOutIdx[MBB2] = &VLiveOuts[2]; 1820 VLiveInIdx[MBB0] = &VLiveIns[0]; 1821 VLiveInIdx[MBB1] = &VLiveIns[1]; 1822 VLiveInIdx[MBB2] = &VLiveIns[2]; 1823 1824 SmallPtrSet<const MachineBasicBlock *, 8> AllBlocks; 1825 AllBlocks.insert(MBB0); 1826 AllBlocks.insert(MBB1); 1827 AllBlocks.insert(MBB2); 1828 1829 SmallVector<const MachineBasicBlock *, 2> Preds; 1830 for (const auto *Pred : MBB1->predecessors()) 1831 Preds.push_back(Pred); 1832 1833 SmallSet<DebugVariable, 4> AllVars; 1834 AllVars.insert(Var); 1835 1836 DenseMap<DebugVariable, DbgValue> JoinedLocs; 1837 1838 // Test some back-edge-specific behaviours of vloc join. Mostly: the fact that 1839 // VPHIs that arrive on backedges can be eliminated, despite having different 1840 // values to the predecessor. 1841 1842 // First: when there's no VPHI placed already, propagate the live-in value of 1843 // the first RPO predecessor. 1844 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1845 VLiveOuts[1].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1846 VLiveIns[1].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1847 bool Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1848 AllBlocks, AllBlocks, JoinedLocs); 1849 EXPECT_TRUE(Result); 1850 auto It = VLiveIns[1].find(Var); 1851 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1852 EXPECT_EQ(It->second.ID, LiveInRsp); 1853 JoinedLocs.clear(); 1854 VLiveIns[1].clear(); 1855 1856 // If there is a VPHI: don't elimiante it if there are disagreeing values. 1857 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1858 VLiveOuts[1].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1859 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1860 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1861 AllBlocks, AllBlocks, JoinedLocs); 1862 EXPECT_FALSE(Result); 1863 It = VLiveIns[1].find(Var); 1864 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1865 EXPECT_EQ(It->second.BlockNo, 1); 1866 JoinedLocs.clear(); 1867 VLiveIns[1].clear(); 1868 1869 // If we feed this VPHI back into itself though, we can eliminate it. 1870 VLiveOuts[0].clear(); 1871 VLiveOuts[1].clear(); 1872 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1873 VLiveOuts[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1874 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1875 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1876 AllBlocks, AllBlocks, JoinedLocs); 1877 EXPECT_TRUE(Result); 1878 It = VLiveIns[1].find(Var); 1879 EXPECT_EQ(It->second.Kind, DbgValue::Def); 1880 EXPECT_EQ(It->second.ID, LiveInRsp); 1881 JoinedLocs.clear(); 1882 VLiveIns[1].clear(); 1883 1884 // Don't eliminate backedge VPHIs if the predecessors have different 1885 // properties. 1886 DIExpression *NewExpr = DIExpression::prepend(EmptyExpr, DIExpression::ApplyOffset, 4); 1887 DbgValueProperties PropsWithExpr(NewExpr, false); 1888 VLiveOuts[1].clear(); 1889 VLiveOuts[1].insert({Var, DbgValue(1, PropsWithExpr, DbgValue::VPHI)}); 1890 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1891 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1892 AllBlocks, AllBlocks, JoinedLocs); 1893 EXPECT_FALSE(Result); 1894 It = VLiveIns[1].find(Var); 1895 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1896 EXPECT_EQ(It->second.BlockNo, 1); 1897 JoinedLocs.clear(); 1898 VLiveIns[1].clear(); 1899 1900 // Backedges with VPHIs, but from the wrong block, shouldn't be eliminated. 1901 VLiveOuts[1].clear(); 1902 VLiveOuts[1].insert({Var, DbgValue(0, EmptyProps, DbgValue::VPHI)}); 1903 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1904 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1905 AllBlocks, AllBlocks, JoinedLocs); 1906 EXPECT_FALSE(Result); 1907 It = VLiveIns[1].find(Var); 1908 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1909 EXPECT_EQ(It->second.BlockNo, 1); 1910 JoinedLocs.clear(); 1911 VLiveIns[1].clear(); 1912 } 1913 1914 TEST_F(InstrRefLDVTest, vlocJoinBadlyNestedLoops) { 1915 // Test PHI elimination in the presence of multiple backedges. 1916 setupBadlyNestedLoops(); 1917 // entry 1918 // | 1919 // loop1 -o 1920 // | ^ 1921 // | ^ 1922 // loop2 -o 1923 // | ^ 1924 // | ^ 1925 // loop3 -o 1926 // | 1927 // ret 1928 ASSERT_TRUE(MTracker->getNumLocs() == 1); 1929 LocIdx RspLoc(0); 1930 Register RAX = getRegByName("RAX"); 1931 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 1932 Register RBX = getRegByName("RBX"); 1933 LocIdx RbxLoc = MTracker->lookupOrTrackRegister(RBX); 1934 1935 unsigned EntryBlk = 0; 1936 1937 ValueIDNum LiveInRsp(EntryBlk, 0, RspLoc); 1938 ValueIDNum LiveInRax(EntryBlk, 0, RaxLoc); 1939 ValueIDNum LiveInRbx(EntryBlk, 0, RbxLoc); 1940 1941 DebugVariable Var(FuncVariable, None, nullptr); 1942 DbgValueProperties EmptyProps(EmptyExpr, false); 1943 SmallVector<DenseMap<DebugVariable, DbgValue>, 32> VLiveOuts, VLiveIns; 1944 VLiveOuts.resize(5); 1945 VLiveIns.resize(5); 1946 InstrRefBasedLDV::LiveIdxT VLiveOutIdx, VLiveInIdx; 1947 VLiveOutIdx[MBB0] = &VLiveOuts[0]; 1948 VLiveOutIdx[MBB1] = &VLiveOuts[1]; 1949 VLiveOutIdx[MBB2] = &VLiveOuts[2]; 1950 VLiveOutIdx[MBB3] = &VLiveOuts[3]; 1951 VLiveOutIdx[MBB4] = &VLiveOuts[4]; 1952 VLiveInIdx[MBB0] = &VLiveIns[0]; 1953 VLiveInIdx[MBB1] = &VLiveIns[1]; 1954 VLiveInIdx[MBB2] = &VLiveIns[2]; 1955 VLiveInIdx[MBB3] = &VLiveIns[3]; 1956 VLiveInIdx[MBB4] = &VLiveIns[4]; 1957 1958 SmallPtrSet<const MachineBasicBlock *, 8> AllBlocks; 1959 AllBlocks.insert(MBB0); 1960 AllBlocks.insert(MBB1); 1961 AllBlocks.insert(MBB2); 1962 AllBlocks.insert(MBB3); 1963 AllBlocks.insert(MBB4); 1964 1965 // We're going to focus on block 1. 1966 SmallVector<const MachineBasicBlock *, 3> Preds; 1967 for (const auto *Pred : MBB1->predecessors()) 1968 Preds.push_back(Pred); 1969 1970 SmallSet<DebugVariable, 4> AllVars; 1971 AllVars.insert(Var); 1972 1973 DenseMap<DebugVariable, DbgValue> JoinedLocs; 1974 1975 // Test a normal VPHI isn't eliminated. 1976 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1977 VLiveOuts[1].insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 1978 VLiveOuts[2].insert({Var, DbgValue(LiveInRbx, EmptyProps, DbgValue::Def)}); 1979 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1980 bool Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1981 AllBlocks, AllBlocks, JoinedLocs); 1982 EXPECT_FALSE(Result); 1983 auto It = VLiveIns[1].find(Var); 1984 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 1985 EXPECT_EQ(It->second.BlockNo, 1); 1986 JoinedLocs.clear(); 1987 VLiveIns[1].clear(); 1988 1989 // Common VPHIs on backedges should merge. 1990 VLiveOuts[0].clear(); 1991 VLiveOuts[1].clear(); 1992 VLiveOuts[2].clear(); 1993 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 1994 VLiveOuts[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1995 VLiveOuts[2].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1996 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 1997 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 1998 AllBlocks, AllBlocks, JoinedLocs); 1999 EXPECT_TRUE(Result); 2000 It = VLiveIns[1].find(Var); 2001 EXPECT_EQ(It->second.Kind, DbgValue::Def); 2002 EXPECT_EQ(It->second.ID, LiveInRsp); 2003 JoinedLocs.clear(); 2004 VLiveIns[1].clear(); 2005 2006 // They shouldn't merge if one of their properties is different. 2007 DbgValueProperties PropsWithIndirect(EmptyExpr, true); 2008 VLiveOuts[0].clear(); 2009 VLiveOuts[1].clear(); 2010 VLiveOuts[2].clear(); 2011 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2012 VLiveOuts[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 2013 VLiveOuts[2].insert({Var, DbgValue(1, PropsWithIndirect, DbgValue::VPHI)}); 2014 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 2015 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 2016 AllBlocks, AllBlocks, JoinedLocs); 2017 EXPECT_FALSE(Result); 2018 It = VLiveIns[1].find(Var); 2019 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 2020 EXPECT_EQ(It->second.BlockNo, 1); 2021 JoinedLocs.clear(); 2022 VLiveIns[1].clear(); 2023 2024 // VPHIs from different blocks should not merge. 2025 VLiveOuts[0].clear(); 2026 VLiveOuts[1].clear(); 2027 VLiveOuts[2].clear(); 2028 VLiveOuts[0].insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2029 VLiveOuts[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 2030 VLiveOuts[2].insert({Var, DbgValue(2, EmptyProps, DbgValue::VPHI)}); 2031 VLiveIns[1].insert({Var, DbgValue(1, EmptyProps, DbgValue::VPHI)}); 2032 Result = vlocJoin(*MBB1, VLiveOutIdx, VLiveInIdx, AllVars, 2033 AllBlocks, AllBlocks, JoinedLocs); 2034 EXPECT_FALSE(Result); 2035 It = VLiveIns[1].find(Var); 2036 EXPECT_EQ(It->second.Kind, DbgValue::VPHI); 2037 EXPECT_EQ(It->second.BlockNo, 1); 2038 JoinedLocs.clear(); 2039 VLiveIns[1].clear(); 2040 } 2041 2042 // Above are tests for picking VPHI locations, and eliminating VPHIs. No 2043 // unit-tests are written for evaluating the transfer function as that's 2044 // pretty straight forwards, or applying VPHI-location-picking to live-ins. 2045 // Instead, pre-set some machine locations and apply buildVLocValueMap to the 2046 // existing CFG patterns. 2047 TEST_F(InstrRefLDVTest, VLocSingleBlock) { 2048 setupSingleBlock(); 2049 2050 ASSERT_TRUE(MTracker->getNumLocs() == 1); 2051 LocIdx RspLoc(0); 2052 2053 ValueIDNum InLocs[2], OutLocs[2]; 2054 ValueIDNum *InLocsPtr[1] = {&InLocs[0]}; 2055 ValueIDNum *OutLocsPtr[1] = {&OutLocs[0]}; 2056 2057 ValueIDNum LiveInRsp = ValueIDNum(0, 0, RspLoc); 2058 InLocs[0] = OutLocs[0] = LiveInRsp; 2059 2060 DebugVariable Var(FuncVariable, None, nullptr); 2061 DbgValueProperties EmptyProps(EmptyExpr, false); 2062 2063 SmallSet<DebugVariable, 4> AllVars; 2064 AllVars.insert(Var); 2065 2066 // Mild hack: rather than constructing machine instructions in each block 2067 // and creating lexical scopes across them, instead just tell 2068 // buildVLocValueMap that there's an assignment in every block. That makes 2069 // every block in scope. 2070 SmallPtrSet<MachineBasicBlock *, 4> AssignBlocks; 2071 AssignBlocks.insert(MBB0); 2072 2073 SmallVector<VLocTracker, 1> VLocs; 2074 VLocs.resize(1); 2075 2076 InstrRefBasedLDV::LiveInsT Output; 2077 2078 // Test that, with no assignments at all, no mappings are created for the 2079 // variable in this function. 2080 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2081 OutLocsPtr, InLocsPtr, VLocs); 2082 EXPECT_EQ(Output.size(), 0ul); 2083 2084 // If we put an assignment in the transfer function, that should... well, 2085 // do nothing, because we don't store the live-outs. 2086 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2087 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2088 OutLocsPtr, InLocsPtr, VLocs); 2089 EXPECT_EQ(Output.size(), 0ul); 2090 2091 // There is pretty much nothing else of interest to test with a single block. 2092 // It's not relevant to the SSA-construction parts of variable values. 2093 } 2094 2095 TEST_F(InstrRefLDVTest, VLocDiamondBlocks) { 2096 setupDiamondBlocks(); 2097 // entry 2098 // / \ 2099 // br1 br2 2100 // \ / 2101 // ret 2102 2103 ASSERT_TRUE(MTracker->getNumLocs() == 1); 2104 LocIdx RspLoc(0); 2105 Register RAX = getRegByName("RAX"); 2106 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 2107 2108 unsigned EntryBlk = 0, RetBlk = 3; 2109 2110 ValueIDNum LiveInRsp = ValueIDNum(EntryBlk, 0, RspLoc); 2111 ValueIDNum LiveInRax = ValueIDNum(EntryBlk, 0, RaxLoc); 2112 ValueIDNum RspPHIInBlk3 = ValueIDNum(RetBlk, 0, RspLoc); 2113 2114 ValueIDNum InLocs[4][2], OutLocs[4][2]; 2115 ValueIDNum *InLocsPtr[4] = {InLocs[0], InLocs[1], InLocs[2], InLocs[3]}; 2116 ValueIDNum *OutLocsPtr[4] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3]}; 2117 2118 initValueArray(InLocsPtr, 4, 2); 2119 initValueArray(OutLocsPtr, 4, 2); 2120 2121 DebugVariable Var(FuncVariable, None, nullptr); 2122 DbgValueProperties EmptyProps(EmptyExpr, false); 2123 2124 SmallSet<DebugVariable, 4> AllVars; 2125 AllVars.insert(Var); 2126 2127 // Mild hack: rather than constructing machine instructions in each block 2128 // and creating lexical scopes across them, instead just tell 2129 // buildVLocValueMap that there's an assignment in every block. That makes 2130 // every block in scope. 2131 SmallPtrSet<MachineBasicBlock *, 4> AssignBlocks; 2132 AssignBlocks.insert(MBB0); 2133 AssignBlocks.insert(MBB1); 2134 AssignBlocks.insert(MBB2); 2135 AssignBlocks.insert(MBB3); 2136 2137 SmallVector<VLocTracker, 1> VLocs; 2138 VLocs.resize(4); 2139 2140 InstrRefBasedLDV::LiveInsT Output; 2141 2142 // Start off with LiveInRsp in every location. 2143 for (unsigned int I = 0; I < 4; ++I) { 2144 InLocs[I][0] = InLocs[I][1] = LiveInRsp; 2145 OutLocs[I][0] = OutLocs[I][1] = LiveInRsp; 2146 } 2147 2148 auto ClearOutputs = [&]() { 2149 for (auto &Elem : Output) 2150 Elem.clear(); 2151 }; 2152 Output.resize(4); 2153 2154 // No assignments -> no values. 2155 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2156 OutLocsPtr, InLocsPtr, VLocs); 2157 EXPECT_EQ(Output[0].size(), 0ul); 2158 EXPECT_EQ(Output[1].size(), 0ul); 2159 EXPECT_EQ(Output[2].size(), 0ul); 2160 EXPECT_EQ(Output[3].size(), 0ul); 2161 2162 // An assignment in the end block should also not affect other blocks; or 2163 // produce any live-ins. 2164 VLocs[3].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2165 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2166 OutLocsPtr, InLocsPtr, VLocs); 2167 EXPECT_EQ(Output[0].size(), 0ul); 2168 EXPECT_EQ(Output[1].size(), 0ul); 2169 EXPECT_EQ(Output[2].size(), 0ul); 2170 EXPECT_EQ(Output[3].size(), 0ul); 2171 ClearOutputs(); 2172 2173 // Assignments in either of the side-of-diamond blocks should also not be 2174 // propagated anywhere. 2175 VLocs[3].Vars.clear(); 2176 VLocs[2].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2177 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2178 OutLocsPtr, InLocsPtr, VLocs); 2179 EXPECT_EQ(Output[0].size(), 0ul); 2180 EXPECT_EQ(Output[1].size(), 0ul); 2181 EXPECT_EQ(Output[2].size(), 0ul); 2182 EXPECT_EQ(Output[3].size(), 0ul); 2183 VLocs[2].Vars.clear(); 2184 ClearOutputs(); 2185 2186 VLocs[1].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2187 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2188 OutLocsPtr, InLocsPtr, VLocs); 2189 EXPECT_EQ(Output[0].size(), 0ul); 2190 EXPECT_EQ(Output[1].size(), 0ul); 2191 EXPECT_EQ(Output[2].size(), 0ul); 2192 EXPECT_EQ(Output[3].size(), 0ul); 2193 VLocs[1].Vars.clear(); 2194 ClearOutputs(); 2195 2196 // However: putting an assignment in the first block should propagate variable 2197 // values through to all other blocks, as it dominates. 2198 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2199 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2200 OutLocsPtr, InLocsPtr, VLocs); 2201 EXPECT_EQ(Output[0].size(), 0ul); 2202 ASSERT_EQ(Output[1].size(), 1ul); 2203 ASSERT_EQ(Output[2].size(), 1ul); 2204 ASSERT_EQ(Output[3].size(), 1ul); 2205 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2206 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2207 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2208 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2209 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2210 EXPECT_EQ(Output[3][0].second.ID, LiveInRsp); 2211 ClearOutputs(); 2212 VLocs[0].Vars.clear(); 2213 2214 // Additionally, even if that value isn't available in the register file, it 2215 // should still be propagated, as buildVLocValueMap shouldn't care about 2216 // what's in the registers (except for PHIs). 2217 // values through to all other blocks, as it dominates. 2218 VLocs[0].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2219 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2220 OutLocsPtr, InLocsPtr, VLocs); 2221 EXPECT_EQ(Output[0].size(), 0ul); 2222 ASSERT_EQ(Output[1].size(), 1ul); 2223 ASSERT_EQ(Output[2].size(), 1ul); 2224 ASSERT_EQ(Output[3].size(), 1ul); 2225 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2226 EXPECT_EQ(Output[1][0].second.ID, LiveInRax); 2227 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2228 EXPECT_EQ(Output[2][0].second.ID, LiveInRax); 2229 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2230 EXPECT_EQ(Output[3][0].second.ID, LiveInRax); 2231 ClearOutputs(); 2232 VLocs[0].Vars.clear(); 2233 2234 // We should get a live-in to the merging block, if there are two assigns of 2235 // the same value in either side of the diamond. 2236 VLocs[1].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2237 VLocs[2].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2238 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2239 OutLocsPtr, InLocsPtr, VLocs); 2240 EXPECT_EQ(Output[0].size(), 0ul); 2241 EXPECT_EQ(Output[1].size(), 0ul); 2242 EXPECT_EQ(Output[2].size(), 0ul); 2243 ASSERT_EQ(Output[3].size(), 1ul); 2244 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2245 EXPECT_EQ(Output[3][0].second.ID, LiveInRsp); 2246 ClearOutputs(); 2247 VLocs[1].Vars.clear(); 2248 VLocs[2].Vars.clear(); 2249 2250 // If we assign a value in the entry block, then 'undef' on a branch, we 2251 // shouldn't have a live-in in the merge block. 2252 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2253 VLocs[1].Vars.insert({Var, DbgValue(EmptyProps, DbgValue::Undef)}); 2254 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2255 OutLocsPtr, InLocsPtr, VLocs); 2256 EXPECT_EQ(Output[0].size(), 0ul); 2257 ASSERT_EQ(Output[1].size(), 1ul); 2258 ASSERT_EQ(Output[2].size(), 1ul); 2259 EXPECT_EQ(Output[3].size(), 0ul); 2260 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2261 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2262 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2263 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2264 ClearOutputs(); 2265 VLocs[0].Vars.clear(); 2266 VLocs[1].Vars.clear(); 2267 2268 // Having different values joining into the merge block should mean we have 2269 // no live-in in that block. Block ones LiveInRax value doesn't appear as a 2270 // live-in anywhere, it's block internal. 2271 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2272 VLocs[1].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2273 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2274 OutLocsPtr, InLocsPtr, VLocs); 2275 EXPECT_EQ(Output[0].size(), 0ul); 2276 ASSERT_EQ(Output[1].size(), 1ul); 2277 ASSERT_EQ(Output[2].size(), 1ul); 2278 EXPECT_EQ(Output[3].size(), 0ul); 2279 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2280 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2281 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2282 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2283 ClearOutputs(); 2284 VLocs[0].Vars.clear(); 2285 VLocs[1].Vars.clear(); 2286 2287 // But on the other hand, if there's a location in the register file where 2288 // those two values can be joined, do so. 2289 OutLocs[1][0] = LiveInRax; 2290 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2291 VLocs[1].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2292 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2293 OutLocsPtr, InLocsPtr, VLocs); 2294 EXPECT_EQ(Output[0].size(), 0ul); 2295 ASSERT_EQ(Output[1].size(), 1ul); 2296 ASSERT_EQ(Output[2].size(), 1ul); 2297 ASSERT_EQ(Output[3].size(), 1ul); 2298 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2299 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2300 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2301 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2302 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2303 EXPECT_EQ(Output[3][0].second.ID, RspPHIInBlk3); 2304 ClearOutputs(); 2305 VLocs[0].Vars.clear(); 2306 VLocs[1].Vars.clear(); 2307 } 2308 2309 TEST_F(InstrRefLDVTest, VLocSimpleLoop) { 2310 setupSimpleLoop(); 2311 // entry 2312 // | 2313 // |/-----\ 2314 // loopblk | 2315 // |\-----/ 2316 // | 2317 // ret 2318 2319 ASSERT_TRUE(MTracker->getNumLocs() == 1); 2320 LocIdx RspLoc(0); 2321 Register RAX = getRegByName("RAX"); 2322 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 2323 2324 unsigned EntryBlk = 0, LoopBlk = 1; 2325 2326 ValueIDNum LiveInRsp = ValueIDNum(EntryBlk, 0, RspLoc); 2327 ValueIDNum LiveInRax = ValueIDNum(EntryBlk, 0, RaxLoc); 2328 ValueIDNum RspPHIInBlk1 = ValueIDNum(LoopBlk, 0, RspLoc); 2329 ValueIDNum RspDefInBlk1 = ValueIDNum(LoopBlk, 1, RspLoc); 2330 ValueIDNum RaxPHIInBlk1 = ValueIDNum(LoopBlk, 0, RaxLoc); 2331 2332 ValueIDNum InLocs[3][2], OutLocs[3][2]; 2333 ValueIDNum *InLocsPtr[3] = {InLocs[0], InLocs[1], InLocs[2]}; 2334 ValueIDNum *OutLocsPtr[3] = {OutLocs[0], OutLocs[1], OutLocs[2]}; 2335 2336 initValueArray(InLocsPtr, 3, 2); 2337 initValueArray(OutLocsPtr, 3, 2); 2338 2339 DebugVariable Var(FuncVariable, None, nullptr); 2340 DbgValueProperties EmptyProps(EmptyExpr, false); 2341 2342 SmallSet<DebugVariable, 4> AllVars; 2343 AllVars.insert(Var); 2344 2345 SmallPtrSet<MachineBasicBlock *, 4> AssignBlocks; 2346 AssignBlocks.insert(MBB0); 2347 AssignBlocks.insert(MBB1); 2348 AssignBlocks.insert(MBB2); 2349 2350 SmallVector<VLocTracker, 3> VLocs; 2351 VLocs.resize(3); 2352 2353 InstrRefBasedLDV::LiveInsT Output; 2354 2355 // Start off with LiveInRsp in every location. 2356 for (unsigned int I = 0; I < 3; ++I) { 2357 InLocs[I][0] = InLocs[I][1] = LiveInRsp; 2358 OutLocs[I][0] = OutLocs[I][1] = LiveInRsp; 2359 } 2360 2361 auto ClearOutputs = [&]() { 2362 for (auto &Elem : Output) 2363 Elem.clear(); 2364 }; 2365 Output.resize(3); 2366 2367 // Easy starter: a dominating assign should propagate to all blocks. 2368 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2369 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2370 OutLocsPtr, InLocsPtr, VLocs); 2371 EXPECT_EQ(Output[0].size(), 0ul); 2372 ASSERT_EQ(Output[1].size(), 1ul); 2373 ASSERT_EQ(Output[2].size(), 1ul); 2374 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2375 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2376 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2377 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2378 ClearOutputs(); 2379 VLocs[0].Vars.clear(); 2380 VLocs[1].Vars.clear(); 2381 2382 // Put an undef assignment in the loop. Should get no live-in value. 2383 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2384 VLocs[1].Vars.insert({Var, DbgValue(EmptyProps, DbgValue::Undef)}); 2385 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2386 OutLocsPtr, InLocsPtr, VLocs); 2387 EXPECT_EQ(Output[0].size(), 0ul); 2388 EXPECT_EQ(Output[1].size(), 0ul); 2389 EXPECT_EQ(Output[2].size(), 0ul); 2390 ClearOutputs(); 2391 VLocs[0].Vars.clear(); 2392 VLocs[1].Vars.clear(); 2393 2394 // Assignment of the same value should naturally join. 2395 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2396 VLocs[1].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2397 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2398 OutLocsPtr, InLocsPtr, VLocs); 2399 EXPECT_EQ(Output[0].size(), 0ul); 2400 ASSERT_EQ(Output[1].size(), 1ul); 2401 ASSERT_EQ(Output[2].size(), 1ul); 2402 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2403 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2404 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2405 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2406 ClearOutputs(); 2407 VLocs[0].Vars.clear(); 2408 VLocs[1].Vars.clear(); 2409 2410 // Assignment of different values shouldn't join with no machine PHI vals. 2411 // Will be live-in to exit block as it's dominated. 2412 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2413 VLocs[1].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2414 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2415 OutLocsPtr, InLocsPtr, VLocs); 2416 EXPECT_EQ(Output[0].size(), 0ul); 2417 EXPECT_EQ(Output[1].size(), 0ul); 2418 ASSERT_EQ(Output[2].size(), 1ul); 2419 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2420 EXPECT_EQ(Output[2][0].second.ID, LiveInRax); 2421 ClearOutputs(); 2422 VLocs[0].Vars.clear(); 2423 VLocs[1].Vars.clear(); 2424 2425 // Install a completely unrelated PHI value, that we should not join on. Try 2426 // with unrelated assign in loop block again. 2427 InLocs[1][0] = RspPHIInBlk1; 2428 OutLocs[1][0] = RspDefInBlk1; 2429 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2430 VLocs[1].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2431 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2432 OutLocsPtr, InLocsPtr, VLocs); 2433 EXPECT_EQ(Output[0].size(), 0ul); 2434 EXPECT_EQ(Output[1].size(), 0ul); 2435 ASSERT_EQ(Output[2].size(), 1ul); 2436 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2437 EXPECT_EQ(Output[2][0].second.ID, LiveInRax); 2438 ClearOutputs(); 2439 VLocs[0].Vars.clear(); 2440 VLocs[1].Vars.clear(); 2441 2442 // Now, if we assign RspDefInBlk1 in the loop block, we should be able to 2443 // find the appropriate PHI. 2444 InLocs[1][0] = RspPHIInBlk1; 2445 OutLocs[1][0] = RspDefInBlk1; 2446 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2447 VLocs[1].Vars.insert({Var, DbgValue(RspDefInBlk1, EmptyProps, DbgValue::Def)}); 2448 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2449 OutLocsPtr, InLocsPtr, VLocs); 2450 EXPECT_EQ(Output[0].size(), 0ul); 2451 ASSERT_EQ(Output[1].size(), 1ul); 2452 ASSERT_EQ(Output[2].size(), 1ul); 2453 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2454 EXPECT_EQ(Output[1][0].second.ID, RspPHIInBlk1); 2455 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2456 EXPECT_EQ(Output[2][0].second.ID, RspDefInBlk1); 2457 ClearOutputs(); 2458 VLocs[0].Vars.clear(); 2459 VLocs[1].Vars.clear(); 2460 2461 // If the PHI happens in a different location, the live-in should happen 2462 // there. 2463 InLocs[1][0] = LiveInRsp; 2464 OutLocs[1][0] = LiveInRsp; 2465 InLocs[1][1] = RaxPHIInBlk1; 2466 OutLocs[1][1] = RspDefInBlk1; 2467 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2468 VLocs[1].Vars.insert({Var, DbgValue(RspDefInBlk1, EmptyProps, DbgValue::Def)}); 2469 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2470 OutLocsPtr, InLocsPtr, VLocs); 2471 EXPECT_EQ(Output[0].size(), 0ul); 2472 ASSERT_EQ(Output[1].size(), 1ul); 2473 ASSERT_EQ(Output[2].size(), 1ul); 2474 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2475 EXPECT_EQ(Output[1][0].second.ID, RaxPHIInBlk1); 2476 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2477 EXPECT_EQ(Output[2][0].second.ID, RspDefInBlk1); 2478 ClearOutputs(); 2479 VLocs[0].Vars.clear(); 2480 VLocs[1].Vars.clear(); 2481 2482 // The PHI happening in both places should be handled too. Exactly where 2483 // isn't important, but if the location picked changes, this test will let 2484 // you know. 2485 InLocs[1][0] = RaxPHIInBlk1; 2486 OutLocs[1][0] = RspDefInBlk1; 2487 InLocs[1][1] = RaxPHIInBlk1; 2488 OutLocs[1][1] = RspDefInBlk1; 2489 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2490 VLocs[1].Vars.insert({Var, DbgValue(RspDefInBlk1, EmptyProps, DbgValue::Def)}); 2491 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2492 OutLocsPtr, InLocsPtr, VLocs); 2493 EXPECT_EQ(Output[0].size(), 0ul); 2494 ASSERT_EQ(Output[1].size(), 1ul); 2495 ASSERT_EQ(Output[2].size(), 1ul); 2496 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2497 // Today, the first register is picked. 2498 EXPECT_EQ(Output[1][0].second.ID, RspPHIInBlk1); 2499 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2500 EXPECT_EQ(Output[2][0].second.ID, RspDefInBlk1); 2501 ClearOutputs(); 2502 VLocs[0].Vars.clear(); 2503 VLocs[1].Vars.clear(); 2504 2505 // If the loop block looked a bit like this: 2506 // %0 = PHI %1, %2 2507 // [...] 2508 // DBG_VALUE %0 2509 // Then with instr-ref it becomes: 2510 // DBG_PHI %0 2511 // [...] 2512 // DBG_INSTR_REF 2513 // And we would be feeding a machine PHI-value back around the loop. However: 2514 // this does not mean we can eliminate the variable value PHI and use the 2515 // variable value from the entry block: they are distinct values that must be 2516 // joined at some location by the control flow. 2517 // [This test input would never occur naturally, the machine-PHI would be 2518 // eliminated] 2519 InLocs[1][0] = RspPHIInBlk1; 2520 OutLocs[1][0] = RspPHIInBlk1; 2521 InLocs[1][1] = LiveInRax; 2522 OutLocs[1][1] = LiveInRax; 2523 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2524 VLocs[1].Vars.insert({Var, DbgValue(RspPHIInBlk1, EmptyProps, DbgValue::Def)}); 2525 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2526 OutLocsPtr, InLocsPtr, VLocs); 2527 EXPECT_EQ(Output[0].size(), 0ul); 2528 ASSERT_EQ(Output[1].size(), 1ul); 2529 ASSERT_EQ(Output[2].size(), 1ul); 2530 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2531 EXPECT_EQ(Output[1][0].second.ID, RspPHIInBlk1); 2532 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2533 EXPECT_EQ(Output[2][0].second.ID, RspPHIInBlk1); 2534 ClearOutputs(); 2535 VLocs[0].Vars.clear(); 2536 VLocs[1].Vars.clear(); 2537 2538 // Test that we can eliminate PHIs. A PHI will be placed at the loop head 2539 // because there's a def in in. 2540 InLocs[1][0] = LiveInRsp; 2541 OutLocs[1][0] = LiveInRsp; 2542 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2543 VLocs[1].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2544 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2545 OutLocsPtr, InLocsPtr, VLocs); 2546 EXPECT_EQ(Output[0].size(), 0ul); 2547 ASSERT_EQ(Output[1].size(), 1ul); 2548 ASSERT_EQ(Output[2].size(), 1ul); 2549 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2550 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2551 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2552 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2553 ClearOutputs(); 2554 VLocs[0].Vars.clear(); 2555 VLocs[1].Vars.clear(); 2556 } 2557 2558 // test phi elimination with the nested situation 2559 TEST_F(InstrRefLDVTest, VLocNestedLoop) { 2560 // entry 2561 // | 2562 // loop1 2563 // ^\ 2564 // | \ /-\ 2565 // | loop2 | 2566 // | / \-/ 2567 // ^ / 2568 // join 2569 // | 2570 // ret 2571 setupNestedLoops(); 2572 2573 ASSERT_TRUE(MTracker->getNumLocs() == 1); 2574 LocIdx RspLoc(0); 2575 Register RAX = getRegByName("RAX"); 2576 LocIdx RaxLoc = MTracker->lookupOrTrackRegister(RAX); 2577 2578 unsigned EntryBlk = 0, Loop1Blk = 1, Loop2Blk = 2; 2579 2580 ValueIDNum LiveInRsp = ValueIDNum(EntryBlk, 0, RspLoc); 2581 ValueIDNum LiveInRax = ValueIDNum(EntryBlk, 0, RaxLoc); 2582 ValueIDNum RspPHIInBlk1 = ValueIDNum(Loop1Blk, 0, RspLoc); 2583 ValueIDNum RspPHIInBlk2 = ValueIDNum(Loop2Blk, 0, RspLoc); 2584 ValueIDNum RspDefInBlk2 = ValueIDNum(Loop2Blk, 1, RspLoc); 2585 2586 ValueIDNum InLocs[5][2], OutLocs[5][2]; 2587 ValueIDNum *InLocsPtr[5] = {InLocs[0], InLocs[1], InLocs[2], InLocs[3], InLocs[4]}; 2588 ValueIDNum *OutLocsPtr[5] = {OutLocs[0], OutLocs[1], OutLocs[2], OutLocs[3], OutLocs[4]}; 2589 2590 initValueArray(InLocsPtr, 5, 2); 2591 initValueArray(OutLocsPtr, 5, 2); 2592 2593 DebugVariable Var(FuncVariable, None, nullptr); 2594 DbgValueProperties EmptyProps(EmptyExpr, false); 2595 2596 SmallSet<DebugVariable, 4> AllVars; 2597 AllVars.insert(Var); 2598 2599 SmallPtrSet<MachineBasicBlock *, 5> AssignBlocks; 2600 AssignBlocks.insert(MBB0); 2601 AssignBlocks.insert(MBB1); 2602 AssignBlocks.insert(MBB2); 2603 AssignBlocks.insert(MBB3); 2604 AssignBlocks.insert(MBB4); 2605 2606 SmallVector<VLocTracker, 5> VLocs; 2607 VLocs.resize(5); 2608 2609 InstrRefBasedLDV::LiveInsT Output; 2610 2611 // Start off with LiveInRsp in every location. 2612 for (unsigned int I = 0; I < 5; ++I) { 2613 InLocs[I][0] = InLocs[I][1] = LiveInRsp; 2614 OutLocs[I][0] = OutLocs[I][1] = LiveInRsp; 2615 } 2616 2617 auto ClearOutputs = [&]() { 2618 for (auto &Elem : Output) 2619 Elem.clear(); 2620 }; 2621 Output.resize(5); 2622 2623 // A dominating assign should propagate to all blocks. 2624 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2625 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2626 OutLocsPtr, InLocsPtr, VLocs); 2627 EXPECT_EQ(Output[0].size(), 0ul); 2628 ASSERT_EQ(Output[1].size(), 1ul); 2629 ASSERT_EQ(Output[2].size(), 1ul); 2630 ASSERT_EQ(Output[3].size(), 1ul); 2631 ASSERT_EQ(Output[4].size(), 1ul); 2632 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2633 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2634 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2635 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2636 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2637 EXPECT_EQ(Output[3][0].second.ID, LiveInRsp); 2638 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2639 EXPECT_EQ(Output[4][0].second.ID, LiveInRsp); 2640 ClearOutputs(); 2641 VLocs[0].Vars.clear(); 2642 2643 // Test that an assign in the inner loop causes unresolved PHIs at the heads 2644 // of both loops, and no output location. Dominated blocks do get values. 2645 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2646 VLocs[2].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2647 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2648 OutLocsPtr, InLocsPtr, VLocs); 2649 EXPECT_EQ(Output[0].size(), 0ul); 2650 EXPECT_EQ(Output[1].size(), 0ul); 2651 EXPECT_EQ(Output[2].size(), 0ul); 2652 ASSERT_EQ(Output[3].size(), 1ul); 2653 ASSERT_EQ(Output[4].size(), 1ul); 2654 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2655 EXPECT_EQ(Output[3][0].second.ID, LiveInRax); 2656 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2657 EXPECT_EQ(Output[4][0].second.ID, LiveInRax); 2658 ClearOutputs(); 2659 VLocs[0].Vars.clear(); 2660 VLocs[2].Vars.clear(); 2661 2662 // Same test, but with no assignment in block 0. We should still get values 2663 // in dominated blocks. 2664 VLocs[2].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2665 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2666 OutLocsPtr, InLocsPtr, VLocs); 2667 EXPECT_EQ(Output[0].size(), 0ul); 2668 EXPECT_EQ(Output[1].size(), 0ul); 2669 EXPECT_EQ(Output[2].size(), 0ul); 2670 ASSERT_EQ(Output[3].size(), 1ul); 2671 ASSERT_EQ(Output[4].size(), 1ul); 2672 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2673 EXPECT_EQ(Output[3][0].second.ID, LiveInRax); 2674 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2675 EXPECT_EQ(Output[4][0].second.ID, LiveInRax); 2676 ClearOutputs(); 2677 VLocs[2].Vars.clear(); 2678 2679 // Similarly, assignments in the outer loop gives location to dominated 2680 // blocks, but no PHI locations are found at the outer loop head. 2681 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2682 VLocs[3].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2683 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2684 OutLocsPtr, InLocsPtr, VLocs); 2685 EXPECT_EQ(Output[0].size(), 0ul); 2686 EXPECT_EQ(Output[1].size(), 0ul); 2687 EXPECT_EQ(Output[2].size(), 0ul); 2688 EXPECT_EQ(Output[3].size(), 0ul); 2689 ASSERT_EQ(Output[4].size(), 1ul); 2690 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2691 EXPECT_EQ(Output[4][0].second.ID, LiveInRax); 2692 ClearOutputs(); 2693 VLocs[0].Vars.clear(); 2694 VLocs[3].Vars.clear(); 2695 2696 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2697 VLocs[1].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2698 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2699 OutLocsPtr, InLocsPtr, VLocs); 2700 EXPECT_EQ(Output[0].size(), 0ul); 2701 EXPECT_EQ(Output[1].size(), 0ul); 2702 ASSERT_EQ(Output[2].size(), 1ul); 2703 ASSERT_EQ(Output[3].size(), 1ul); 2704 ASSERT_EQ(Output[4].size(), 1ul); 2705 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2706 EXPECT_EQ(Output[2][0].second.ID, LiveInRax); 2707 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2708 EXPECT_EQ(Output[3][0].second.ID, LiveInRax); 2709 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2710 EXPECT_EQ(Output[4][0].second.ID, LiveInRax); 2711 ClearOutputs(); 2712 VLocs[0].Vars.clear(); 2713 VLocs[1].Vars.clear(); 2714 2715 // With an assignment of the same value in the inner loop, we should work out 2716 // that all PHIs can be eliminated and the same value is live-through the 2717 // whole function. 2718 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2719 VLocs[2].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2720 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2721 OutLocsPtr, InLocsPtr, VLocs); 2722 EXPECT_EQ(Output[0].size(), 0ul); 2723 EXPECT_EQ(Output[1].size(), 1ul); 2724 EXPECT_EQ(Output[2].size(), 1ul); 2725 ASSERT_EQ(Output[3].size(), 1ul); 2726 ASSERT_EQ(Output[4].size(), 1ul); 2727 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2728 EXPECT_EQ(Output[1][0].second.ID, LiveInRsp); 2729 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2730 EXPECT_EQ(Output[2][0].second.ID, LiveInRsp); 2731 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2732 EXPECT_EQ(Output[3][0].second.ID, LiveInRsp); 2733 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2734 EXPECT_EQ(Output[4][0].second.ID, LiveInRsp); 2735 ClearOutputs(); 2736 VLocs[0].Vars.clear(); 2737 VLocs[2].Vars.clear(); 2738 2739 // If we have an assignment in the inner loop, and a PHI for it at the inner 2740 // loop head, we could find a live-in location for the inner loop. But because 2741 // the outer loop has no PHI, we can't find a variable value for outer loop 2742 // head, so can't have a live-in value for the inner loop head. 2743 InLocs[2][0] = RspPHIInBlk2; 2744 OutLocs[2][0] = LiveInRax; 2745 // NB: all other machine locations are LiveInRsp, disallowing a PHI in block 2746 // one. Even though RspPHIInBlk2 isn't available later in the function, we 2747 // should still produce a live-in value. The fact it's unavailable is a 2748 // different concern. 2749 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2750 VLocs[2].Vars.insert({Var, DbgValue(LiveInRax, EmptyProps, DbgValue::Def)}); 2751 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2752 OutLocsPtr, InLocsPtr, VLocs); 2753 EXPECT_EQ(Output[0].size(), 0ul); 2754 EXPECT_EQ(Output[1].size(), 0ul); 2755 EXPECT_EQ(Output[2].size(), 0ul); 2756 ASSERT_EQ(Output[3].size(), 1ul); 2757 ASSERT_EQ(Output[4].size(), 1ul); 2758 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2759 EXPECT_EQ(Output[3][0].second.ID, LiveInRax); 2760 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2761 EXPECT_EQ(Output[4][0].second.ID, LiveInRax); 2762 ClearOutputs(); 2763 VLocs[0].Vars.clear(); 2764 VLocs[2].Vars.clear(); 2765 2766 // Have an assignment in inner loop that can have a PHI resolved; and add a 2767 // machine value PHI to the outer loop head, so that we can find a location 2768 // all the way through the function. 2769 InLocs[1][0] = RspPHIInBlk1; 2770 OutLocs[1][0] = RspPHIInBlk1; 2771 InLocs[2][0] = RspPHIInBlk2; 2772 OutLocs[2][0] = RspDefInBlk2; 2773 InLocs[3][0] = RspDefInBlk2; 2774 OutLocs[3][0] = RspDefInBlk2; 2775 VLocs[0].Vars.insert({Var, DbgValue(LiveInRsp, EmptyProps, DbgValue::Def)}); 2776 VLocs[2].Vars.insert({Var, DbgValue(RspDefInBlk2, EmptyProps, DbgValue::Def)}); 2777 buildVLocValueMap(OutermostLoc, AllVars, AssignBlocks, Output, 2778 OutLocsPtr, InLocsPtr, VLocs); 2779 EXPECT_EQ(Output[0].size(), 0ul); 2780 ASSERT_EQ(Output[1].size(), 1ul); 2781 ASSERT_EQ(Output[2].size(), 1ul); 2782 ASSERT_EQ(Output[3].size(), 1ul); 2783 ASSERT_EQ(Output[4].size(), 1ul); 2784 EXPECT_EQ(Output[1][0].second.Kind, DbgValue::Def); 2785 EXPECT_EQ(Output[1][0].second.ID, RspPHIInBlk1); 2786 EXPECT_EQ(Output[2][0].second.Kind, DbgValue::Def); 2787 EXPECT_EQ(Output[2][0].second.ID, RspPHIInBlk2); 2788 EXPECT_EQ(Output[3][0].second.Kind, DbgValue::Def); 2789 EXPECT_EQ(Output[3][0].second.ID, RspDefInBlk2); 2790 EXPECT_EQ(Output[4][0].second.Kind, DbgValue::Def); 2791 EXPECT_EQ(Output[4][0].second.ID, RspDefInBlk2); 2792 ClearOutputs(); 2793 VLocs[0].Vars.clear(); 2794 VLocs[2].Vars.clear(); 2795 } 2796 2797