1 //===- KnownBitsTest.cpp -------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "GISelMITest.h" 10 #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h" 11 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" 12 13 TEST_F(GISelMITest, TestKnownBitsCst) { 14 StringRef MIRString = " %3:_(s8) = G_CONSTANT i8 1\n" 15 " %4:_(s8) = COPY %3\n"; 16 setUp(MIRString); 17 if (!TM) 18 return; 19 unsigned CopyReg = Copies[Copies.size() - 1]; 20 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); 21 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); 22 GISelKnownBits Info(*MF); 23 KnownBits Res = Info.getKnownBits(SrcReg); 24 EXPECT_EQ((uint64_t)1, Res.One.getZExtValue()); 25 EXPECT_EQ((uint64_t)0xfe, Res.Zero.getZExtValue()); 26 } 27 TEST_F(GISelMITest, TestKnownBitsPtrToIntViceVersa) { 28 StringRef MIRString = " %3:_(s16) = G_CONSTANT i16 256\n" 29 " %4:_(p0) = G_INTTOPTR %3\n" 30 " %5:_(s32) = G_PTRTOINT %4\n" 31 " %6:_(s32) = COPY %5\n"; 32 setUp(MIRString); 33 if (!TM) 34 return; 35 unsigned CopyReg = Copies[Copies.size() - 1]; 36 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); 37 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); 38 GISelKnownBits Info(*MF); 39 KnownBits Res = Info.getKnownBits(SrcReg); 40 EXPECT_EQ(256u, Res.One.getZExtValue()); 41 EXPECT_EQ(0xfffffeffu, Res.Zero.getZExtValue()); 42 } 43 TEST_F(GISelMITest, TestKnownBitsXOR) { 44 StringRef MIRString = " %3:_(s8) = G_CONSTANT i8 4\n" 45 " %4:_(s8) = G_CONSTANT i8 7\n" 46 " %5:_(s8) = G_XOR %3, %4\n" 47 " %6:_(s8) = COPY %5\n"; 48 setUp(MIRString); 49 if (!TM) 50 return; 51 unsigned CopyReg = Copies[Copies.size() - 1]; 52 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); 53 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); 54 GISelKnownBits Info(*MF); 55 KnownBits Res = Info.getKnownBits(SrcReg); 56 EXPECT_EQ(3u, Res.One.getZExtValue()); 57 EXPECT_EQ(252u, Res.Zero.getZExtValue()); 58 } 59 60 TEST_F(GISelMITest, TestKnownBits) { 61 62 StringRef MIR = " %3:_(s32) = G_TRUNC %0\n" 63 " %4:_(s32) = G_TRUNC %1\n" 64 " %5:_(s32) = G_CONSTANT i32 5\n" 65 " %6:_(s32) = G_CONSTANT i32 24\n" 66 " %7:_(s32) = G_CONSTANT i32 28\n" 67 " %14:_(p0) = G_INTTOPTR %7\n" 68 " %16:_(s32) = G_PTRTOINT %14\n" 69 " %8:_(s32) = G_SHL %3, %5\n" 70 " %9:_(s32) = G_SHL %4, %5\n" 71 " %10:_(s32) = G_OR %8, %6\n" 72 " %11:_(s32) = G_OR %9, %16\n" 73 " %12:_(s32) = G_MUL %10, %11\n" 74 " %13:_(s32) = COPY %12\n"; 75 setUp(MIR); 76 if (!TM) 77 return; 78 unsigned CopyReg = Copies[Copies.size() - 1]; 79 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); 80 unsigned SrcReg = FinalCopy->getOperand(1).getReg(); 81 GISelKnownBits Info(*MF); 82 KnownBits Known = Info.getKnownBits(SrcReg); 83 EXPECT_FALSE(Known.hasConflict()); 84 EXPECT_EQ(0u, Known.One.getZExtValue()); 85 EXPECT_EQ(31u, Known.Zero.getZExtValue()); 86 APInt Zeroes = Info.getKnownZeroes(SrcReg); 87 EXPECT_EQ(Known.Zero, Zeroes); 88 } 89