1 //===- llvm/unittest/CodeGen/AArch64SelectionDAGTest.cpp -------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/CodeGen/SelectionDAG.h"
11 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
12 #include "llvm/AsmParser/Parser.h"
13 #include "llvm/CodeGen/MachineModuleInfo.h"
14 #include "llvm/CodeGen/TargetLowering.h"
15 #include "llvm/Support/SourceMgr.h"
16 #include "llvm/Support/TargetRegistry.h"
17 #include "llvm/Support/TargetSelect.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "gtest/gtest.h"
20 
21 using namespace llvm;
22 
23 namespace {
24 
25 class AArch64SelectionDAGTest : public testing::Test {
26 protected:
27   static void SetUpTestCase() {
28     InitializeAllTargets();
29     InitializeAllTargetMCs();
30   }
31 
32   void SetUp() override {
33     StringRef Assembly = "define void @f() { ret void }";
34 
35     Triple TargetTriple("aarch64--");
36     std::string Error;
37     const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
38     // FIXME: These tests do not depend on AArch64 specifically, but we have to
39     // initialize a target. A skeleton Target for unittests would allow us to
40     // always run these tests.
41     if (!T)
42       return;
43 
44     TargetOptions Options;
45     TM = std::unique_ptr<TargetMachine>(T->createTargetMachine(
46         "AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
47     if (!TM)
48       return;
49 
50     SMDiagnostic SMError;
51     M = parseAssemblyString(Assembly, SMError, Context);
52     if (!M)
53       report_fatal_error(SMError.getMessage());
54     M->setDataLayout(TM->createDataLayout());
55 
56     F = M->getFunction("f");
57     if (!F)
58       report_fatal_error("F?");
59 
60     MachineModuleInfo MMI(TM.get());
61 
62     MF = make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F), 0,
63                                       MMI);
64 
65     DAG = make_unique<SelectionDAG>(*TM, CodeGenOpt::None);
66     if (!DAG)
67       report_fatal_error("DAG?");
68     OptimizationRemarkEmitter ORE(F);
69     DAG->init(*MF, ORE, nullptr, nullptr, nullptr);
70   }
71 
72   LLVMContext Context;
73   std::unique_ptr<TargetMachine> TM = nullptr;
74   std::unique_ptr<Module> M;
75   Function *F;
76   std::unique_ptr<MachineFunction> MF;
77   std::unique_ptr<SelectionDAG> DAG;
78 };
79 
80 TEST_F(AArch64SelectionDAGTest, computeKnownBits_ZERO_EXTEND_VECTOR_INREG) {
81   if (!TM)
82     return;
83   SDLoc Loc;
84   auto Int8VT = EVT::getIntegerVT(Context, 8);
85   auto Int16VT = EVT::getIntegerVT(Context, 16);
86   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
87   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
88   auto InVec = DAG->getConstant(0, Loc, InVecVT);
89   auto Op = DAG->getZeroExtendVectorInReg(InVec, Loc, OutVecVT);
90   auto DemandedElts = APInt(4, 15);
91   KnownBits Known;
92   DAG->computeKnownBits(Op, Known, DemandedElts);
93   EXPECT_TRUE(Known.isZero());
94 }
95 
96 TEST_F(AArch64SelectionDAGTest, computeKnownBits_EXTRACT_SUBVECTOR) {
97   if (!TM)
98     return;
99   SDLoc Loc;
100   auto IntVT = EVT::getIntegerVT(Context, 8);
101   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
102   auto IdxVT = EVT::getIntegerVT(Context, 64);
103   auto Vec = DAG->getConstant(0, Loc, VecVT);
104   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
105   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
106   auto DemandedElts = APInt(3, 7);
107   KnownBits Known;
108   DAG->computeKnownBits(Op, Known, DemandedElts);
109   EXPECT_TRUE(Known.isZero());
110 }
111 
112 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_SIGN_EXTEND_VECTOR_INREG) {
113   if (!TM)
114     return;
115   SDLoc Loc;
116   auto Int8VT = EVT::getIntegerVT(Context, 8);
117   auto Int16VT = EVT::getIntegerVT(Context, 16);
118   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
119   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
120   auto InVec = DAG->getConstant(1, Loc, InVecVT);
121   auto Op = DAG->getSignExtendVectorInReg(InVec, Loc, OutVecVT);
122   auto DemandedElts = APInt(4, 15);
123   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 15u);
124 }
125 
126 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_EXTRACT_SUBVECTOR) {
127   if (!TM)
128     return;
129   SDLoc Loc;
130   auto IntVT = EVT::getIntegerVT(Context, 8);
131   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
132   auto IdxVT = EVT::getIntegerVT(Context, 64);
133   auto Vec = DAG->getConstant(1, Loc, VecVT);
134   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
135   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
136   auto DemandedElts = APInt(3, 7);
137   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 7u);
138 }
139 
140 TEST_F(AArch64SelectionDAGTest, SimplifyDemandedVectorElts_EXTRACT_SUBVECTOR) {
141   if (!TM)
142     return;
143 
144   TargetLowering TL(*TM);
145 
146   SDLoc Loc;
147   auto IntVT = EVT::getIntegerVT(Context, 8);
148   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
149   auto IdxVT = EVT::getIntegerVT(Context, 64);
150   auto Vec = DAG->getConstant(1, Loc, VecVT);
151   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
152   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
153   auto DemandedElts = APInt(3, 7);
154   auto KnownUndef = APInt(3, 0);
155   auto KnownZero = APInt(3, 0);
156   TargetLowering::TargetLoweringOpt TLO(*DAG, false, false);
157   EXPECT_EQ(TL.SimplifyDemandedVectorElts(Op, DemandedElts, KnownUndef,
158                                           KnownZero, TLO),
159             false);
160 }
161 
162 } // end anonymous namespace
163