1 //===- llvm/unittest/CodeGen/AArch64SelectionDAGTest.cpp -------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/CodeGen/SelectionDAG.h"
11 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
12 #include "llvm/AsmParser/Parser.h"
13 #include "llvm/CodeGen/MachineModuleInfo.h"
14 #include "llvm/CodeGen/TargetLowering.h"
15 #include "llvm/Support/SourceMgr.h"
16 #include "llvm/Support/TargetRegistry.h"
17 #include "llvm/Support/TargetSelect.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "gtest/gtest.h"
20 
21 using namespace llvm;
22 
23 namespace {
24 
25 class AArch64SelectionDAGTest : public testing::Test {
26 protected:
27   static void SetUpTestCase() {
28     InitializeAllTargets();
29     InitializeAllTargetMCs();
30   }
31 
32   void SetUp() override {
33     StringRef Assembly = "define void @f() { ret void }";
34 
35     Triple TargetTriple("aarch64--");
36     std::string Error;
37     const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
38     // FIXME: These tests do not depend on AArch64 specifically, but we have to
39     // initialize a target. A skeleton Target for unittests would allow us to
40     // always run these tests.
41     if (!T)
42       return;
43 
44     TargetOptions Options;
45     TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
46         T->createTargetMachine("AArch64", "", "", Options, None, None,
47                                CodeGenOpt::Aggressive)));
48     if (!TM)
49       return;
50 
51     SMDiagnostic SMError;
52     M = parseAssemblyString(Assembly, SMError, Context);
53     if (!M)
54       report_fatal_error(SMError.getMessage());
55     M->setDataLayout(TM->createDataLayout());
56 
57     F = M->getFunction("f");
58     if (!F)
59       report_fatal_error("F?");
60 
61     MachineModuleInfo MMI(TM.get());
62 
63     MF = make_unique<MachineFunction>(*F, *TM, *TM->getSubtargetImpl(*F), 0,
64                                       MMI);
65 
66     DAG = make_unique<SelectionDAG>(*TM, CodeGenOpt::None);
67     if (!DAG)
68       report_fatal_error("DAG?");
69     OptimizationRemarkEmitter ORE(F);
70     DAG->init(*MF, ORE, nullptr, nullptr, nullptr);
71   }
72 
73   LLVMContext Context;
74   std::unique_ptr<LLVMTargetMachine> TM;
75   std::unique_ptr<Module> M;
76   Function *F;
77   std::unique_ptr<MachineFunction> MF;
78   std::unique_ptr<SelectionDAG> DAG;
79 };
80 
81 TEST_F(AArch64SelectionDAGTest, computeKnownBits_ZERO_EXTEND_VECTOR_INREG) {
82   if (!TM)
83     return;
84   SDLoc Loc;
85   auto Int8VT = EVT::getIntegerVT(Context, 8);
86   auto Int16VT = EVT::getIntegerVT(Context, 16);
87   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
88   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
89   auto InVec = DAG->getConstant(0, Loc, InVecVT);
90   auto Op = DAG->getNode(ISD::ZERO_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
91   auto DemandedElts = APInt(2, 3);
92   KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
93   EXPECT_TRUE(Known.isZero());
94 }
95 
96 TEST_F(AArch64SelectionDAGTest, computeKnownBits_EXTRACT_SUBVECTOR) {
97   if (!TM)
98     return;
99   SDLoc Loc;
100   auto IntVT = EVT::getIntegerVT(Context, 8);
101   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
102   auto IdxVT = EVT::getIntegerVT(Context, 64);
103   auto Vec = DAG->getConstant(0, Loc, VecVT);
104   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
105   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
106   auto DemandedElts = APInt(3, 7);
107   KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
108   EXPECT_TRUE(Known.isZero());
109 }
110 
111 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_SIGN_EXTEND_VECTOR_INREG) {
112   if (!TM)
113     return;
114   SDLoc Loc;
115   auto Int8VT = EVT::getIntegerVT(Context, 8);
116   auto Int16VT = EVT::getIntegerVT(Context, 16);
117   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
118   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
119   auto InVec = DAG->getConstant(1, Loc, InVecVT);
120   auto Op = DAG->getNode(ISD::SIGN_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
121   auto DemandedElts = APInt(2, 3);
122   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 15u);
123 }
124 
125 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_EXTRACT_SUBVECTOR) {
126   if (!TM)
127     return;
128   SDLoc Loc;
129   auto IntVT = EVT::getIntegerVT(Context, 8);
130   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
131   auto IdxVT = EVT::getIntegerVT(Context, 64);
132   auto Vec = DAG->getConstant(1, Loc, VecVT);
133   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
134   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
135   auto DemandedElts = APInt(3, 7);
136   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 7u);
137 }
138 
139 TEST_F(AArch64SelectionDAGTest, SimplifyDemandedVectorElts_EXTRACT_SUBVECTOR) {
140   if (!TM)
141     return;
142 
143   TargetLowering TL(*TM);
144 
145   SDLoc Loc;
146   auto IntVT = EVT::getIntegerVT(Context, 8);
147   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
148   auto IdxVT = EVT::getIntegerVT(Context, 64);
149   auto Vec = DAG->getConstant(1, Loc, VecVT);
150   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
151   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
152   auto DemandedElts = APInt(3, 7);
153   auto KnownUndef = APInt(3, 0);
154   auto KnownZero = APInt(3, 0);
155   TargetLowering::TargetLoweringOpt TLO(*DAG, false, false);
156   EXPECT_EQ(TL.SimplifyDemandedVectorElts(Op, DemandedElts, KnownUndef,
157                                           KnownZero, TLO),
158             false);
159 }
160 
161 } // end anonymous namespace
162