1 //===-- RegisterAliasingTracker.cpp -----------------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "RegisterAliasing.h"
11 
12 namespace llvm {
13 namespace exegesis {
14 
15 llvm::BitVector getAliasedBits(const llvm::MCRegisterInfo &RegInfo,
16                                const llvm::BitVector &SourceBits) {
17   llvm::BitVector AliasedBits(RegInfo.getNumRegs());
18   for (const size_t PhysReg : SourceBits.set_bits()) {
19     using RegAliasItr = llvm::MCRegAliasIterator;
20     for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid();
21          ++Itr) {
22       AliasedBits.set(*Itr);
23     }
24   }
25   return AliasedBits;
26 }
27 
28 RegisterAliasingTracker::RegisterAliasingTracker(
29     const llvm::MCRegisterInfo &RegInfo)
30     : SourceBits(RegInfo.getNumRegs()), AliasedBits(RegInfo.getNumRegs()),
31       Origins(RegInfo.getNumRegs()) {}
32 
33 RegisterAliasingTracker::RegisterAliasingTracker(
34     const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &ReservedReg,
35     const llvm::MCRegisterClass &RegClass)
36     : RegisterAliasingTracker(RegInfo) {
37   for (llvm::MCPhysReg PhysReg : RegClass)
38     if (!ReservedReg[PhysReg]) // Removing reserved registers.
39       SourceBits.set(PhysReg);
40   FillOriginAndAliasedBits(RegInfo, SourceBits);
41 }
42 
43 RegisterAliasingTracker::RegisterAliasingTracker(
44     const llvm::MCRegisterInfo &RegInfo, const llvm::MCPhysReg PhysReg)
45     : RegisterAliasingTracker(RegInfo) {
46   SourceBits.set(PhysReg);
47   FillOriginAndAliasedBits(RegInfo, SourceBits);
48 }
49 
50 void RegisterAliasingTracker::FillOriginAndAliasedBits(
51     const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &SourceBits) {
52   using RegAliasItr = llvm::MCRegAliasIterator;
53   for (const size_t PhysReg : SourceBits.set_bits()) {
54     for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid();
55          ++Itr) {
56       AliasedBits.set(*Itr);
57       Origins[*Itr] = PhysReg;
58     }
59   }
60 }
61 
62 RegisterAliasingTrackerCache::RegisterAliasingTrackerCache(
63     const llvm::MCRegisterInfo &RegInfo, const llvm::BitVector &ReservedReg)
64     : RegInfo(RegInfo), ReservedReg(ReservedReg),
65       EmptyRegisters(RegInfo.getNumRegs()) {}
66 
67 const RegisterAliasingTracker &
68 RegisterAliasingTrackerCache::getRegister(llvm::MCPhysReg PhysReg) const {
69   auto &Found = Registers[PhysReg];
70   if (!Found)
71     Found.reset(new RegisterAliasingTracker(RegInfo, PhysReg));
72   return *Found;
73 }
74 
75 const RegisterAliasingTracker &
76 RegisterAliasingTrackerCache::getRegisterClass(unsigned RegClassIndex) const {
77   auto &Found = RegisterClasses[RegClassIndex];
78   const auto &RegClass = RegInfo.getRegClass(RegClassIndex);
79   if (!Found)
80     Found.reset(new RegisterAliasingTracker(RegInfo, ReservedReg, RegClass));
81   return *Found;
82 }
83 
84 } // namespace exegesis
85 } // namespace llvm
86