148b7fe02SEvandro Menezes# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2*ff0f407eSEvandro Menezes# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM3
3*ff0f407eSEvandro Menezes# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m4 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM4
4*ff0f407eSEvandro Menezes# RUN: llvm-mca -mtriple=aarch64-linux-gnu -mcpu=exynos-m5 -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,EM5
548b7fe02SEvandro Menezes
648b7fe02SEvandro Menezesscvtf	h0, w0
748b7fe02SEvandro Menezesscvtf	s1, w1
848b7fe02SEvandro Menezesscvtf	d2, x2
948b7fe02SEvandro Menezes
1048b7fe02SEvandro Menezesfcvtzs	w3, h3
1148b7fe02SEvandro Menezesfcvtzs	w4, s4
1248b7fe02SEvandro Menezesfcvtzs	x5, d5
1348b7fe02SEvandro Menezes
1448b7fe02SEvandro Menezesfmov	h6, #2.0
1548b7fe02SEvandro Menezesfmov	s7, #4.0
1648b7fe02SEvandro Menezesfmov	d8, #8.0
1748b7fe02SEvandro Menezes
1848b7fe02SEvandro Menezesfmov	h9, w9
1948b7fe02SEvandro Menezesfmov	s10, w10
2048b7fe02SEvandro Menezesfmov	d11, x11
2148b7fe02SEvandro Menezesfmov	v12.d[1], x12
2248b7fe02SEvandro Menezes
2348b7fe02SEvandro Menezesfmov	w13, h13
2448b7fe02SEvandro Menezesfmov	w14, s14
2548b7fe02SEvandro Menezesfmov	x15, d15
2648b7fe02SEvandro Menezesfmov	x16, v16.d[1]
2748b7fe02SEvandro Menezes
2848b7fe02SEvandro Menezes# ALL:      Iterations:        100
2948b7fe02SEvandro Menezes
3048b7fe02SEvandro Menezes# EM3-NEXT: Instructions:      1200
3148b7fe02SEvandro Menezes# EM3-NEXT: Total Cycles:      405
3248b7fe02SEvandro Menezes# EM3-NEXT: Total uOps:        1400
3348b7fe02SEvandro Menezes
3448b7fe02SEvandro Menezes# EM4-NEXT: Instructions:      1700
3548b7fe02SEvandro Menezes# EM4-NEXT: Total Cycles:      1108
3648b7fe02SEvandro Menezes# EM4-NEXT: Total uOps:        1900
3748b7fe02SEvandro Menezes
3848b7fe02SEvandro Menezes# EM5-NEXT: Instructions:      1700
3948b7fe02SEvandro Menezes# EM5-NEXT: Total Cycles:      1407
4048b7fe02SEvandro Menezes# EM5-NEXT: Total uOps:        1900
4148b7fe02SEvandro Menezes
4248b7fe02SEvandro Menezes# ALL:      Dispatch Width:    6
4348b7fe02SEvandro Menezes
4448b7fe02SEvandro Menezes# EM3-NEXT: uOps Per Cycle:    3.46
4548b7fe02SEvandro Menezes# EM3-NEXT: IPC:               2.96
4648b7fe02SEvandro Menezes# EM3-NEXT: Block RThroughput: 4.0
4748b7fe02SEvandro Menezes
4848b7fe02SEvandro Menezes# EM4-NEXT: uOps Per Cycle:    1.71
4948b7fe02SEvandro Menezes# EM4-NEXT: IPC:               1.53
5048b7fe02SEvandro Menezes# EM4-NEXT: Block RThroughput: 11.0
5148b7fe02SEvandro Menezes
5248b7fe02SEvandro Menezes# EM5-NEXT: uOps Per Cycle:    1.35
5348b7fe02SEvandro Menezes# EM5-NEXT: IPC:               1.21
5448b7fe02SEvandro Menezes# EM5-NEXT: Block RThroughput: 14.0
5548b7fe02SEvandro Menezes
5648b7fe02SEvandro Menezes# ALL:      Instruction Info:
5748b7fe02SEvandro Menezes# ALL-NEXT: [1]: #uOps
5848b7fe02SEvandro Menezes# ALL-NEXT: [2]: Latency
5948b7fe02SEvandro Menezes# ALL-NEXT: [3]: RThroughput
6048b7fe02SEvandro Menezes# ALL-NEXT: [4]: MayLoad
6148b7fe02SEvandro Menezes# ALL-NEXT: [5]: MayStore
6248b7fe02SEvandro Menezes# ALL-NEXT: [6]: HasSideEffects (U)
6348b7fe02SEvandro Menezes
6448b7fe02SEvandro Menezes# EM3:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
6548b7fe02SEvandro Menezes# EM3-NEXT:  1      4     1.00                        scvtf	s1, w1
6648b7fe02SEvandro Menezes# EM3-NEXT:  1      4     1.00                        scvtf	d2, x2
6748b7fe02SEvandro Menezes# EM3-NEXT:  1      3     1.00                        fcvtzs	w4, s4
6848b7fe02SEvandro Menezes# EM3-NEXT:  1      3     1.00                        fcvtzs	x5, d5
6948b7fe02SEvandro Menezes# EM3-NEXT:  1      1     0.33                        fmov	s7, #4.00000000
7048b7fe02SEvandro Menezes# EM3-NEXT:  1      1     0.33                        fmov	d8, #8.00000000
7148b7fe02SEvandro Menezes# EM3-NEXT:  1      1     0.33                        fmov	s10, w10
7248b7fe02SEvandro Menezes# EM3-NEXT:  1      1     0.33                        fmov	d11, x11
7348b7fe02SEvandro Menezes# EM3-NEXT:  2      5     1.00                        fmov	v12.d[1], x12
7448b7fe02SEvandro Menezes# EM3-NEXT:  1      1     0.33                        fmov	w14, s14
7548b7fe02SEvandro Menezes# EM3-NEXT:  1      1     0.33                        fmov	x15, d15
7648b7fe02SEvandro Menezes# EM3-NEXT:  2      5     1.00                        fmov	x16, v16.d[1]
7748b7fe02SEvandro Menezes
7848b7fe02SEvandro Menezes# EM4:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
7948b7fe02SEvandro Menezes# EM4-NEXT:  1      6     1.00                        scvtf	h0, w0
8048b7fe02SEvandro Menezes# EM4-NEXT:  1      6     1.00                        scvtf	s1, w1
8148b7fe02SEvandro Menezes# EM4-NEXT:  1      6     1.00                        scvtf	d2, x2
8248b7fe02SEvandro Menezes# EM4-NEXT:  1      4     1.00                        fcvtzs	w3, h3
8348b7fe02SEvandro Menezes# EM4-NEXT:  1      4     1.00                        fcvtzs	w4, s4
8448b7fe02SEvandro Menezes# EM4-NEXT:  1      4     1.00                        fcvtzs	x5, d5
8548b7fe02SEvandro Menezes# EM4-NEXT:  1      1     0.33                        fmov	h6, #2.00000000
8648b7fe02SEvandro Menezes# EM4-NEXT:  1      1     0.33                        fmov	s7, #4.00000000
8748b7fe02SEvandro Menezes# EM4-NEXT:  1      1     0.33                        fmov	d8, #8.00000000
8848b7fe02SEvandro Menezes# EM4-NEXT:  1      3     1.00                        fmov	h9, w9
8948b7fe02SEvandro Menezes# EM4-NEXT:  1      3     1.00                        fmov	s10, w10
9048b7fe02SEvandro Menezes# EM4-NEXT:  1      3     1.00                        fmov	d11, x11
9148b7fe02SEvandro Menezes# EM4-NEXT:  2      2     1.00                        fmov	v12.d[1], x12
9248b7fe02SEvandro Menezes# EM4-NEXT:  1      4     1.00                        fmov	w13, h13
9348b7fe02SEvandro Menezes# EM4-NEXT:  1      4     1.00                        fmov	w14, s14
9448b7fe02SEvandro Menezes# EM4-NEXT:  1      4     1.00                        fmov	x15, d15
9548b7fe02SEvandro Menezes# EM4-NEXT:  2      5     1.00                        fmov	x16, v16.d[1]
9648b7fe02SEvandro Menezes
9748b7fe02SEvandro Menezes# EM5:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
9848b7fe02SEvandro Menezes# EM5-NEXT:  1      6     1.00                        scvtf	h0, w0
9948b7fe02SEvandro Menezes# EM5-NEXT:  1      6     1.00                        scvtf	s1, w1
10048b7fe02SEvandro Menezes# EM5-NEXT:  1      6     1.00                        scvtf	d2, x2
10148b7fe02SEvandro Menezes# EM5-NEXT:  1      4     1.00                        fcvtzs	w3, h3
10248b7fe02SEvandro Menezes# EM5-NEXT:  1      4     1.00                        fcvtzs	w4, s4
10348b7fe02SEvandro Menezes# EM5-NEXT:  1      4     1.00                        fcvtzs	x5, d5
10448b7fe02SEvandro Menezes# EM5-NEXT:  1      1     0.33                        fmov	h6, #2.00000000
10548b7fe02SEvandro Menezes# EM5-NEXT:  1      1     0.33                        fmov	s7, #4.00000000
10648b7fe02SEvandro Menezes# EM5-NEXT:  1      1     0.33                        fmov	d8, #8.00000000
10748b7fe02SEvandro Menezes# EM5-NEXT:  1      4     1.00                        fmov	h9, w9
10848b7fe02SEvandro Menezes# EM5-NEXT:  1      4     1.00                        fmov	s10, w10
10948b7fe02SEvandro Menezes# EM5-NEXT:  1      4     1.00                        fmov	d11, x11
11048b7fe02SEvandro Menezes# EM5-NEXT:  2      6     1.00                        fmov	v12.d[1], x12
11148b7fe02SEvandro Menezes# EM5-NEXT:  1      3     1.00                        fmov	w13, h13
11248b7fe02SEvandro Menezes# EM5-NEXT:  1      3     1.00                        fmov	w14, s14
11348b7fe02SEvandro Menezes# EM5-NEXT:  1      3     1.00                        fmov	x15, d15
11448b7fe02SEvandro Menezes# EM5-NEXT:  2      5     1.00                        fmov	x16, v16.d[1]
115