1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; Example input for update_llc_test_checks (taken from CodeGen/X86/iabs.ll) 3; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 --check-prefix=X86-NO-CMOV 4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-CMOV 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 6 7define i8 @test_i8(i8 %a) nounwind { 8; X86-LABEL: test_i8: 9; X86: # %bb.0: 10; X86-NEXT: movb {{[0-9]+}}(%esp), %al 11; X86-NEXT: movl %eax, %ecx 12; X86-NEXT: sarb $7, %cl 13; X86-NEXT: addb %cl, %al 14; X86-NEXT: xorb %cl, %al 15; X86-NEXT: retl 16; 17; X64-LABEL: test_i8: 18; X64: # %bb.0: 19; X64-NEXT: # kill: def $edi killed $edi def $rdi 20; X64-NEXT: movl %edi, %ecx 21; X64-NEXT: sarb $7, %cl 22; X64-NEXT: leal (%rdi,%rcx), %eax 23; X64-NEXT: xorb %cl, %al 24; X64-NEXT: # kill: def $al killed $al killed $eax 25; X64-NEXT: retq 26 %tmp1neg = sub i8 0, %a 27 %b = icmp sgt i8 %a, -1 28 %abs = select i1 %b, i8 %a, i8 %tmp1neg 29 ret i8 %abs 30} 31 32define i16 @test_i16(i16 %a) nounwind { 33; X86-NO-CMOV-LABEL: test_i16: 34; X86-NO-CMOV: # %bb.0: 35; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax 36; X86-NO-CMOV-NEXT: movl %eax, %ecx 37; X86-NO-CMOV-NEXT: sarl $15, %ecx 38; X86-NO-CMOV-NEXT: addl %ecx, %eax 39; X86-NO-CMOV-NEXT: xorl %ecx, %eax 40; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax 41; X86-NO-CMOV-NEXT: retl 42; 43; X86-CMOV-LABEL: test_i16: 44; X86-CMOV: # %bb.0: 45; X86-CMOV-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 46; X86-CMOV-NEXT: movl %ecx, %eax 47; X86-CMOV-NEXT: negw %ax 48; X86-CMOV-NEXT: cmovlw %cx, %ax 49; X86-CMOV-NEXT: retl 50; 51; X64-LABEL: test_i16: 52; X64: # %bb.0: 53; X64-NEXT: movl %edi, %eax 54; X64-NEXT: negw %ax 55; X64-NEXT: cmovlw %di, %ax 56; X64-NEXT: retq 57 %tmp1neg = sub i16 0, %a 58 %b = icmp sgt i16 %a, -1 59 %abs = select i1 %b, i16 %a, i16 %tmp1neg 60 ret i16 %abs 61} 62 63define i32 @test_i32(i32 %a) nounwind { 64; X86-NO-CMOV-LABEL: test_i32: 65; X86-NO-CMOV: # %bb.0: 66; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax 67; X86-NO-CMOV-NEXT: movl %eax, %ecx 68; X86-NO-CMOV-NEXT: sarl $31, %ecx 69; X86-NO-CMOV-NEXT: addl %ecx, %eax 70; X86-NO-CMOV-NEXT: xorl %ecx, %eax 71; X86-NO-CMOV-NEXT: retl 72; 73; X86-CMOV-LABEL: test_i32: 74; X86-CMOV: # %bb.0: 75; X86-CMOV-NEXT: movl {{[0-9]+}}(%esp), %ecx 76; X86-CMOV-NEXT: movl %ecx, %eax 77; X86-CMOV-NEXT: negl %eax 78; X86-CMOV-NEXT: cmovll %ecx, %eax 79; X86-CMOV-NEXT: retl 80; 81; X64-LABEL: test_i32: 82; X64: # %bb.0: 83; X64-NEXT: movl %edi, %eax 84; X64-NEXT: negl %eax 85; X64-NEXT: cmovll %edi, %eax 86; X64-NEXT: retq 87 %tmp1neg = sub i32 0, %a 88 %b = icmp sgt i32 %a, -1 89 %abs = select i1 %b, i32 %a, i32 %tmp1neg 90 ret i32 %abs 91} 92 93define i64 @test_i64(i64 %a) nounwind { 94; X86-LABEL: test_i64: 95; X86: # %bb.0: 96; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 97; X86-NEXT: movl %edx, %ecx 98; X86-NEXT: sarl $31, %ecx 99; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 100; X86-NEXT: addl %ecx, %eax 101; X86-NEXT: adcl %ecx, %edx 102; X86-NEXT: xorl %ecx, %edx 103; X86-NEXT: xorl %ecx, %eax 104; X86-NEXT: retl 105; 106; X64-LABEL: test_i64: 107; X64: # %bb.0: 108; X64-NEXT: movq %rdi, %rax 109; X64-NEXT: negq %rax 110; X64-NEXT: cmovlq %rdi, %rax 111; X64-NEXT: retq 112 %tmp1neg = sub i64 0, %a 113 %b = icmp sgt i64 %a, -1 114 %abs = select i1 %b, i64 %a, i64 %tmp1neg 115 ret i64 %abs 116} 117