1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
3; RUN: opt -S -data-layout="p:32:32-p1:16:16" -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=DL %s
4
5declare void @foo1()
6
7declare void @foo2()
8
9define void @test1(i32 %V) {
10; CHECK-LABEL: @test1(
11; CHECK-NEXT:    switch i32 [[V:%.*]], label [[F:%.*]] [
12; CHECK-NEXT:    i32 17, label [[T:%.*]]
13; CHECK-NEXT:    i32 4, label [[T]]
14; CHECK-NEXT:    ]
15; CHECK:       common.ret:
16; CHECK-NEXT:    ret void
17; CHECK:       T:
18; CHECK-NEXT:    call void @foo1()
19; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
20; CHECK:       F:
21; CHECK-NEXT:    call void @foo2()
22; CHECK-NEXT:    br label [[COMMON_RET]]
23;
24  %C1 = icmp eq i32 %V, 4         ; <i1> [#uses=1]
25  %C2 = icmp eq i32 %V, 17                ; <i1> [#uses=1]
26  %CN = or i1 %C1, %C2            ; <i1> [#uses=1]
27  br i1 %CN, label %T, label %F
28T:              ; preds = %0
29  call void @foo1( )
30  ret void
31F:              ; preds = %0
32  call void @foo2( )
33  ret void
34}
35
36define void @test1_select(i32 %V) {
37; CHECK-LABEL: @test1_select(
38; CHECK-NEXT:    switch i32 [[V:%.*]], label [[F:%.*]] [
39; CHECK-NEXT:    i32 17, label [[T:%.*]]
40; CHECK-NEXT:    i32 4, label [[T]]
41; CHECK-NEXT:    ]
42; CHECK:       common.ret:
43; CHECK-NEXT:    ret void
44; CHECK:       T:
45; CHECK-NEXT:    call void @foo1()
46; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
47; CHECK:       F:
48; CHECK-NEXT:    call void @foo2()
49; CHECK-NEXT:    br label [[COMMON_RET]]
50;
51  %C1 = icmp eq i32 %V, 4
52  %C2 = icmp eq i32 %V, 17
53  %CN = select i1 %C1, i1 true, i1 %C2
54  br i1 %CN, label %T, label %F
55T:
56  call void @foo1( )
57  ret void
58F:
59  call void @foo2( )
60  ret void
61}
62
63define void @test1_ptr(i32* %V) {
64; DL-LABEL: @test1_ptr(
65; DL-NEXT:    [[MAGICPTR:%.*]] = ptrtoint i32* [[V:%.*]] to i32
66; DL-NEXT:    switch i32 [[MAGICPTR]], label [[F:%.*]] [
67; DL-NEXT:    i32 17, label [[T:%.*]]
68; DL-NEXT:    i32 4, label [[T]]
69; DL-NEXT:    ]
70; DL:       common.ret:
71; DL-NEXT:    ret void
72; DL:       T:
73; DL-NEXT:    call void @foo1()
74; DL-NEXT:    br label [[COMMON_RET:%.*]]
75; DL:       F:
76; DL-NEXT:    call void @foo2()
77; DL-NEXT:    br label [[COMMON_RET]]
78;
79  %C1 = icmp eq i32* %V, inttoptr (i32 4 to i32*)
80  %C2 = icmp eq i32* %V, inttoptr (i32 17 to i32*)
81  %CN = or i1 %C1, %C2            ; <i1> [#uses=1]
82  br i1 %CN, label %T, label %F
83T:              ; preds = %0
84  call void @foo1( )
85  ret void
86F:              ; preds = %0
87  call void @foo2( )
88  ret void
89}
90
91define void @test1_ptr_as1(i32 addrspace(1)* %V) {
92; DL-LABEL: @test1_ptr_as1(
93; DL-NEXT:    [[MAGICPTR:%.*]] = ptrtoint i32 addrspace(1)* [[V:%.*]] to i16
94; DL-NEXT:    switch i16 [[MAGICPTR]], label [[F:%.*]] [
95; DL-NEXT:    i16 17, label [[T:%.*]]
96; DL-NEXT:    i16 4, label [[T]]
97; DL-NEXT:    ]
98; DL:       common.ret:
99; DL-NEXT:    ret void
100; DL:       T:
101; DL-NEXT:    call void @foo1()
102; DL-NEXT:    br label [[COMMON_RET:%.*]]
103; DL:       F:
104; DL-NEXT:    call void @foo2()
105; DL-NEXT:    br label [[COMMON_RET]]
106;
107  %C1 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 4 to i32 addrspace(1)*)
108  %C2 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 17 to i32 addrspace(1)*)
109  %CN = or i1 %C1, %C2            ; <i1> [#uses=1]
110  br i1 %CN, label %T, label %F
111T:              ; preds = %0
112  call void @foo1( )
113  ret void
114F:              ; preds = %0
115  call void @foo2( )
116  ret void
117}
118
119define void @test2(i32 %V) {
120; CHECK-LABEL: @test2(
121; CHECK-NEXT:    switch i32 [[V:%.*]], label [[T:%.*]] [
122; CHECK-NEXT:    i32 17, label [[F:%.*]]
123; CHECK-NEXT:    i32 4, label [[F]]
124; CHECK-NEXT:    ]
125; CHECK:       common.ret:
126; CHECK-NEXT:    ret void
127; CHECK:       T:
128; CHECK-NEXT:    call void @foo1()
129; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
130; CHECK:       F:
131; CHECK-NEXT:    call void @foo2()
132; CHECK-NEXT:    br label [[COMMON_RET]]
133;
134  %C1 = icmp ne i32 %V, 4         ; <i1> [#uses=1]
135  %C2 = icmp ne i32 %V, 17                ; <i1> [#uses=1]
136  %CN = and i1 %C1, %C2           ; <i1> [#uses=1]
137  br i1 %CN, label %T, label %F
138T:              ; preds = %0
139  call void @foo1( )
140  ret void
141F:              ; preds = %0
142  call void @foo2( )
143  ret void
144}
145
146define void @test2_select(i32 %V) {
147; CHECK-LABEL: @test2_select(
148; CHECK-NEXT:    switch i32 [[V:%.*]], label [[T:%.*]] [
149; CHECK-NEXT:    i32 17, label [[F:%.*]]
150; CHECK-NEXT:    i32 4, label [[F]]
151; CHECK-NEXT:    ]
152; CHECK:       common.ret:
153; CHECK-NEXT:    ret void
154; CHECK:       T:
155; CHECK-NEXT:    call void @foo1()
156; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
157; CHECK:       F:
158; CHECK-NEXT:    call void @foo2()
159; CHECK-NEXT:    br label [[COMMON_RET]]
160;
161  %C1 = icmp ne i32 %V, 4
162  %C2 = icmp ne i32 %V, 17
163  %CN = select i1 %C1, i1 %C2, i1 false
164  br i1 %CN, label %T, label %F
165T:
166  call void @foo1( )
167  ret void
168F:
169  call void @foo2( )
170  ret void
171}
172
173define void @test3(i32 %V) {
174; CHECK-LABEL: @test3(
175; CHECK-NEXT:    switch i32 [[V:%.*]], label [[F:%.*]] [
176; CHECK-NEXT:    i32 4, label [[T:%.*]]
177; CHECK-NEXT:    i32 17, label [[T]]
178; CHECK-NEXT:    ]
179; CHECK:       common.ret:
180; CHECK-NEXT:    ret void
181; CHECK:       T:
182; CHECK-NEXT:    call void @foo1()
183; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
184; CHECK:       F:
185; CHECK-NEXT:    call void @foo2()
186; CHECK-NEXT:    br label [[COMMON_RET]]
187;
188  %C1 = icmp eq i32 %V, 4         ; <i1> [#uses=1]
189  br i1 %C1, label %T, label %N
190N:              ; preds = %0
191  %C2 = icmp eq i32 %V, 17                ; <i1> [#uses=1]
192  br i1 %C2, label %T, label %F
193T:              ; preds = %N, %0
194  call void @foo1( )
195  ret void
196F:              ; preds = %N
197  call void @foo2( )
198  ret void
199
200}
201
202
203
204define i32 @test4(i8 zeroext %c) nounwind ssp noredzone {
205; CHECK-LABEL: @test4(
206; CHECK-NEXT:  entry:
207; CHECK-NEXT:    switch i8 [[C:%.*]], label [[LOR_RHS:%.*]] [
208; CHECK-NEXT:    i8 62, label [[LOR_END:%.*]]
209; CHECK-NEXT:    i8 34, label [[LOR_END]]
210; CHECK-NEXT:    i8 92, label [[LOR_END]]
211; CHECK-NEXT:    ]
212; CHECK:       lor.rhs:
213; CHECK-NEXT:    br label [[LOR_END]]
214; CHECK:       lor.end:
215; CHECK-NEXT:    [[TMP0:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ]
216; CHECK-NEXT:    [[LOR_EXT:%.*]] = zext i1 [[TMP0]] to i32
217; CHECK-NEXT:    ret i32 [[LOR_EXT]]
218;
219entry:
220  %cmp = icmp eq i8 %c, 62
221  br i1 %cmp, label %lor.end, label %lor.lhs.false
222
223lor.lhs.false:                                    ; preds = %entry
224  %cmp4 = icmp eq i8 %c, 34
225  br i1 %cmp4, label %lor.end, label %lor.rhs
226
227lor.rhs:                                          ; preds = %lor.lhs.false
228  %cmp8 = icmp eq i8 %c, 92
229  br label %lor.end
230
231lor.end:                                          ; preds = %lor.rhs, %lor.lhs.false, %entry
232  %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ]
233  %lor.ext = zext i1 %0 to i32
234  ret i32 %lor.ext
235
236}
237
238define i32 @test5(i8 zeroext %c) nounwind ssp noredzone {
239; CHECK-LABEL: @test5(
240; CHECK-NEXT:  entry:
241; CHECK-NEXT:    switch i8 [[C:%.*]], label [[LOR_RHS:%.*]] [
242; CHECK-NEXT:    i8 62, label [[LOR_END:%.*]]
243; CHECK-NEXT:    i8 34, label [[LOR_END]]
244; CHECK-NEXT:    i8 92, label [[LOR_END]]
245; CHECK-NEXT:    ]
246; CHECK:       lor.rhs:
247; CHECK-NEXT:    br label [[LOR_END]]
248; CHECK:       lor.end:
249; CHECK-NEXT:    [[TMP0:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ]
250; CHECK-NEXT:    [[LOR_EXT:%.*]] = zext i1 [[TMP0]] to i32
251; CHECK-NEXT:    ret i32 [[LOR_EXT]]
252;
253entry:
254  switch i8 %c, label %lor.rhs [
255  i8 62, label %lor.end
256  i8 34, label %lor.end
257  i8 92, label %lor.end
258  ]
259
260lor.rhs:                                          ; preds = %entry
261  %V = icmp eq i8 %c, 92
262  br label %lor.end
263
264lor.end:                                          ; preds = %entry, %entry, %entry, %lor.rhs
265  %0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ]
266  %lor.ext = zext i1 %0 to i32
267  ret i32 %lor.ext
268}
269
270
271define i1 @test6({ i32, i32 }* %I) {
272; CHECK-LABEL: @test6(
273; CHECK-NEXT:  entry:
274; CHECK-NEXT:    [[TMP_1_I:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[I:%.*]], i64 0, i32 1
275; CHECK-NEXT:    [[TMP_2_I:%.*]] = load i32, i32* [[TMP_1_I]], align 4
276; CHECK-NEXT:    [[TMP_2_I_OFF:%.*]] = add i32 [[TMP_2_I]], -14
277; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i32 [[TMP_2_I_OFF]], 6
278; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false
279; CHECK-NEXT:    ret i1 [[SPEC_SELECT]]
280;
281entry:
282  %tmp.1.i = getelementptr { i32, i32 }, { i32, i32 }* %I, i64 0, i32 1         ; <i32*> [#uses=1]
283  %tmp.2.i = load i32, i32* %tmp.1.i           ; <i32> [#uses=6]
284  %tmp.2 = icmp eq i32 %tmp.2.i, 14               ; <i1> [#uses=1]
285  br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
286shortcirc_next.0:               ; preds = %entry
287  %tmp.6 = icmp eq i32 %tmp.2.i, 15               ; <i1> [#uses=1]
288  br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1
289shortcirc_next.1:               ; preds = %shortcirc_next.0
290  %tmp.11 = icmp eq i32 %tmp.2.i, 16              ; <i1> [#uses=1]
291  br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2
292shortcirc_next.2:               ; preds = %shortcirc_next.1
293  %tmp.16 = icmp eq i32 %tmp.2.i, 17              ; <i1> [#uses=1]
294  br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3
295shortcirc_next.3:               ; preds = %shortcirc_next.2
296  %tmp.21 = icmp eq i32 %tmp.2.i, 18              ; <i1> [#uses=1]
297  br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4
298shortcirc_next.4:               ; preds = %shortcirc_next.3
299  %tmp.26 = icmp eq i32 %tmp.2.i, 19              ; <i1> [#uses=1]
300  br label %UnifiedReturnBlock
301shortcirc_done.4:               ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry
302  br label %UnifiedReturnBlock
303UnifiedReturnBlock:             ; preds = %shortcirc_done.4, %shortcirc_next.4
304  %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ]             ; <i1> [#uses=1]
305  ret i1 %UnifiedRetVal
306
307}
308
309define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
310; CHECK-LABEL: @test7(
311; CHECK-NEXT:  entry:
312; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 32
313; CHECK-NEXT:    br i1 [[CMP]], label [[IF_THEN:%.*]], label [[SWITCH_EARLY_TEST:%.*]]
314; CHECK:       switch.early.test:
315; CHECK-NEXT:    switch i8 [[C:%.*]], label [[COMMON_RET:%.*]] [
316; CHECK-NEXT:    i8 99, label [[IF_THEN]]
317; CHECK-NEXT:    i8 97, label [[IF_THEN]]
318; CHECK-NEXT:    ]
319; CHECK:       common.ret:
320; CHECK-NEXT:    ret void
321; CHECK:       if.then:
322; CHECK-NEXT:    tail call void @foo1() #[[ATTR2:[0-9]+]]
323; CHECK-NEXT:    br label [[COMMON_RET]]
324;
325entry:
326  %cmp = icmp ult i32 %x, 32
327  %cmp4 = icmp eq i8 %c, 97
328  %or.cond = or i1 %cmp, %cmp4
329  %cmp9 = icmp eq i8 %c, 99
330  %or.cond11 = or i1 %or.cond, %cmp9
331  br i1 %or.cond11, label %if.then, label %if.end
332
333if.then:                                          ; preds = %entry
334  tail call void @foo1() nounwind noredzone
335  ret void
336
337if.end:                                           ; preds = %entry
338  ret void
339
340}
341
342define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind ssp noredzone {
343; CHECK-LABEL: @test8(
344; CHECK-NEXT:  entry:
345; CHECK-NEXT:    br i1 [[C:%.*]], label [[N:%.*]], label [[IF_THEN:%.*]]
346; CHECK:       N:
347; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 32
348; CHECK-NEXT:    br i1 [[CMP]], label [[IF_THEN]], label [[SWITCH_EARLY_TEST:%.*]]
349; CHECK:       switch.early.test:
350; CHECK-NEXT:    switch i8 [[C:%.*]], label [[COMMON_RET:%.*]] [
351; CHECK-NEXT:    i8 99, label [[IF_THEN]]
352; CHECK-NEXT:    i8 97, label [[IF_THEN]]
353; CHECK-NEXT:    ]
354; CHECK:       common.ret:
355; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = phi i32 [ [[A:%.*]], [[IF_THEN]] ], [ 0, [[SWITCH_EARLY_TEST]] ]
356; CHECK-NEXT:    ret i32 [[COMMON_RET_OP]]
357; CHECK:       if.then:
358; CHECK-NEXT:    [[A]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 42, [[SWITCH_EARLY_TEST]] ], [ 42, [[N]] ], [ 42, [[SWITCH_EARLY_TEST]] ]
359; CHECK-NEXT:    tail call void @foo1() #[[ATTR2]]
360; CHECK-NEXT:    br label [[COMMON_RET]]
361;
362entry:
363  br i1 %C, label %N, label %if.then
364N:
365  %cmp = icmp ult i32 %x, 32
366  %cmp4 = icmp eq i8 %c, 97
367  %or.cond = or i1 %cmp, %cmp4
368  %cmp9 = icmp eq i8 %c, 99
369  %or.cond11 = or i1 %or.cond, %cmp9
370  br i1 %or.cond11, label %if.then, label %if.end
371
372if.then:                                          ; preds = %entry
373  %A = phi i32 [0, %entry], [42, %N]
374  tail call void @foo1() nounwind noredzone
375  ret i32 %A
376
377if.end:                                           ; preds = %entry
378  ret i32 0
379
380}
381
382;; This is "Example 7" from http://blog.regehr.org/archives/320
383define i32 @test9(i8 zeroext %c) nounwind ssp noredzone {
384; CHECK-LABEL: @test9(
385; CHECK-NEXT:  entry:
386; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[C:%.*]], 33
387; CHECK-NEXT:    br i1 [[CMP]], label [[LOR_END:%.*]], label [[SWITCH_EARLY_TEST:%.*]]
388; CHECK:       switch.early.test:
389; CHECK-NEXT:    switch i8 [[C]], label [[LOR_RHS:%.*]] [
390; CHECK-NEXT:    i8 92, label [[LOR_END]]
391; CHECK-NEXT:    i8 62, label [[LOR_END]]
392; CHECK-NEXT:    i8 60, label [[LOR_END]]
393; CHECK-NEXT:    i8 59, label [[LOR_END]]
394; CHECK-NEXT:    i8 58, label [[LOR_END]]
395; CHECK-NEXT:    i8 46, label [[LOR_END]]
396; CHECK-NEXT:    i8 44, label [[LOR_END]]
397; CHECK-NEXT:    i8 34, label [[LOR_END]]
398; CHECK-NEXT:    i8 39, label [[LOR_END]]
399; CHECK-NEXT:    ]
400; CHECK:       lor.rhs:
401; CHECK-NEXT:    br label [[LOR_END]]
402; CHECK:       lor.end:
403; CHECK-NEXT:    [[TMP0:%.*]] = phi i1 [ true, [[SWITCH_EARLY_TEST]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY:%.*]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ]
404; CHECK-NEXT:    [[CONV46:%.*]] = zext i1 [[TMP0]] to i32
405; CHECK-NEXT:    ret i32 [[CONV46]]
406;
407entry:
408  %cmp = icmp ult i8 %c, 33
409  br i1 %cmp, label %lor.end, label %lor.lhs.false
410
411lor.lhs.false:                                    ; preds = %entry
412  %cmp4 = icmp eq i8 %c, 46
413  br i1 %cmp4, label %lor.end, label %lor.lhs.false6
414
415lor.lhs.false6:                                   ; preds = %lor.lhs.false
416  %cmp9 = icmp eq i8 %c, 44
417  br i1 %cmp9, label %lor.end, label %lor.lhs.false11
418
419lor.lhs.false11:                                  ; preds = %lor.lhs.false6
420  %cmp14 = icmp eq i8 %c, 58
421  br i1 %cmp14, label %lor.end, label %lor.lhs.false16
422
423lor.lhs.false16:                                  ; preds = %lor.lhs.false11
424  %cmp19 = icmp eq i8 %c, 59
425  br i1 %cmp19, label %lor.end, label %lor.lhs.false21
426
427lor.lhs.false21:                                  ; preds = %lor.lhs.false16
428  %cmp24 = icmp eq i8 %c, 60
429  br i1 %cmp24, label %lor.end, label %lor.lhs.false26
430
431lor.lhs.false26:                                  ; preds = %lor.lhs.false21
432  %cmp29 = icmp eq i8 %c, 62
433  br i1 %cmp29, label %lor.end, label %lor.lhs.false31
434
435lor.lhs.false31:                                  ; preds = %lor.lhs.false26
436  %cmp34 = icmp eq i8 %c, 34
437  br i1 %cmp34, label %lor.end, label %lor.lhs.false36
438
439lor.lhs.false36:                                  ; preds = %lor.lhs.false31
440  %cmp39 = icmp eq i8 %c, 92
441  br i1 %cmp39, label %lor.end, label %lor.rhs
442
443lor.rhs:                                          ; preds = %lor.lhs.false36
444  %cmp43 = icmp eq i8 %c, 39
445  br label %lor.end
446
447lor.end:                                          ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.false31, %lor.lhs.false26, %lor.lhs.false21, %lor.lhs.false16, %lor.lhs.false11, %lor.lhs.false6, %lor.lhs.false, %entry
448  %0 = phi i1 [ true, %lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false21 ], [ true, %lor.lhs.false16 ], [ true, %lor.lhs.false11 ], [ true, %lor.lhs.false6 ], [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp43, %lor.rhs ]
449  %conv46 = zext i1 %0 to i32
450  ret i32 %conv46
451
452
453}
454
455define i32 @test10(i32 %mode, i1 %Cond) {
456; CHECK-LABEL: @test10(
457; CHECK-NEXT:    br i1 [[COND:%.*]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]]
458; CHECK:       switch.early.test:
459; CHECK-NEXT:    switch i32 [[MODE:%.*]], label [[T:%.*]] [
460; CHECK-NEXT:    i32 51, label [[F]]
461; CHECK-NEXT:    i32 0, label [[F]]
462; CHECK-NEXT:    ]
463; CHECK:       common.ret:
464; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ]
465; CHECK-NEXT:    ret i32 [[COMMON_RET_OP]]
466; CHECK:       T:
467; CHECK-NEXT:    call void @foo1()
468; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
469; CHECK:       F:
470; CHECK-NEXT:    call void @foo2()
471; CHECK-NEXT:    br label [[COMMON_RET]]
472;
473  %A = icmp ne i32 %mode, 0
474  %B = icmp ne i32 %mode, 51
475  %C = and i1 %A, %B
476  %D = and i1 %C, %Cond
477  br i1 %D, label %T, label %F
478T:
479  call void @foo1()
480  ret i32 123
481F:
482  call void @foo2()
483  ret i32 324
484
485}
486
487define i32 @test10_select(i32 %mode, i1 %Cond) {
488; CHECK-LABEL: @test10_select(
489; CHECK-NEXT:    br i1 [[COND:%.*]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]]
490; CHECK:       switch.early.test:
491; CHECK-NEXT:    switch i32 [[MODE:%.*]], label [[T:%.*]] [
492; CHECK-NEXT:    i32 51, label [[F]]
493; CHECK-NEXT:    i32 0, label [[F]]
494; CHECK-NEXT:    ]
495; CHECK:       common.ret:
496; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ]
497; CHECK-NEXT:    ret i32 [[COMMON_RET_OP]]
498; CHECK:       T:
499; CHECK-NEXT:    call void @foo1()
500; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
501; CHECK:       F:
502; CHECK-NEXT:    call void @foo2()
503; CHECK-NEXT:    br label [[COMMON_RET]]
504;
505  %A = icmp ne i32 %mode, 0
506  %B = icmp ne i32 %mode, 51
507  %C = select i1 %A, i1 %B, i1 false
508  %D = select i1 %C, i1 %Cond, i1 false
509  br i1 %D, label %T, label %F
510T:
511  call void @foo1()
512  ret i32 123
513F:
514  call void @foo2()
515  ret i32 324
516
517}
518
519; TODO: %Cond doesn't need freeze
520define i32 @test10_select_and(i32 %mode, i1 %Cond) {
521; CHECK-LABEL: @test10_select_and(
522; CHECK-NEXT:    br i1 [[COND:%.*]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]]
523; CHECK:       switch.early.test:
524; CHECK-NEXT:    switch i32 [[MODE:%.*]], label [[T:%.*]] [
525; CHECK-NEXT:    i32 51, label [[F]]
526; CHECK-NEXT:    i32 0, label [[F]]
527; CHECK-NEXT:    ]
528; CHECK:       common.ret:
529; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ]
530; CHECK-NEXT:    ret i32 [[COMMON_RET_OP]]
531; CHECK:       T:
532; CHECK-NEXT:    call void @foo1()
533; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
534; CHECK:       F:
535; CHECK-NEXT:    call void @foo2()
536; CHECK-NEXT:    br label [[COMMON_RET]]
537;
538  %A = icmp ne i32 %mode, 0
539  %B = icmp ne i32 %mode, 51
540  %C = select i1 %A, i1 %B, i1 false
541  %D = and i1 %C, %Cond
542  br i1 %D, label %T, label %F
543T:
544  call void @foo1()
545  ret i32 123
546F:
547  call void @foo2()
548  ret i32 324
549
550}
551
552define i32 @test10_select_nofreeze(i32 %mode, i1 noundef %Cond) {
553; CHECK-LABEL: @test10_select_nofreeze(
554; CHECK-NEXT:    br i1 [[COND:%.*]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]]
555; CHECK:       switch.early.test:
556; CHECK-NEXT:    switch i32 [[MODE:%.*]], label [[T:%.*]] [
557; CHECK-NEXT:    i32 51, label [[F]]
558; CHECK-NEXT:    i32 0, label [[F]]
559; CHECK-NEXT:    ]
560; CHECK:       common.ret:
561; CHECK-NEXT:    [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ]
562; CHECK-NEXT:    ret i32 [[COMMON_RET_OP]]
563; CHECK:       T:
564; CHECK-NEXT:    call void @foo1()
565; CHECK-NEXT:    br label [[COMMON_RET:%.*]]
566; CHECK:       F:
567; CHECK-NEXT:    call void @foo2()
568; CHECK-NEXT:    br label [[COMMON_RET]]
569;
570  %A = icmp ne i32 %mode, 0
571  %B = icmp ne i32 %mode, 51
572  %C = select i1 %A, i1 %B, i1 false
573  %D = select i1 %C, i1 %Cond, i1 false
574  br i1 %D, label %T, label %F
575T:
576  call void @foo1()
577  ret i32 123
578F:
579  call void @foo2()
580  ret i32 324
581
582}
583
584; PR8780
585define i32 @test11(i32 %bar) nounwind {
586; CHECK-LABEL: @test11(
587; CHECK-NEXT:  entry:
588; CHECK-NEXT:    switch i32 [[BAR:%.*]], label [[IF_END:%.*]] [
589; CHECK-NEXT:    i32 55, label [[RETURN:%.*]]
590; CHECK-NEXT:    i32 53, label [[RETURN]]
591; CHECK-NEXT:    i32 35, label [[RETURN]]
592; CHECK-NEXT:    i32 24, label [[RETURN]]
593; CHECK-NEXT:    i32 23, label [[RETURN]]
594; CHECK-NEXT:    i32 12, label [[RETURN]]
595; CHECK-NEXT:    i32 4, label [[RETURN]]
596; CHECK-NEXT:    ]
597; CHECK:       if.end:
598; CHECK-NEXT:    br label [[RETURN]]
599; CHECK:       return:
600; CHECK-NEXT:    [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_END]] ], [ 1, [[ENTRY:%.*]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ]
601; CHECK-NEXT:    ret i32 [[RETVAL_0]]
602;
603entry:
604  %cmp = icmp eq i32 %bar, 4
605  %cmp2 = icmp eq i32 %bar, 35
606  %or.cond = or i1 %cmp, %cmp2
607  %cmp5 = icmp eq i32 %bar, 53
608  %or.cond1 = or i1 %or.cond, %cmp5
609  %cmp8 = icmp eq i32 %bar, 24
610  %or.cond2 = or i1 %or.cond1, %cmp8
611  %cmp11 = icmp eq i32 %bar, 23
612  %or.cond3 = or i1 %or.cond2, %cmp11
613  %cmp14 = icmp eq i32 %bar, 55
614  %or.cond4 = or i1 %or.cond3, %cmp14
615  %cmp17 = icmp eq i32 %bar, 12
616  %or.cond5 = or i1 %or.cond4, %cmp17
617  %cmp20 = icmp eq i32 %bar, 35
618  %or.cond6 = or i1 %or.cond5, %cmp20
619  br i1 %or.cond6, label %if.then, label %if.end
620
621if.then:                                          ; preds = %entry
622  br label %return
623
624if.end:                                           ; preds = %entry
625  br label %return
626
627return:                                           ; preds = %if.end, %if.then
628  %retval.0 = phi i32 [ 1, %if.then ], [ 0, %if.end ]
629  ret i32 %retval.0
630
631}
632
633define void @test12() nounwind {
634; CHECK-LABEL: @test12(
635; CHECK-NEXT:  entry:
636; CHECK-NEXT:    [[A_OLD:%.*]] = icmp eq i32 undef, undef
637; CHECK-NEXT:    br i1 [[A_OLD]], label [[BB55_US_US:%.*]], label [[MALFORMED:%.*]]
638; CHECK:       bb55.us.us:
639; CHECK-NEXT:    [[B:%.*]] = icmp ugt i32 undef, undef
640; CHECK-NEXT:    [[A:%.*]] = icmp eq i32 undef, undef
641; CHECK-NEXT:    [[OR_COND:%.*]] = or i1 [[B]], [[A]]
642; CHECK-NEXT:    br i1 [[OR_COND]], label [[BB55_US_US]], label [[MALFORMED]]
643; CHECK:       malformed:
644; CHECK-NEXT:    ret void
645;
646entry:
647  br label %bb49.us.us
648
649bb49.us.us:
650  %A = icmp eq i32 undef, undef
651  br i1 %A, label %bb55.us.us, label %malformed
652
653bb48.us.us:
654  %B = icmp ugt i32 undef, undef
655  br i1 %B, label %bb55.us.us, label %bb49.us.us
656
657bb55.us.us:
658  br label %bb48.us.us
659
660malformed:
661  ret void
662
663}
664
665; test13 - handle switch formation with ult.
666define void @test13(i32 %x) nounwind ssp noredzone {
667; CHECK-LABEL: @test13(
668; CHECK-NEXT:  entry:
669; CHECK-NEXT:    switch i32 [[X:%.*]], label [[IF_END:%.*]] [
670; CHECK-NEXT:    i32 6, label [[IF_THEN:%.*]]
671; CHECK-NEXT:    i32 4, label [[IF_THEN]]
672; CHECK-NEXT:    i32 3, label [[IF_THEN]]
673; CHECK-NEXT:    i32 1, label [[IF_THEN]]
674; CHECK-NEXT:    i32 0, label [[IF_THEN]]
675; CHECK-NEXT:    ]
676; CHECK:       if.then:
677; CHECK-NEXT:    call void @foo1() #[[ATTR3:[0-9]+]]
678; CHECK-NEXT:    br label [[IF_END]]
679; CHECK:       if.end:
680; CHECK-NEXT:    ret void
681;
682entry:
683  %cmp = icmp ult i32 %x, 2
684  br i1 %cmp, label %if.then, label %lor.lhs.false3
685
686lor.lhs.false3:                                   ; preds = %lor.lhs.false
687  %cmp5 = icmp eq i32 %x, 3
688  br i1 %cmp5, label %if.then, label %lor.lhs.false6
689
690lor.lhs.false6:                                   ; preds = %lor.lhs.false3
691  %cmp8 = icmp eq i32 %x, 4
692  br i1 %cmp8, label %if.then, label %lor.lhs.false9
693
694lor.lhs.false9:                                   ; preds = %lor.lhs.false6
695  %cmp11 = icmp eq i32 %x, 6
696  br i1 %cmp11, label %if.then, label %if.end
697
698if.then:                                          ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry
699  call void @foo1() noredzone
700  br label %if.end
701
702if.end:                                           ; preds = %if.then, %lor.lhs.false9
703  ret void
704}
705
706; test14 - handle switch formation with ult.
707define void @test14(i32 %x) nounwind ssp noredzone {
708; CHECK-LABEL: @test14(
709; CHECK-NEXT:  entry:
710; CHECK-NEXT:    switch i32 [[X:%.*]], label [[IF_END:%.*]] [
711; CHECK-NEXT:    i32 6, label [[IF_THEN:%.*]]
712; CHECK-NEXT:    i32 4, label [[IF_THEN]]
713; CHECK-NEXT:    i32 3, label [[IF_THEN]]
714; CHECK-NEXT:    i32 2, label [[IF_THEN]]
715; CHECK-NEXT:    i32 1, label [[IF_THEN]]
716; CHECK-NEXT:    i32 0, label [[IF_THEN]]
717; CHECK-NEXT:    ]
718; CHECK:       if.then:
719; CHECK-NEXT:    call void @foo1() #[[ATTR3]]
720; CHECK-NEXT:    br label [[IF_END]]
721; CHECK:       if.end:
722; CHECK-NEXT:    ret void
723;
724entry:
725  %cmp = icmp ugt i32 %x, 2
726  br i1 %cmp, label %lor.lhs.false3, label %if.then
727
728lor.lhs.false3:                                   ; preds = %lor.lhs.false
729  %cmp5 = icmp ne i32 %x, 3
730  br i1 %cmp5, label %lor.lhs.false6, label %if.then
731
732lor.lhs.false6:                                   ; preds = %lor.lhs.false3
733  %cmp8 = icmp ne i32 %x, 4
734  br i1 %cmp8, label %lor.lhs.false9, label %if.then
735
736lor.lhs.false9:                                   ; preds = %lor.lhs.false6
737  %cmp11 = icmp ne i32 %x, 6
738  br i1 %cmp11, label %if.end, label %if.then
739
740if.then:                                          ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry
741  call void @foo1() noredzone
742  br label %if.end
743
744if.end:                                           ; preds = %if.then, %lor.lhs.false9
745  ret void
746}
747
748; Don't crash on ginormous ranges.
749define void @test15(i128 %x) nounwind {
750; CHECK-LABEL: @test15(
751; CHECK-NEXT:  if.end:
752; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i128 [[X:%.*]], 2
753; CHECK-NEXT:    ret void
754;
755  %cmp = icmp ugt i128 %x, 2
756  br i1 %cmp, label %if.end, label %lor.false
757
758lor.false:
759  %cmp2 = icmp ne i128 %x, 100000000000000000000
760  br i1 %cmp2, label %if.end, label %if.then
761
762if.then:
763  call void @foo1() noredzone
764  br label %if.end
765
766if.end:
767  ret void
768
769}
770
771; PR8675
772; rdar://5134905
773define zeroext i1 @test16(i32 %x) nounwind {
774; CHECK-LABEL: @test16(
775; CHECK-NEXT:  entry:
776; CHECK-NEXT:    [[X_OFF:%.*]] = add i32 [[X:%.*]], -1
777; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i32 [[X_OFF]], 3
778; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false
779; CHECK-NEXT:    ret i1 [[SPEC_SELECT]]
780;
781entry:
782  %cmp.i = icmp eq i32 %x, 1
783  br i1 %cmp.i, label %lor.end, label %lor.lhs.false
784
785lor.lhs.false:
786  %cmp.i2 = icmp eq i32 %x, 2
787  br i1 %cmp.i2, label %lor.end, label %lor.rhs
788
789lor.rhs:
790  %cmp.i1 = icmp eq i32 %x, 3
791  br label %lor.end
792
793lor.end:
794  %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ]
795  ret i1 %0
796}
797
798; Check that we don't turn an icmp into a switch where it's not useful.
799define void @test17(i32 %x, i32 %y) {
800; CHECK-LABEL: @test17(
801; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 3
802; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i32 [[Y:%.*]], 2
803; CHECK-NEXT:    [[OR_COND775:%.*]] = or i1 [[CMP]], [[SWITCH]]
804; CHECK-NEXT:    br i1 [[OR_COND775]], label [[LOR_LHS_FALSE8:%.*]], label [[COMMON_RET:%.*]]
805; CHECK:       common.ret:
806; CHECK-NEXT:    ret void
807; CHECK:       lor.lhs.false8:
808; CHECK-NEXT:    tail call void @foo1()
809; CHECK-NEXT:    br label [[COMMON_RET]]
810;
811  %cmp = icmp ult i32 %x, 3
812  %switch = icmp ult i32 %y, 2
813  %or.cond775 = or i1 %cmp, %switch
814  br i1 %or.cond775, label %lor.lhs.false8, label %return
815
816lor.lhs.false8:
817  tail call void @foo1()
818  ret void
819
820return:
821  ret void
822
823}
824
825define void @test17_select(i32 %x, i32 %y) {
826; CHECK-LABEL: @test17_select(
827; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 3
828; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i32 [[Y:%.*]], 2
829; CHECK-NEXT:    [[OR_COND775:%.*]] = select i1 [[CMP]], i1 true, i1 [[SWITCH]]
830; CHECK-NEXT:    br i1 [[OR_COND775]], label [[LOR_LHS_FALSE8:%.*]], label [[COMMON_RET:%.*]]
831; CHECK:       common.ret:
832; CHECK-NEXT:    ret void
833; CHECK:       lor.lhs.false8:
834; CHECK-NEXT:    tail call void @foo1()
835; CHECK-NEXT:    br label [[COMMON_RET]]
836;
837  %cmp = icmp ult i32 %x, 3
838  %switch = icmp ult i32 %y, 2
839  %or.cond775 = select i1 %cmp, i1 true, i1 %switch
840  br i1 %or.cond775, label %lor.lhs.false8, label %return
841
842lor.lhs.false8:
843  tail call void @foo1()
844  ret void
845
846return:
847  ret void
848
849}
850
851define void @test18(i32 %arg) {
852; CHECK-LABEL: @test18(
853; CHECK-NEXT:  bb:
854; CHECK-NEXT:    [[ARG_OFF:%.*]] = add i32 [[ARG:%.*]], -8
855; CHECK-NEXT:    [[SWITCH:%.*]] = icmp ult i32 [[ARG_OFF]], 11
856; CHECK-NEXT:    br i1 [[SWITCH]], label [[BB19:%.*]], label [[BB20:%.*]]
857; CHECK:       bb19:
858; CHECK-NEXT:    tail call void @foo1()
859; CHECK-NEXT:    br label [[BB20]]
860; CHECK:       bb20:
861; CHECK-NEXT:    ret void
862;
863bb:
864  %tmp = and i32 %arg, -2
865  %tmp1 = icmp eq i32 %tmp, 8
866  %tmp2 = icmp eq i32 %arg, 10
867  %tmp3 = or i1 %tmp1, %tmp2
868  %tmp4 = icmp eq i32 %arg, 11
869  %tmp5 = or i1 %tmp3, %tmp4
870  %tmp6 = icmp eq i32 %arg, 12
871  %tmp7 = or i1 %tmp5, %tmp6
872  br i1 %tmp7, label %bb19, label %bb8
873
874bb8:                                              ; preds = %bb
875  %tmp9 = add i32 %arg, -13
876  %tmp10 = icmp ult i32 %tmp9, 2
877  %tmp11 = icmp eq i32 %arg, 16
878  %tmp12 = or i1 %tmp10, %tmp11
879  %tmp13 = icmp eq i32 %arg, 17
880  %tmp14 = or i1 %tmp12, %tmp13
881  %tmp15 = icmp eq i32 %arg, 18
882  %tmp16 = or i1 %tmp14, %tmp15
883  %tmp17 = icmp eq i32 %arg, 15
884  %tmp18 = or i1 %tmp16, %tmp17
885  br i1 %tmp18, label %bb19, label %bb20
886
887bb19:                                             ; preds = %bb8, %bb
888  tail call void @foo1()
889  br label %bb20
890
891bb20:                                             ; preds = %bb19, %bb8
892  ret void
893
894}
895
896define void @PR26323(i1 %tobool23, i32 %tmp3) {
897; CHECK-LABEL: @PR26323(
898; CHECK-NEXT:  entry:
899; CHECK-NEXT:    [[TOBOOL5:%.*]] = icmp ne i32 [[TMP3:%.*]], 0
900; CHECK-NEXT:    [[NEG14:%.*]] = and i32 [[TMP3]], -2
901; CHECK-NEXT:    [[CMP17:%.*]] = icmp ne i32 [[NEG14]], -1
902; CHECK-NEXT:    [[OR_COND:%.*]] = and i1 [[TOBOOL5]], [[TOBOOL23:%.*]]
903; CHECK-NEXT:    [[OR_COND1:%.*]] = and i1 [[CMP17]], [[OR_COND]]
904; CHECK-NEXT:    br i1 [[OR_COND1]], label [[IF_END29:%.*]], label [[IF_THEN27:%.*]]
905; CHECK:       if.then27:
906; CHECK-NEXT:    call void @foo1()
907; CHECK-NEXT:    unreachable
908; CHECK:       if.end29:
909; CHECK-NEXT:    ret void
910;
911entry:
912  %tobool5 = icmp ne i32 %tmp3, 0
913  %neg14 = and i32 %tmp3, -2
914  %cmp17 = icmp ne i32 %neg14, -1
915  %or.cond = and i1 %tobool5, %tobool23
916  %or.cond1 = and i1 %cmp17, %or.cond
917  br i1 %or.cond1, label %if.end29, label %if.then27
918
919if.then27:                                        ; preds = %entry
920  call void @foo1()
921  unreachable
922
923if.end29:                                         ; preds = %entry
924  ret void
925}
926
927; Form a switch when and'ing a negated power of two
928define void @test19(i32 %arg) {
929; CHECK-LABEL: @test19(
930; CHECK-NEXT:    switch i32 [[ARG:%.*]], label [[COMMON_RET:%.*]] [
931; CHECK-NEXT:    i32 32, label [[IF:%.*]]
932; CHECK-NEXT:    i32 13, label [[IF]]
933; CHECK-NEXT:    i32 12, label [[IF]]
934; CHECK-NEXT:    ]
935; CHECK:       common.ret:
936; CHECK-NEXT:    ret void
937; CHECK:       if:
938; CHECK-NEXT:    call void @foo1()
939; CHECK-NEXT:    br label [[COMMON_RET]]
940;
941  %and = and i32 %arg, -2
942  %cmp1 = icmp eq i32 %and, 12
943  %cmp2 = icmp eq i32 %arg, 32
944  %pred = or i1 %cmp1, %cmp2
945  br i1 %pred, label %if, label %else
946
947if:
948  call void @foo1()
949  ret void
950
951else:
952  ret void
953}
954
955define void @test19_select(i32 %arg) {
956; CHECK-LABEL: @test19_select(
957; CHECK-NEXT:    switch i32 [[ARG:%.*]], label [[COMMON_RET:%.*]] [
958; CHECK-NEXT:    i32 32, label [[IF:%.*]]
959; CHECK-NEXT:    i32 13, label [[IF]]
960; CHECK-NEXT:    i32 12, label [[IF]]
961; CHECK-NEXT:    ]
962; CHECK:       common.ret:
963; CHECK-NEXT:    ret void
964; CHECK:       if:
965; CHECK-NEXT:    call void @foo1()
966; CHECK-NEXT:    br label [[COMMON_RET]]
967;
968  %and = and i32 %arg, -2
969  %cmp1 = icmp eq i32 %and, 12
970  %cmp2 = icmp eq i32 %arg, 32
971  %pred = select i1 %cmp1, i1 true, i1 %cmp2
972  br i1 %pred, label %if, label %else
973
974if:
975  call void @foo1()
976  ret void
977
978else:
979  ret void
980}
981
982; Since %cmp1 is always false, a switch is never formed
983define void @test20(i32 %arg) {
984; CHECK-LABEL: @test20(
985; CHECK-NEXT:    [[AND:%.*]] = and i32 [[ARG:%.*]], -2
986; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i32 [[AND]], 13
987; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i32 [[ARG]], 32
988; CHECK-NEXT:    [[PRED:%.*]] = or i1 [[CMP1]], [[CMP2]]
989; CHECK-NEXT:    br i1 [[PRED]], label [[IF:%.*]], label [[COMMON_RET:%.*]]
990; CHECK:       common.ret:
991; CHECK-NEXT:    ret void
992; CHECK:       if:
993; CHECK-NEXT:    call void @foo1()
994; CHECK-NEXT:    br label [[COMMON_RET]]
995;
996  %and = and i32 %arg, -2
997  %cmp1 = icmp eq i32 %and, 13
998  %cmp2 = icmp eq i32 %arg, 32
999  %pred = or i1 %cmp1, %cmp2
1000  br i1 %pred, label %if, label %else
1001
1002if:
1003  call void @foo1()
1004  ret void
1005
1006else:
1007  ret void
1008}
1009
1010; Form a switch when or'ing a power of two
1011define void @test21(i32 %arg) {
1012; CHECK-LABEL: @test21(
1013; CHECK-NEXT:    switch i32 [[ARG:%.*]], label [[IF:%.*]] [
1014; CHECK-NEXT:    i32 32, label [[COMMON_RET:%.*]]
1015; CHECK-NEXT:    i32 13, label [[COMMON_RET]]
1016; CHECK-NEXT:    i32 12, label [[COMMON_RET]]
1017; CHECK-NEXT:    ]
1018; CHECK:       common.ret:
1019; CHECK-NEXT:    ret void
1020; CHECK:       if:
1021; CHECK-NEXT:    call void @foo1()
1022; CHECK-NEXT:    br label [[COMMON_RET]]
1023;
1024  %and = or i32 %arg, 1
1025  %cmp1 = icmp ne i32 %and, 13
1026  %cmp2 = icmp ne i32 %arg, 32
1027  %pred = and i1 %cmp1, %cmp2
1028  br i1 %pred, label %if, label %else
1029
1030if:
1031  call void @foo1()
1032  ret void
1033
1034else:
1035  ret void
1036}
1037
1038; Since %cmp1 is always false, a switch is never formed
1039define void @test22(i32 %arg) {
1040; CHECK-LABEL: @test22(
1041; CHECK-NEXT:    [[AND:%.*]] = or i32 [[ARG:%.*]], 1
1042; CHECK-NEXT:    [[CMP1:%.*]] = icmp ne i32 [[AND]], 12
1043; CHECK-NEXT:    [[CMP2:%.*]] = icmp ne i32 [[ARG]], 32
1044; CHECK-NEXT:    [[PRED:%.*]] = and i1 [[CMP1]], [[CMP2]]
1045; CHECK-NEXT:    br i1 [[PRED]], label [[IF:%.*]], label [[COMMON_RET:%.*]]
1046; CHECK:       common.ret:
1047; CHECK-NEXT:    ret void
1048; CHECK:       if:
1049; CHECK-NEXT:    call void @foo1()
1050; CHECK-NEXT:    br label [[COMMON_RET]]
1051;
1052  %and = or i32 %arg, 1
1053  %cmp1 = icmp ne i32 %and, 12
1054  %cmp2 = icmp ne i32 %arg, 32
1055  %pred = and i1 %cmp1, %cmp2
1056  br i1 %pred, label %if, label %else
1057
1058if:
1059  call void @foo1()
1060  ret void
1061
1062else:
1063  ret void
1064}
1065