1; RUN: opt -passes='loop(unswitch),verify<loops>' -S < %s | FileCheck %s 2; RUN: opt -enable-mssa-loop-dependency=true -verify-memoryssa -passes='loop(unswitch),verify<loops>' -S < %s | FileCheck %s 3 4declare void @some_func() noreturn 5declare void @sink(i32) 6 7declare i1 @cond() 8declare i32 @cond.i32() 9 10; This test contains two trivial unswitch condition in one loop. 11; LoopUnswitch pass should be able to unswitch the second one 12; after unswitching the first one. 13define i32 @test1(i32* %var, i1 %cond1, i1 %cond2) { 14; CHECK-LABEL: @test1( 15entry: 16 br label %loop_begin 17; CHECK-NEXT: entry: 18; CHECK-NEXT: br i1 %{{.*}}, label %entry.split, label %loop_exit.split 19; 20; CHECK: entry.split: 21; CHECK-NEXT: br i1 %{{.*}}, label %entry.split.split, label %loop_exit 22; 23; CHECK: entry.split.split: 24; CHECK-NEXT: br label %loop_begin 25 26loop_begin: 27 br i1 %cond1, label %continue, label %loop_exit ; first trivial condition 28; CHECK: loop_begin: 29; CHECK-NEXT: br label %continue 30 31continue: 32 %var_val = load i32, i32* %var 33 br i1 %cond2, label %do_something, label %loop_exit ; second trivial condition 34; CHECK: continue: 35; CHECK-NEXT: load 36; CHECK-NEXT: br label %do_something 37 38do_something: 39 call void @some_func() noreturn nounwind 40 br label %loop_begin 41; CHECK: do_something: 42; CHECK-NEXT: call 43; CHECK-NEXT: br label %loop_begin 44 45loop_exit: 46 ret i32 0 47; CHECK: loop_exit: 48; CHECK-NEXT: br label %loop_exit.split 49; 50; CHECK: loop_exit.split: 51; CHECK-NEXT: ret 52} 53 54; Test for two trivially unswitchable switches. 55define i32 @test3(i32* %var, i32 %cond1, i32 %cond2) { 56; CHECK-LABEL: @test3( 57entry: 58 br label %loop_begin 59; CHECK-NEXT: entry: 60; CHECK-NEXT: switch i32 %cond1, label %entry.split [ 61; CHECK-NEXT: i32 0, label %loop_exit1 62; CHECK-NEXT: ] 63; 64; CHECK: entry.split: 65; CHECK-NEXT: switch i32 %cond2, label %loop_exit2 [ 66; CHECK-NEXT: i32 42, label %loop_exit2 67; CHECK-NEXT: i32 0, label %entry.split.split 68; CHECK-NEXT: ] 69; 70; CHECK: entry.split.split: 71; CHECK-NEXT: br label %loop_begin 72 73loop_begin: 74 switch i32 %cond1, label %continue [ 75 i32 0, label %loop_exit1 76 ] 77; CHECK: loop_begin: 78; CHECK-NEXT: br label %continue 79 80continue: 81 %var_val = load i32, i32* %var 82 switch i32 %cond2, label %loop_exit2 [ 83 i32 0, label %do_something 84 i32 42, label %loop_exit2 85 ] 86; CHECK: continue: 87; CHECK-NEXT: load 88; CHECK-NEXT: br label %do_something 89 90do_something: 91 call void @some_func() noreturn nounwind 92 br label %loop_begin 93; CHECK: do_something: 94; CHECK-NEXT: call 95; CHECK-NEXT: br label %loop_begin 96 97loop_exit1: 98 ret i32 0 99; CHECK: loop_exit1: 100; CHECK-NEXT: ret 101 102loop_exit2: 103 ret i32 0 104; CHECK: loop_exit2: 105; CHECK-NEXT: ret 106; 107; We shouldn't have any unreachable blocks here because the unswitched switches 108; turn into branches instead. 109; CHECK-NOT: unreachable 110} 111 112; Test for a trivially unswitchable switch with multiple exiting cases and 113; multiple looping cases. 114define i32 @test4(i32* %var, i32 %cond1, i32 %cond2) { 115; CHECK-LABEL: @test4( 116entry: 117 br label %loop_begin 118; CHECK-NEXT: entry: 119; CHECK-NEXT: switch i32 %cond2, label %loop_exit2 [ 120; CHECK-NEXT: i32 13, label %loop_exit1 121; CHECK-NEXT: i32 42, label %loop_exit3 122; CHECK-NEXT: i32 0, label %entry.split 123; CHECK-NEXT: i32 1, label %entry.split 124; CHECK-NEXT: i32 2, label %entry.split 125; CHECK-NEXT: ] 126; 127; CHECK: entry.split: 128; CHECK-NEXT: br label %loop_begin 129 130loop_begin: 131 %var_val = load i32, i32* %var 132 switch i32 %cond2, label %loop_exit2 [ 133 i32 0, label %loop0 134 i32 1, label %loop1 135 i32 13, label %loop_exit1 136 i32 2, label %loop2 137 i32 42, label %loop_exit3 138 ] 139; CHECK: loop_begin: 140; CHECK-NEXT: load 141; CHECK-NEXT: switch i32 %cond2, label %loop2 [ 142; CHECK-NEXT: i32 0, label %loop0 143; CHECK-NEXT: i32 1, label %loop1 144; CHECK-NEXT: ] 145 146loop0: 147 call void @some_func() noreturn nounwind 148 br label %loop_latch 149; CHECK: loop0: 150; CHECK-NEXT: call 151; CHECK-NEXT: br label %loop_latch 152 153loop1: 154 call void @some_func() noreturn nounwind 155 br label %loop_latch 156; CHECK: loop1: 157; CHECK-NEXT: call 158; CHECK-NEXT: br label %loop_latch 159 160loop2: 161 call void @some_func() noreturn nounwind 162 br label %loop_latch 163; CHECK: loop2: 164; CHECK-NEXT: call 165; CHECK-NEXT: br label %loop_latch 166 167loop_latch: 168 br label %loop_begin 169; CHECK: loop_latch: 170; CHECK-NEXT: br label %loop_begin 171 172loop_exit1: 173 ret i32 0 174; CHECK: loop_exit1: 175; CHECK-NEXT: ret 176 177loop_exit2: 178 ret i32 0 179; CHECK: loop_exit2: 180; CHECK-NEXT: ret 181 182loop_exit3: 183 ret i32 0 184; CHECK: loop_exit3: 185; CHECK-NEXT: ret 186} 187 188; This test contains a trivially unswitchable branch with an LCSSA phi node in 189; a loop exit block. 190define i32 @test5(i1 %cond1, i32 %x, i32 %y) { 191; CHECK-LABEL: @test5( 192entry: 193 br label %loop_begin 194; CHECK-NEXT: entry: 195; CHECK-NEXT: br i1 %{{.*}}, label %entry.split, label %loop_exit 196; 197; CHECK: entry.split: 198; CHECK-NEXT: br label %loop_begin 199 200loop_begin: 201 br i1 %cond1, label %latch, label %loop_exit 202; CHECK: loop_begin: 203; CHECK-NEXT: br label %latch 204 205latch: 206 call void @some_func() noreturn nounwind 207 br label %loop_begin 208; CHECK: latch: 209; CHECK-NEXT: call 210; CHECK-NEXT: br label %loop_begin 211 212loop_exit: 213 %result1 = phi i32 [ %x, %loop_begin ] 214 %result2 = phi i32 [ %y, %loop_begin ] 215 %result = add i32 %result1, %result2 216 ret i32 %result 217; CHECK: loop_exit: 218; CHECK-NEXT: %[[R1:.*]] = phi i32 [ %x, %entry ] 219; CHECK-NEXT: %[[R2:.*]] = phi i32 [ %y, %entry ] 220; CHECK-NEXT: %[[R:.*]] = add i32 %[[R1]], %[[R2]] 221; CHECK-NEXT: ret i32 %[[R]] 222} 223 224; This test contains a trivially unswitchable branch with a real phi node in LCSSA 225; position in a shared exit block where a different path through the loop 226; produces a non-invariant input to the PHI node. 227define i32 @test6(i32* %var, i1 %cond1, i1 %cond2, i32 %x, i32 %y) { 228; CHECK-LABEL: @test6( 229entry: 230 br label %loop_begin 231; CHECK-NEXT: entry: 232; CHECK-NEXT: br i1 %{{.*}}, label %entry.split, label %loop_exit.split 233; 234; CHECK: entry.split: 235; CHECK-NEXT: br label %loop_begin 236 237loop_begin: 238 br i1 %cond1, label %continue, label %loop_exit 239; CHECK: loop_begin: 240; CHECK-NEXT: br label %continue 241 242continue: 243 %var_val = load i32, i32* %var 244 br i1 %cond2, label %latch, label %loop_exit 245; CHECK: continue: 246; CHECK-NEXT: load 247; CHECK-NEXT: br i1 %cond2, label %latch, label %loop_exit 248 249latch: 250 call void @some_func() noreturn nounwind 251 br label %loop_begin 252; CHECK: latch: 253; CHECK-NEXT: call 254; CHECK-NEXT: br label %loop_begin 255 256loop_exit: 257 %result1 = phi i32 [ %x, %loop_begin ], [ %var_val, %continue ] 258 %result2 = phi i32 [ %var_val, %continue ], [ %y, %loop_begin ] 259 %result = add i32 %result1, %result2 260 ret i32 %result 261; CHECK: loop_exit: 262; CHECK-NEXT: %[[R1:.*]] = phi i32 [ %var_val, %continue ] 263; CHECK-NEXT: %[[R2:.*]] = phi i32 [ %var_val, %continue ] 264; CHECK-NEXT: br label %loop_exit.split 265; 266; CHECK: loop_exit.split: 267; CHECK-NEXT: %[[R1S:.*]] = phi i32 [ %x, %entry ], [ %[[R1]], %loop_exit ] 268; CHECK-NEXT: %[[R2S:.*]] = phi i32 [ %y, %entry ], [ %[[R2]], %loop_exit ] 269; CHECK-NEXT: %[[R:.*]] = add i32 %[[R1S]], %[[R2S]] 270; CHECK-NEXT: ret i32 %[[R]] 271} 272 273; This test contains a trivially unswitchable switch with an LCSSA phi node in 274; a loop exit block. 275define i32 @test7(i32 %cond1, i32 %x, i32 %y) { 276; CHECK-LABEL: @test7( 277entry: 278 br label %loop_begin 279; CHECK-NEXT: entry: 280; CHECK-NEXT: switch i32 %cond1, label %entry.split [ 281; CHECK-NEXT: i32 0, label %loop_exit 282; CHECK-NEXT: i32 1, label %loop_exit 283; CHECK-NEXT: ] 284; 285; CHECK: entry.split: 286; CHECK-NEXT: br label %loop_begin 287 288loop_begin: 289 switch i32 %cond1, label %latch [ 290 i32 0, label %loop_exit 291 i32 1, label %loop_exit 292 ] 293; CHECK: loop_begin: 294; CHECK-NEXT: br label %latch 295 296latch: 297 call void @some_func() noreturn nounwind 298 br label %loop_begin 299; CHECK: latch: 300; CHECK-NEXT: call 301; CHECK-NEXT: br label %loop_begin 302 303loop_exit: 304 %result1 = phi i32 [ %x, %loop_begin ], [ %x, %loop_begin ] 305 %result2 = phi i32 [ %y, %loop_begin ], [ %y, %loop_begin ] 306 %result = add i32 %result1, %result2 307 ret i32 %result 308; CHECK: loop_exit: 309; CHECK-NEXT: %[[R1:.*]] = phi i32 [ %x, %entry ], [ %x, %entry ] 310; CHECK-NEXT: %[[R2:.*]] = phi i32 [ %y, %entry ], [ %y, %entry ] 311; CHECK-NEXT: %[[R:.*]] = add i32 %[[R1]], %[[R2]] 312; CHECK-NEXT: ret i32 %[[R]] 313} 314 315; This test contains a trivially unswitchable switch with a real phi node in 316; LCSSA position in a shared exit block where a different path through the loop 317; produces a non-invariant input to the PHI node. 318define i32 @test8(i32* %var, i32 %cond1, i32 %cond2, i32 %x, i32 %y) { 319; CHECK-LABEL: @test8( 320entry: 321 br label %loop_begin 322; CHECK-NEXT: entry: 323; CHECK-NEXT: switch i32 %cond1, label %entry.split [ 324; CHECK-NEXT: i32 0, label %loop_exit.split 325; CHECK-NEXT: i32 1, label %loop_exit2 326; CHECK-NEXT: i32 2, label %loop_exit.split 327; CHECK-NEXT: ] 328; 329; CHECK: entry.split: 330; CHECK-NEXT: br label %loop_begin 331 332loop_begin: 333 switch i32 %cond1, label %continue [ 334 i32 0, label %loop_exit 335 i32 1, label %loop_exit2 336 i32 2, label %loop_exit 337 ] 338; CHECK: loop_begin: 339; CHECK-NEXT: br label %continue 340 341continue: 342 %var_val = load i32, i32* %var 343 switch i32 %cond2, label %latch [ 344 i32 0, label %loop_exit 345 ] 346; CHECK: continue: 347; CHECK-NEXT: load 348; CHECK-NEXT: switch i32 %cond2, label %latch [ 349; CHECK-NEXT: i32 0, label %loop_exit 350; CHECK-NEXT: ] 351 352latch: 353 call void @some_func() noreturn nounwind 354 br label %loop_begin 355; CHECK: latch: 356; CHECK-NEXT: call 357; CHECK-NEXT: br label %loop_begin 358 359loop_exit: 360 %result1.1 = phi i32 [ %x, %loop_begin ], [ %x, %loop_begin ], [ %var_val, %continue ] 361 %result1.2 = phi i32 [ %var_val, %continue ], [ %y, %loop_begin ], [ %y, %loop_begin ] 362 %result1 = add i32 %result1.1, %result1.2 363 ret i32 %result1 364; CHECK: loop_exit: 365; CHECK-NEXT: %[[R1:.*]] = phi i32 [ %var_val, %continue ] 366; CHECK-NEXT: %[[R2:.*]] = phi i32 [ %var_val, %continue ] 367; CHECK-NEXT: br label %loop_exit.split 368; 369; CHECK: loop_exit.split: 370; CHECK-NEXT: %[[R1S:.*]] = phi i32 [ %x, %entry ], [ %x, %entry ], [ %[[R1]], %loop_exit ] 371; CHECK-NEXT: %[[R2S:.*]] = phi i32 [ %y, %entry ], [ %y, %entry ], [ %[[R2]], %loop_exit ] 372; CHECK-NEXT: %[[R:.*]] = add i32 %[[R1S]], %[[R2S]] 373; CHECK-NEXT: ret i32 %[[R]] 374 375loop_exit2: 376 %result2.1 = phi i32 [ %x, %loop_begin ] 377 %result2.2 = phi i32 [ %y, %loop_begin ] 378 %result2 = add i32 %result2.1, %result2.2 379 ret i32 %result2 380; CHECK: loop_exit2: 381; CHECK-NEXT: %[[R1:.*]] = phi i32 [ %x, %entry ] 382; CHECK-NEXT: %[[R2:.*]] = phi i32 [ %y, %entry ] 383; CHECK-NEXT: %[[R:.*]] = add i32 %[[R1]], %[[R2]] 384; CHECK-NEXT: ret i32 %[[R]] 385} 386 387; This test, extracted from the LLVM test suite, has an interesting dominator 388; tree to update as there are edges to sibling domtree nodes within child 389; domtree nodes of the unswitched node. 390define void @xgets(i1 %cond1, i1* %cond2.ptr) { 391; CHECK-LABEL: @xgets( 392entry: 393 br label %for.cond.preheader 394; CHECK: entry: 395; CHECK-NEXT: br label %for.cond.preheader 396 397for.cond.preheader: 398 br label %for.cond 399; CHECK: for.cond.preheader: 400; CHECK-NEXT: br i1 %cond1, label %for.cond.preheader.split, label %if.end17.thread.loopexit 401; 402; CHECK: for.cond.preheader.split: 403; CHECK-NEXT: br label %for.cond 404 405for.cond: 406 br i1 %cond1, label %land.lhs.true, label %if.end17.thread.loopexit 407; CHECK: for.cond: 408; CHECK-NEXT: br label %land.lhs.true 409 410land.lhs.true: 411 br label %if.then20 412; CHECK: land.lhs.true: 413; CHECK-NEXT: br label %if.then20 414 415if.then20: 416 %cond2 = load volatile i1, i1* %cond2.ptr 417 br i1 %cond2, label %if.then23, label %if.else 418; CHECK: if.then20: 419; CHECK-NEXT: %[[COND2:.*]] = load volatile i1, i1* %cond2.ptr 420; CHECK-NEXT: br i1 %[[COND2]], label %if.then23, label %if.else 421 422if.else: 423 br label %for.cond 424; CHECK: if.else: 425; CHECK-NEXT: br label %for.cond 426 427if.end17.thread.loopexit: 428 br label %if.end17.thread 429; CHECK: if.end17.thread.loopexit: 430; CHECK-NEXT: br label %if.end17.thread 431 432if.end17.thread: 433 br label %cleanup 434; CHECK: if.end17.thread: 435; CHECK-NEXT: br label %cleanup 436 437if.then23: 438 br label %cleanup 439; CHECK: if.then23: 440; CHECK-NEXT: br label %cleanup 441 442cleanup: 443 ret void 444; CHECK: cleanup: 445; CHECK-NEXT: ret void 446} 447 448define i32 @test_partial_condition_unswitch_and(i32* %var, i1 %cond1, i1 %cond2) { 449; CHECK-LABEL: @test_partial_condition_unswitch_and( 450entry: 451 br label %loop_begin 452; CHECK-NEXT: entry: 453; CHECK-NEXT: br i1 %cond1, label %entry.split, label %loop_exit.split 454; 455; CHECK: entry.split: 456; CHECK-NEXT: br i1 %cond2, label %entry.split.split, label %loop_exit 457; 458; CHECK: entry.split.split: 459; CHECK-NEXT: br label %loop_begin 460 461loop_begin: 462 br i1 %cond1, label %continue, label %loop_exit 463; CHECK: loop_begin: 464; CHECK-NEXT: br label %continue 465 466continue: 467 %var_val = load i32, i32* %var 468 %var_cond = trunc i32 %var_val to i1 469 %cond_and = and i1 %var_cond, %cond2 470 br i1 %cond_and, label %do_something, label %loop_exit 471; CHECK: continue: 472; CHECK-NEXT: %[[VAR:.*]] = load i32 473; CHECK-NEXT: %[[VAR_COND:.*]] = trunc i32 %[[VAR]] to i1 474; CHECK-NEXT: %[[COND_AND:.*]] = and i1 %[[VAR_COND]], true 475; CHECK-NEXT: br i1 %[[COND_AND]], label %do_something, label %loop_exit 476 477do_something: 478 call void @some_func() noreturn nounwind 479 br label %loop_begin 480; CHECK: do_something: 481; CHECK-NEXT: call 482; CHECK-NEXT: br label %loop_begin 483 484loop_exit: 485 ret i32 0 486; CHECK: loop_exit: 487; CHECK-NEXT: br label %loop_exit.split 488; 489; CHECK: loop_exit.split: 490; CHECK-NEXT: ret 491} 492 493define i32 @test_partial_condition_unswitch_or(i32* %var, i1 %cond1, i1 %cond2, i1 %cond3, i1 %cond4, i1 %cond5, i1 %cond6) { 494; CHECK-LABEL: @test_partial_condition_unswitch_or( 495entry: 496 br label %loop_begin 497; CHECK-NEXT: entry: 498; CHECK-NEXT: %[[INV_OR1:.*]] = or i1 %cond4, %cond2 499; CHECK-NEXT: %[[INV_OR2:.*]] = or i1 %[[INV_OR1]], %cond3 500; CHECK-NEXT: %[[INV_OR3:.*]] = or i1 %[[INV_OR2]], %cond1 501; CHECK-NEXT: br i1 %[[INV_OR3]], label %loop_exit.split, label %entry.split 502; 503; CHECK: entry.split: 504; CHECK-NEXT: br label %loop_begin 505 506loop_begin: 507 %var_val = load i32, i32* %var 508 %var_cond = trunc i32 %var_val to i1 509 %cond_or1 = or i1 %var_cond, %cond1 510 %cond_or2 = or i1 %cond2, %cond3 511 %cond_or3 = or i1 %cond_or1, %cond_or2 512 %cond_xor1 = xor i1 %cond5, %var_cond 513 %cond_and1 = and i1 %cond6, %var_cond 514 %cond_or4 = or i1 %cond_xor1, %cond_and1 515 %cond_or5 = or i1 %cond_or3, %cond_or4 516 %cond_or6 = or i1 %cond_or5, %cond4 517 br i1 %cond_or6, label %loop_exit, label %do_something 518; CHECK: loop_begin: 519; CHECK-NEXT: %[[VAR:.*]] = load i32 520; CHECK-NEXT: %[[VAR_COND:.*]] = trunc i32 %[[VAR]] to i1 521; CHECK-NEXT: %[[COND_OR1:.*]] = or i1 %[[VAR_COND]], false 522; CHECK-NEXT: %[[COND_OR2:.*]] = or i1 false, false 523; CHECK-NEXT: %[[COND_OR3:.*]] = or i1 %[[COND_OR1]], %[[COND_OR2]] 524; CHECK-NEXT: %[[COND_XOR:.*]] = xor i1 %cond5, %[[VAR_COND]] 525; CHECK-NEXT: %[[COND_AND:.*]] = and i1 %cond6, %[[VAR_COND]] 526; CHECK-NEXT: %[[COND_OR4:.*]] = or i1 %[[COND_XOR]], %[[COND_AND]] 527; CHECK-NEXT: %[[COND_OR5:.*]] = or i1 %[[COND_OR3]], %[[COND_OR4]] 528; CHECK-NEXT: %[[COND_OR6:.*]] = or i1 %[[COND_OR5]], false 529; CHECK-NEXT: br i1 %[[COND_OR6]], label %loop_exit, label %do_something 530 531do_something: 532 call void @some_func() noreturn nounwind 533 br label %loop_begin 534; CHECK: do_something: 535; CHECK-NEXT: call 536; CHECK-NEXT: br label %loop_begin 537 538loop_exit: 539 ret i32 0 540; CHECK: loop_exit.split: 541; CHECK-NEXT: ret 542} 543 544define i32 @test_partial_condition_unswitch_with_lcssa_phi1(i32* %var, i1 %cond, i32 %x) { 545; CHECK-LABEL: @test_partial_condition_unswitch_with_lcssa_phi1( 546entry: 547 br label %loop_begin 548; CHECK-NEXT: entry: 549; CHECK-NEXT: br i1 %cond, label %entry.split, label %loop_exit.split 550; 551; CHECK: entry.split: 552; CHECK-NEXT: br label %loop_begin 553 554loop_begin: 555 %var_val = load i32, i32* %var 556 %var_cond = trunc i32 %var_val to i1 557 %cond_and = and i1 %var_cond, %cond 558 br i1 %cond_and, label %do_something, label %loop_exit 559; CHECK: loop_begin: 560; CHECK-NEXT: %[[VAR:.*]] = load i32 561; CHECK-NEXT: %[[VAR_COND:.*]] = trunc i32 %[[VAR]] to i1 562; CHECK-NEXT: %[[COND_AND:.*]] = and i1 %[[VAR_COND]], true 563; CHECK-NEXT: br i1 %[[COND_AND]], label %do_something, label %loop_exit 564 565do_something: 566 call void @some_func() noreturn nounwind 567 br label %loop_begin 568; CHECK: do_something: 569; CHECK-NEXT: call 570; CHECK-NEXT: br label %loop_begin 571 572loop_exit: 573 %x.lcssa = phi i32 [ %x, %loop_begin ] 574 ret i32 %x.lcssa 575; CHECK: loop_exit: 576; CHECK-NEXT: %[[LCSSA:.*]] = phi i32 [ %x, %loop_begin ] 577; CHECK-NEXT: br label %loop_exit.split 578; 579; CHECK: loop_exit.split: 580; CHECK-NEXT: %[[LCSSA_SPLIT:.*]] = phi i32 [ %x, %entry ], [ %[[LCSSA]], %loop_exit ] 581; CHECK-NEXT: ret i32 %[[LCSSA_SPLIT]] 582} 583 584define i32 @test_partial_condition_unswitch_with_lcssa_phi2(i32* %var, i1 %cond, i32 %x, i32 %y) { 585; CHECK-LABEL: @test_partial_condition_unswitch_with_lcssa_phi2( 586entry: 587 br label %loop_begin 588; CHECK-NEXT: entry: 589; CHECK-NEXT: br i1 %cond, label %entry.split, label %loop_exit.split 590; 591; CHECK: entry.split: 592; CHECK-NEXT: br label %loop_begin 593 594loop_begin: 595 %var_val = load i32, i32* %var 596 %var_cond = trunc i32 %var_val to i1 597 %cond_and = and i1 %var_cond, %cond 598 br i1 %cond_and, label %do_something, label %loop_exit 599; CHECK: loop_begin: 600; CHECK-NEXT: %[[VAR:.*]] = load i32 601; CHECK-NEXT: %[[VAR_COND:.*]] = trunc i32 %[[VAR]] to i1 602; CHECK-NEXT: %[[COND_AND:.*]] = and i1 %[[VAR_COND]], true 603; CHECK-NEXT: br i1 %[[COND_AND]], label %do_something, label %loop_exit 604 605do_something: 606 call void @some_func() noreturn nounwind 607 br i1 %var_cond, label %loop_begin, label %loop_exit 608; CHECK: do_something: 609; CHECK-NEXT: call 610; CHECK-NEXT: br i1 %[[VAR_COND]], label %loop_begin, label %loop_exit 611 612loop_exit: 613 %xy.lcssa = phi i32 [ %x, %loop_begin ], [ %y, %do_something ] 614 ret i32 %xy.lcssa 615; CHECK: loop_exit: 616; CHECK-NEXT: %[[LCSSA:.*]] = phi i32 [ %x, %loop_begin ], [ %y, %do_something ] 617; CHECK-NEXT: br label %loop_exit.split 618; 619; CHECK: loop_exit.split: 620; CHECK-NEXT: %[[LCSSA_SPLIT:.*]] = phi i32 [ %x, %entry ], [ %[[LCSSA]], %loop_exit ] 621; CHECK-NEXT: ret i32 %[[LCSSA_SPLIT]] 622} 623 624; Unswitch will not actually change the loop nest from: 625; A < B < C 626define void @hoist_inner_loop0() { 627; CHECK-LABEL: define void @hoist_inner_loop0( 628entry: 629 br label %a.header 630; CHECK: entry: 631; CHECK-NEXT: br label %a.header 632 633a.header: 634 br label %b.header 635; CHECK: a.header: 636; CHECK-NEXT: br label %b.header 637 638b.header: 639 %v1 = call i1 @cond() 640 br label %c.header 641; CHECK: b.header: 642; CHECK-NEXT: %v1 = call i1 @cond() 643; CHECK-NEXT: br i1 %v1, label %[[B_LATCH_SPLIT:.*]], label %[[B_HEADER_SPLIT:.*]] 644; 645; CHECK: [[B_HEADER_SPLIT]]: 646; CHECK-NEXT: br label %c.header 647 648c.header: 649 br i1 %v1, label %b.latch, label %c.latch 650; CHECK: c.header: 651; CHECK-NEXT: br label %c.latch 652 653c.latch: 654 %v2 = call i1 @cond() 655 br i1 %v2, label %c.header, label %b.latch 656; CHECK: c.latch: 657; CHECK-NEXT: %v2 = call i1 @cond() 658; CHECK-NEXT: br i1 %v2, label %c.header, label %b.latch 659 660b.latch: 661 %v3 = call i1 @cond() 662 br i1 %v3, label %b.header, label %a.latch 663; CHECK: b.latch: 664; CHECK-NEXT: br label %[[B_LATCH_SPLIT]] 665; 666; CHECK: [[B_LATCH_SPLIT]]: 667; CHECK-NEXT: %v3 = call i1 @cond() 668; CHECK-NEXT: br i1 %v3, label %b.header, label %a.latch 669 670a.latch: 671 br label %a.header 672; CHECK: a.latch: 673; CHECK-NEXT: br label %a.header 674 675exit: 676 ret void 677; CHECK: exit: 678; CHECK-NEXT: ret void 679} 680 681; Unswitch will transform the loop nest from: 682; A < B < C 683; into 684; A < (B, C) 685define void @hoist_inner_loop1(i32* %ptr) { 686; CHECK-LABEL: define void @hoist_inner_loop1( 687entry: 688 br label %a.header 689; CHECK: entry: 690; CHECK-NEXT: br label %a.header 691 692a.header: 693 %x.a = load i32, i32* %ptr 694 br label %b.header 695; CHECK: a.header: 696; CHECK-NEXT: %x.a = load i32, i32* %ptr 697; CHECK-NEXT: br label %b.header 698 699b.header: 700 %x.b = load i32, i32* %ptr 701 %v1 = call i1 @cond() 702 br label %c.header 703; CHECK: b.header: 704; CHECK-NEXT: %x.b = load i32, i32* %ptr 705; CHECK-NEXT: %v1 = call i1 @cond() 706; CHECK-NEXT: br i1 %v1, label %b.latch, label %[[B_HEADER_SPLIT:.*]] 707; 708; CHECK: [[B_HEADER_SPLIT]]: 709; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 710; CHECK-NEXT: br label %c.header 711 712c.header: 713 br i1 %v1, label %b.latch, label %c.latch 714; CHECK: c.header: 715; CHECK-NEXT: br label %c.latch 716 717c.latch: 718 ; Use values from other loops to check LCSSA form. 719 store i32 %x.a, i32* %ptr 720 store i32 %x.b, i32* %ptr 721 %v2 = call i1 @cond() 722 br i1 %v2, label %c.header, label %a.exit.c 723; CHECK: c.latch: 724; CHECK-NEXT: store i32 %x.a, i32* %ptr 725; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 726; CHECK-NEXT: %v2 = call i1 @cond() 727; CHECK-NEXT: br i1 %v2, label %c.header, label %a.exit.c 728 729b.latch: 730 %v3 = call i1 @cond() 731 br i1 %v3, label %b.header, label %a.exit.b 732; CHECK: b.latch: 733; CHECK-NEXT: %v3 = call i1 @cond() 734; CHECK-NEXT: br i1 %v3, label %b.header, label %a.exit.b 735 736a.exit.c: 737 br label %a.latch 738; CHECK: a.exit.c 739; CHECK-NEXT: br label %a.latch 740 741a.exit.b: 742 br label %a.latch 743; CHECK: a.exit.b: 744; CHECK-NEXT: br label %a.latch 745 746a.latch: 747 br label %a.header 748; CHECK: a.latch: 749; CHECK-NEXT: br label %a.header 750 751exit: 752 ret void 753; CHECK: exit: 754; CHECK-NEXT: ret void 755} 756 757; Unswitch will transform the loop nest from: 758; A < B < C 759; into 760; (A < B), C 761define void @hoist_inner_loop2(i32* %ptr) { 762; CHECK-LABEL: define void @hoist_inner_loop2( 763entry: 764 br label %a.header 765; CHECK: entry: 766; CHECK-NEXT: br label %a.header 767 768a.header: 769 %x.a = load i32, i32* %ptr 770 br label %b.header 771; CHECK: a.header: 772; CHECK-NEXT: %x.a = load i32, i32* %ptr 773; CHECK-NEXT: br label %b.header 774 775b.header: 776 %x.b = load i32, i32* %ptr 777 %v1 = call i1 @cond() 778 br label %c.header 779; CHECK: b.header: 780; CHECK-NEXT: %x.b = load i32, i32* %ptr 781; CHECK-NEXT: %v1 = call i1 @cond() 782; CHECK-NEXT: br i1 %v1, label %b.latch, label %[[B_HEADER_SPLIT:.*]] 783; 784; CHECK: [[B_HEADER_SPLIT]]: 785; CHECK-NEXT: %[[X_A_LCSSA:.*]] = phi i32 [ %x.a, %b.header ] 786; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 787; CHECK-NEXT: br label %c.header 788 789c.header: 790 br i1 %v1, label %b.latch, label %c.latch 791; CHECK: c.header: 792; CHECK-NEXT: br label %c.latch 793 794c.latch: 795 ; Use values from other loops to check LCSSA form. 796 store i32 %x.a, i32* %ptr 797 store i32 %x.b, i32* %ptr 798 %v2 = call i1 @cond() 799 br i1 %v2, label %c.header, label %exit 800; CHECK: c.latch: 801; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr 802; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 803; CHECK-NEXT: %v2 = call i1 @cond() 804; CHECK-NEXT: br i1 %v2, label %c.header, label %exit 805 806b.latch: 807 %v3 = call i1 @cond() 808 br i1 %v3, label %b.header, label %a.latch 809; CHECK: b.latch: 810; CHECK-NEXT: %v3 = call i1 @cond() 811; CHECK-NEXT: br i1 %v3, label %b.header, label %a.latch 812 813a.latch: 814 br label %a.header 815; CHECK: a.latch: 816; CHECK-NEXT: br label %a.header 817 818exit: 819 ret void 820; CHECK: exit: 821; CHECK-NEXT: ret void 822} 823 824; Same as @hoist_inner_loop2 but with a nested loop inside the hoisted loop. 825; Unswitch will transform the loop nest from: 826; A < B < C < D 827; into 828; (A < B), (C < D) 829define void @hoist_inner_loop3(i32* %ptr) { 830; CHECK-LABEL: define void @hoist_inner_loop3( 831entry: 832 br label %a.header 833; CHECK: entry: 834; CHECK-NEXT: br label %a.header 835 836a.header: 837 %x.a = load i32, i32* %ptr 838 br label %b.header 839; CHECK: a.header: 840; CHECK-NEXT: %x.a = load i32, i32* %ptr 841; CHECK-NEXT: br label %b.header 842 843b.header: 844 %x.b = load i32, i32* %ptr 845 %v1 = call i1 @cond() 846 br label %c.header 847; CHECK: b.header: 848; CHECK-NEXT: %x.b = load i32, i32* %ptr 849; CHECK-NEXT: %v1 = call i1 @cond() 850; CHECK-NEXT: br i1 %v1, label %b.latch, label %[[B_HEADER_SPLIT:.*]] 851; 852; CHECK: [[B_HEADER_SPLIT]]: 853; CHECK-NEXT: %[[X_A_LCSSA:.*]] = phi i32 [ %x.a, %b.header ] 854; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 855; CHECK-NEXT: br label %c.header 856 857c.header: 858 br i1 %v1, label %b.latch, label %c.body 859; CHECK: c.header: 860; CHECK-NEXT: br label %c.body 861 862c.body: 863 %x.c = load i32, i32* %ptr 864 br label %d.header 865; CHECK: c.body: 866; CHECK-NEXT: %x.c = load i32, i32* %ptr 867; CHECK-NEXT: br label %d.header 868 869d.header: 870 ; Use values from other loops to check LCSSA form. 871 store i32 %x.a, i32* %ptr 872 store i32 %x.b, i32* %ptr 873 store i32 %x.c, i32* %ptr 874 %v2 = call i1 @cond() 875 br i1 %v2, label %d.header, label %c.latch 876; CHECK: d.header: 877; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr 878; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 879; CHECK-NEXT: store i32 %x.c, i32* %ptr 880; CHECK-NEXT: %v2 = call i1 @cond() 881; CHECK-NEXT: br i1 %v2, label %d.header, label %c.latch 882 883c.latch: 884 %v3 = call i1 @cond() 885 br i1 %v3, label %c.header, label %exit 886; CHECK: c.latch: 887; CHECK-NEXT: %v3 = call i1 @cond() 888; CHECK-NEXT: br i1 %v3, label %c.header, label %exit 889 890b.latch: 891 %v4 = call i1 @cond() 892 br i1 %v4, label %b.header, label %a.latch 893; CHECK: b.latch: 894; CHECK-NEXT: %v4 = call i1 @cond() 895; CHECK-NEXT: br i1 %v4, label %b.header, label %a.latch 896 897a.latch: 898 br label %a.header 899; CHECK: a.latch: 900; CHECK-NEXT: br label %a.header 901 902exit: 903 ret void 904; CHECK: exit: 905; CHECK-NEXT: ret void 906} 907 908; This test is designed to exercise checking multiple remaining exits from the 909; loop being unswitched. 910; Unswitch will transform the loop nest from: 911; A < B < C < D 912; into 913; A < B < (C, D) 914define void @hoist_inner_loop4() { 915; CHECK-LABEL: define void @hoist_inner_loop4( 916entry: 917 br label %a.header 918; CHECK: entry: 919; CHECK-NEXT: br label %a.header 920 921a.header: 922 br label %b.header 923; CHECK: a.header: 924; CHECK-NEXT: br label %b.header 925 926b.header: 927 br label %c.header 928; CHECK: b.header: 929; CHECK-NEXT: br label %c.header 930 931c.header: 932 %v1 = call i1 @cond() 933 br label %d.header 934; CHECK: c.header: 935; CHECK-NEXT: %v1 = call i1 @cond() 936; CHECK-NEXT: br i1 %v1, label %[[C_HEADER_SPLIT:.*]], label %c.latch 937; 938; CHECK: [[C_HEADER_SPLIT]]: 939; CHECK-NEXT: br label %d.header 940 941d.header: 942 br i1 %v1, label %d.exiting1, label %c.latch 943; CHECK: d.header: 944; CHECK-NEXT: br label %d.exiting1 945 946d.exiting1: 947 %v2 = call i1 @cond() 948 br i1 %v2, label %d.exiting2, label %a.latch 949; CHECK: d.exiting1: 950; CHECK-NEXT: %v2 = call i1 @cond() 951; CHECK-NEXT: br i1 %v2, label %d.exiting2, label %a.latch 952 953d.exiting2: 954 %v3 = call i1 @cond() 955 br i1 %v3, label %d.exiting3, label %loopexit.d 956; CHECK: d.exiting2: 957; CHECK-NEXT: %v3 = call i1 @cond() 958; CHECK-NEXT: br i1 %v3, label %d.exiting3, label %loopexit.d 959 960d.exiting3: 961 %v4 = call i1 @cond() 962 br i1 %v4, label %d.latch, label %b.latch 963; CHECK: d.exiting3: 964; CHECK-NEXT: %v4 = call i1 @cond() 965; CHECK-NEXT: br i1 %v4, label %d.latch, label %b.latch 966 967d.latch: 968 br label %d.header 969; CHECK: d.latch: 970; CHECK-NEXT: br label %d.header 971 972c.latch: 973 %v5 = call i1 @cond() 974 br i1 %v5, label %c.header, label %loopexit.c 975; CHECK: c.latch: 976; CHECK-NEXT: %v5 = call i1 @cond() 977; CHECK-NEXT: br i1 %v5, label %c.header, label %loopexit.c 978 979b.latch: 980 br label %b.header 981; CHECK: b.latch: 982; CHECK-NEXT: br label %b.header 983 984a.latch: 985 br label %a.header 986; CHECK: a.latch: 987; CHECK-NEXT: br label %a.header 988 989loopexit.d: 990 br label %exit 991; CHECK: loopexit.d: 992; CHECK-NEXT: br label %exit 993 994loopexit.c: 995 br label %exit 996; CHECK: loopexit.c: 997; CHECK-NEXT: br label %exit 998 999exit: 1000 ret void 1001; CHECK: exit: 1002; CHECK-NEXT: ret void 1003} 1004 1005; Unswitch will transform the loop nest from: 1006; A < B < C < D 1007; into 1008; A < ((B < C), D) 1009define void @hoist_inner_loop5(i32* %ptr) { 1010; CHECK-LABEL: define void @hoist_inner_loop5( 1011entry: 1012 br label %a.header 1013; CHECK: entry: 1014; CHECK-NEXT: br label %a.header 1015 1016a.header: 1017 %x.a = load i32, i32* %ptr 1018 br label %b.header 1019; CHECK: a.header: 1020; CHECK-NEXT: %x.a = load i32, i32* %ptr 1021; CHECK-NEXT: br label %b.header 1022 1023b.header: 1024 %x.b = load i32, i32* %ptr 1025 br label %c.header 1026; CHECK: b.header: 1027; CHECK-NEXT: %x.b = load i32, i32* %ptr 1028; CHECK-NEXT: br label %c.header 1029 1030c.header: 1031 %x.c = load i32, i32* %ptr 1032 %v1 = call i1 @cond() 1033 br label %d.header 1034; CHECK: c.header: 1035; CHECK-NEXT: %x.c = load i32, i32* %ptr 1036; CHECK-NEXT: %v1 = call i1 @cond() 1037; CHECK-NEXT: br i1 %v1, label %c.latch, label %[[C_HEADER_SPLIT:.*]] 1038; 1039; CHECK: [[C_HEADER_SPLIT]]: 1040; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %c.header ] 1041; CHECK-NEXT: %[[X_C_LCSSA:.*]] = phi i32 [ %x.c, %c.header ] 1042; CHECK-NEXT: br label %d.header 1043 1044d.header: 1045 br i1 %v1, label %c.latch, label %d.latch 1046; CHECK: d.header: 1047; CHECK-NEXT: br label %d.latch 1048 1049d.latch: 1050 ; Use values from other loops to check LCSSA form. 1051 store i32 %x.a, i32* %ptr 1052 store i32 %x.b, i32* %ptr 1053 store i32 %x.c, i32* %ptr 1054 %v2 = call i1 @cond() 1055 br i1 %v2, label %d.header, label %a.latch 1056; CHECK: d.latch: 1057; CHECK-NEXT: store i32 %x.a, i32* %ptr 1058; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 1059; CHECK-NEXT: store i32 %[[X_C_LCSSA]], i32* %ptr 1060; CHECK-NEXT: %v2 = call i1 @cond() 1061; CHECK-NEXT: br i1 %v2, label %d.header, label %a.latch 1062 1063c.latch: 1064 %v3 = call i1 @cond() 1065 br i1 %v3, label %c.header, label %b.latch 1066; CHECK: c.latch: 1067; CHECK-NEXT: %v3 = call i1 @cond() 1068; CHECK-NEXT: br i1 %v3, label %c.header, label %b.latch 1069 1070b.latch: 1071 br label %b.header 1072; CHECK: b.latch: 1073; CHECK-NEXT: br label %b.header 1074 1075a.latch: 1076 br label %a.header 1077; CHECK: a.latch: 1078; CHECK-NEXT: br label %a.header 1079 1080exit: 1081 ret void 1082; CHECK: exit: 1083; CHECK-NEXT: ret void 1084} 1085 1086; Same as `@hoist_inner_loop2` but using a switch. 1087; Unswitch will transform the loop nest from: 1088; A < B < C 1089; into 1090; (A < B), C 1091define void @hoist_inner_loop_switch(i32* %ptr) { 1092; CHECK-LABEL: define void @hoist_inner_loop_switch( 1093entry: 1094 br label %a.header 1095; CHECK: entry: 1096; CHECK-NEXT: br label %a.header 1097 1098a.header: 1099 %x.a = load i32, i32* %ptr 1100 br label %b.header 1101; CHECK: a.header: 1102; CHECK-NEXT: %x.a = load i32, i32* %ptr 1103; CHECK-NEXT: br label %b.header 1104 1105b.header: 1106 %x.b = load i32, i32* %ptr 1107 %v1 = call i32 @cond.i32() 1108 br label %c.header 1109; CHECK: b.header: 1110; CHECK-NEXT: %x.b = load i32, i32* %ptr 1111; CHECK-NEXT: %v1 = call i32 @cond.i32() 1112; CHECK-NEXT: switch i32 %v1, label %[[B_HEADER_SPLIT:.*]] [ 1113; CHECK-NEXT: i32 1, label %b.latch 1114; CHECK-NEXT: i32 2, label %b.latch 1115; CHECK-NEXT: i32 3, label %b.latch 1116; CHECK-NEXT: ] 1117; 1118; CHECK: [[B_HEADER_SPLIT]]: 1119; CHECK-NEXT: %[[X_A_LCSSA:.*]] = phi i32 [ %x.a, %b.header ] 1120; CHECK-NEXT: %[[X_B_LCSSA:.*]] = phi i32 [ %x.b, %b.header ] 1121; CHECK-NEXT: br label %c.header 1122 1123c.header: 1124 switch i32 %v1, label %c.latch [ 1125 i32 1, label %b.latch 1126 i32 2, label %b.latch 1127 i32 3, label %b.latch 1128 ] 1129; CHECK: c.header: 1130; CHECK-NEXT: br label %c.latch 1131 1132c.latch: 1133 ; Use values from other loops to check LCSSA form. 1134 store i32 %x.a, i32* %ptr 1135 store i32 %x.b, i32* %ptr 1136 %v2 = call i1 @cond() 1137 br i1 %v2, label %c.header, label %exit 1138; CHECK: c.latch: 1139; CHECK-NEXT: store i32 %[[X_A_LCSSA]], i32* %ptr 1140; CHECK-NEXT: store i32 %[[X_B_LCSSA]], i32* %ptr 1141; CHECK-NEXT: %v2 = call i1 @cond() 1142; CHECK-NEXT: br i1 %v2, label %c.header, label %exit 1143 1144b.latch: 1145 %v3 = call i1 @cond() 1146 br i1 %v3, label %b.header, label %a.latch 1147; CHECK: b.latch: 1148; CHECK-NEXT: %v3 = call i1 @cond() 1149; CHECK-NEXT: br i1 %v3, label %b.header, label %a.latch 1150 1151a.latch: 1152 br label %a.header 1153; CHECK: a.latch: 1154; CHECK-NEXT: br label %a.header 1155 1156exit: 1157 ret void 1158; CHECK: exit: 1159; CHECK-NEXT: ret void 1160} 1161 1162define void @test_unswitch_to_common_succ_with_phis(i32* %var, i32 %cond) { 1163; CHECK-LABEL: @test_unswitch_to_common_succ_with_phis( 1164entry: 1165 br label %header 1166; CHECK-NEXT: entry: 1167; CHECK-NEXT: switch i32 %cond, label %loopexit1 [ 1168; CHECK-NEXT: i32 13, label %loopexit2 1169; CHECK-NEXT: i32 0, label %entry.split 1170; CHECK-NEXT: i32 1, label %entry.split 1171; CHECK-NEXT: ] 1172; 1173; CHECK: entry.split: 1174; CHECK-NEXT: br label %header 1175 1176header: 1177 %var_val = load i32, i32* %var 1178 switch i32 %cond, label %loopexit1 [ 1179 i32 0, label %latch 1180 i32 1, label %latch 1181 i32 13, label %loopexit2 1182 ] 1183; CHECK: header: 1184; CHECK-NEXT: load 1185; CHECK-NEXT: br label %latch 1186 1187latch: 1188 ; No-op PHI node to exercise weird PHI update scenarios. 1189 %phi = phi i32 [ %var_val, %header ], [ %var_val, %header ] 1190 call void @sink(i32 %phi) 1191 br label %header 1192; CHECK: latch: 1193; CHECK-NEXT: %[[PHI:.*]] = phi i32 [ %var_val, %header ] 1194; CHECK-NEXT: call void @sink(i32 %[[PHI]]) 1195; CHECK-NEXT: br label %header 1196 1197loopexit1: 1198 ret void 1199; CHECK: loopexit1: 1200; CHECK-NEXT: ret 1201 1202loopexit2: 1203 ret void 1204; CHECK: loopexit2: 1205; CHECK-NEXT: ret 1206} 1207 1208define void @test_unswitch_to_default_common_succ_with_phis(i32* %var, i32 %cond) { 1209; CHECK-LABEL: @test_unswitch_to_default_common_succ_with_phis( 1210entry: 1211 br label %header 1212; CHECK-NEXT: entry: 1213; CHECK-NEXT: switch i32 %cond, label %entry.split [ 1214; CHECK-NEXT: i32 13, label %loopexit 1215; CHECK-NEXT: ] 1216; 1217; CHECK: entry.split: 1218; CHECK-NEXT: br label %header 1219 1220header: 1221 %var_val = load i32, i32* %var 1222 switch i32 %cond, label %latch [ 1223 i32 0, label %latch 1224 i32 1, label %latch 1225 i32 13, label %loopexit 1226 ] 1227; CHECK: header: 1228; CHECK-NEXT: load 1229; CHECK-NEXT: br label %latch 1230 1231latch: 1232 ; No-op PHI node to exercise weird PHI update scenarios. 1233 %phi = phi i32 [ %var_val, %header ], [ %var_val, %header ], [ %var_val, %header ] 1234 call void @sink(i32 %phi) 1235 br label %header 1236; CHECK: latch: 1237; CHECK-NEXT: %[[PHI:.*]] = phi i32 [ %var_val, %header ] 1238; CHECK-NEXT: call void @sink(i32 %[[PHI]]) 1239; CHECK-NEXT: br label %header 1240 1241loopexit: 1242 ret void 1243; CHECK: loopexit: 1244; CHECK-NEXT: ret 1245} 1246