1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -basic-aa -slp-vectorizer -S -mtriple=x86_64-unknown -mcpu=corei7-avx | FileCheck %s 3 4%struct.complex = type { float, float } 5 6define void @foo (%struct.complex* %A, %struct.complex* %B, %struct.complex* %Result) { 7; CHECK-LABEL: @foo( 8; CHECK-NEXT: entry: 9; CHECK-NEXT: [[TMP0:%.*]] = add i64 256, 0 10; CHECK-NEXT: br label [[LOOP:%.*]] 11; CHECK: loop: 12; CHECK-NEXT: [[TMP1:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[TMP20:%.*]], [[LOOP]] ] 13; CHECK-NEXT: [[TMP2:%.*]] = phi <2 x float> [ zeroinitializer, [[ENTRY]] ], [ [[TMP19:%.*]], [[LOOP]] ] 14; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_COMPLEX:%.*]], %struct.complex* [[A:%.*]], i64 [[TMP1]], i32 0 15; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_COMPLEX]], %struct.complex* [[B:%.*]], i64 [[TMP1]], i32 0 16; CHECK-NEXT: [[TMP5:%.*]] = load float, float* [[TMP4]], align 4 17; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_COMPLEX]], %struct.complex* [[B]], i64 [[TMP1]], i32 1 18; CHECK-NEXT: [[TMP7:%.*]] = load float, float* [[TMP6]], align 4 19; CHECK-NEXT: [[TMP8:%.*]] = bitcast float* [[TMP3]] to <2 x float>* 20; CHECK-NEXT: [[TMP9:%.*]] = load <2 x float>, <2 x float>* [[TMP8]], align 4 21; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i32 0 22; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x float> [[TMP10]], float [[TMP5]], i32 1 23; CHECK-NEXT: [[TMP12:%.*]] = fmul <2 x float> [[TMP9]], [[TMP11]] 24; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x float> poison, float [[TMP7]], i32 0 25; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x float> [[TMP13]], float [[TMP7]], i32 1 26; CHECK-NEXT: [[TMP15:%.*]] = fmul <2 x float> [[TMP9]], [[TMP14]] 27; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[TMP15]], <2 x float> poison, <2 x i32> <i32 1, i32 0> 28; CHECK-NEXT: [[TMP16:%.*]] = fsub <2 x float> [[TMP12]], [[SHUFFLE]] 29; CHECK-NEXT: [[TMP17:%.*]] = fadd <2 x float> [[TMP12]], [[SHUFFLE]] 30; CHECK-NEXT: [[TMP18:%.*]] = shufflevector <2 x float> [[TMP16]], <2 x float> [[TMP17]], <2 x i32> <i32 0, i32 3> 31; CHECK-NEXT: [[TMP19]] = fadd <2 x float> [[TMP2]], [[TMP18]] 32; CHECK-NEXT: [[TMP20]] = add nuw nsw i64 [[TMP1]], 1 33; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i64 [[TMP20]], [[TMP0]] 34; CHECK-NEXT: br i1 [[TMP21]], label [[EXIT:%.*]], label [[LOOP]] 35; CHECK: exit: 36; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_COMPLEX]], %struct.complex* [[RESULT:%.*]], i32 0, i32 0 37; CHECK-NEXT: [[TMP23:%.*]] = bitcast float* [[TMP22]] to <2 x float>* 38; CHECK-NEXT: store <2 x float> [[TMP19]], <2 x float>* [[TMP23]], align 4 39; CHECK-NEXT: ret void 40; 41entry: 42 %0 = add i64 256, 0 43 br label %loop 44 45loop: 46 %1 = phi i64 [ 0, %entry ], [ %20, %loop ] 47 %2 = phi float [ 0.000000e+00, %entry ], [ %19, %loop ] 48 %3 = phi float [ 0.000000e+00, %entry ], [ %18, %loop ] 49 %4 = getelementptr inbounds %"struct.complex", %"struct.complex"* %A, i64 %1, i32 0 50 %5 = load float, float* %4, align 4 51 %6 = getelementptr inbounds %"struct.complex", %"struct.complex"* %A, i64 %1, i32 1 52 %7 = load float, float* %6, align 4 53 %8 = getelementptr inbounds %"struct.complex", %"struct.complex"* %B, i64 %1, i32 0 54 %9 = load float, float* %8, align 4 55 %10 = getelementptr inbounds %"struct.complex", %"struct.complex"* %B, i64 %1, i32 1 56 %11 = load float, float* %10, align 4 57 %12 = fmul float %5, %9 58 %13 = fmul float %7, %11 59 %14 = fsub float %12, %13 60 %15 = fmul float %7, %9 61 %16 = fmul float %5, %11 62 %17 = fadd float %15, %16 63 %18 = fadd float %3, %14 64 %19 = fadd float %2, %17 65 %20 = add nuw nsw i64 %1, 1 66 %21 = icmp eq i64 %20, %0 67 br i1 %21, label %exit, label %loop 68 69exit: 70 %22 = getelementptr inbounds %"struct.complex", %"struct.complex"* %Result, i32 0, i32 0 71 store float %18, float* %22, align 4 72 %23 = getelementptr inbounds %"struct.complex", %"struct.complex"* %Result, i32 0, i32 1 73 store float %19, float* %23, align 4 74 ret void 75} 76 77