1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2;RUN: opt -S -slp-vectorizer -mtriple=x86_64-unknown-linux-android23 < %s | FileCheck %s
3
4define void @test() {
5; CHECK-LABEL: @test(
6; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds float, ptr undef, i32 2
7; CHECK-NEXT:    [[TMP2:%.*]] = load <2 x float>, ptr [[TMP1]], align 4
8; CHECK-NEXT:    [[TMP3:%.*]] = load <2 x float>, ptr undef, align 4
9; CHECK-NEXT:    [[TMP4:%.*]] = fsub <2 x float> [[TMP2]], [[TMP3]]
10; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0
11; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i32 1
12; CHECK-NEXT:    [[TMP7:%.*]] = fcmp olt float [[TMP6]], [[TMP5]]
13; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <2 x float> [[TMP3]], i32 0
14; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
15; CHECK-NEXT:    [[TMP10:%.*]] = insertelement <2 x float> zeroinitializer, float 0.000000e+00, i64 0
16; CHECK-NEXT:    store <2 x float> zeroinitializer, ptr null, align 4
17; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <2 x float> [[TMP2]], i32 1
18; CHECK-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP11]], i64 0
19; CHECK-NEXT:    store <2 x float> zeroinitializer, ptr null, align 4
20; CHECK-NEXT:    ret void
21;
22  %1 = getelementptr inbounds float, ptr undef, i32 2
23  %2 = load float, ptr %1, align 4
24  %3 = load float, ptr undef, align 4
25  %4 = fsub float %2, %3
26  %5 = getelementptr inbounds float, ptr undef, i32 3
27  %6 = load float, ptr %5, align 4
28  %7 = getelementptr inbounds float, ptr undef, i32 1
29  %8 = load float, ptr %7, align 4
30  %9 = fsub float %6, %8
31  %10 = fcmp olt float %9, %4
32  %11 = insertelement <2 x float> undef, float %3, i64 0
33  %12 = insertelement <2 x float> zeroinitializer, float 0.000000e+00, i64 0
34  store <2 x float> zeroinitializer, ptr null, align 4
35  %13 = insertelement <2 x float> %11, float %6, i64 0
36  store <2 x float> zeroinitializer, ptr null, align 4
37  ret void
38}
39
40define void @test1() {
41; CHECK-LABEL: @test1(
42; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds float, ptr undef, i32 2
43; CHECK-NEXT:    [[TMP2:%.*]] = load <2 x float>, ptr [[TMP1]], align 4
44; CHECK-NEXT:    [[TMP3:%.*]] = load <2 x float>, ptr undef, align 4
45; CHECK-NEXT:    [[TMP4:%.*]] = fsub <2 x float> [[TMP2]], [[TMP3]]
46; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i32 0
47; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i32 1
48; CHECK-NEXT:    [[TMP7:%.*]] = fcmp olt float [[TMP6]], [[TMP5]]
49; CHECK-NEXT:    [[TMP8:%.*]] = extractelement <2 x float> [[TMP3]], i32 0
50; CHECK-NEXT:    [[DOTSROA_0_0_VEC_INSERT_I5_I10:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
51; CHECK-NEXT:    [[TMP9:%.*]] = extractelement <2 x float> [[TMP3]], i32 1
52; CHECK-NEXT:    [[DOTSROA_0_4_VEC_INSERT_I10_I13:%.*]] = insertelement <2 x float> [[DOTSROA_0_0_VEC_INSERT_I5_I10]], float [[TMP9]], i64 1
53; CHECK-NEXT:    store <2 x float> [[DOTSROA_0_4_VEC_INSERT_I10_I13]], ptr null, align 4
54; CHECK-NEXT:    [[TMP10:%.*]] = extractelement <2 x float> [[TMP2]], i32 1
55; CHECK-NEXT:    [[DOTSROA_0_4_VEC_INSERT_I10_I13_2:%.*]] = insertelement <2 x float> [[DOTSROA_0_0_VEC_INSERT_I5_I10]], float [[TMP10]], i64 1
56; CHECK-NEXT:    store <2 x float> [[DOTSROA_0_4_VEC_INSERT_I10_I13_2]], ptr null, align 4
57; CHECK-NEXT:    ret void
58;
59  %1 = getelementptr inbounds float, ptr undef, i32 2
60  %2 = load float, ptr %1, align 4
61  %3 = load float, ptr undef, align 4
62  %4 = fsub float %2, %3
63  %5 = getelementptr inbounds float, ptr undef, i32 3
64  %6 = load float, ptr %5, align 4
65  %7 = getelementptr inbounds float, ptr undef, i32 1
66  %8 = load float, ptr %7, align 4
67  %9 = fsub float %6, %8
68  %10 = fcmp olt float %9, %4
69  %.sroa.0.0.vec.insert.i5.i10 = insertelement <2 x float> undef, float %3, i64 0
70  %.sroa.0.4.vec.insert.i10.i13 = insertelement <2 x float> %.sroa.0.0.vec.insert.i5.i10, float %8, i64 1
71  store <2 x float> %.sroa.0.4.vec.insert.i10.i13, ptr null, align 4
72  %.sroa.0.4.vec.insert.i10.i13.2 = insertelement <2 x float> %.sroa.0.0.vec.insert.i5.i10, float %6, i64 1
73  store <2 x float> %.sroa.0.4.vec.insert.i10.i13.2, ptr null, align 4
74  ret void
75}
76
77