1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -basic-aa -slp-vectorizer -S -mtriple=x86_64-unknown -mcpu=x86-64    -basic-aa -slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,SSE2
3; RUN: opt < %s -basic-aa -slp-vectorizer -S -mtriple=x86_64-unknown -mcpu=x86-64-v2 -basic-aa -slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,SSE4
4; RUN: opt < %s -basic-aa -slp-vectorizer -S -mtriple=x86_64-unknown -mcpu=x86-64-v3 -basic-aa -slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX
5; RUN: opt < %s -basic-aa -slp-vectorizer -S -mtriple=x86_64-unknown -mcpu=x86-64-v4 -basic-aa -slp-vectorizer -S | FileCheck %s --check-prefixes=CHECK,AVX
6
7; // PR42652
8; unsigned long bitmask_16xi8(const char *src) {
9;     unsigned long mask = 0;
10;     for (unsigned i = 0; i != 16; ++i) {
11;       if (src[i])
12;         mask |= (1ull << i);
13;     }
14;     return mask;
15; }
16
17define i64 @bitmask_16xi8(ptr nocapture noundef readonly %src) {
18; CHECK-LABEL: @bitmask_16xi8(
19; CHECK-NEXT:  entry:
20; CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr [[SRC:%.*]], align 1
21; CHECK-NEXT:    [[TOBOOL_NOT:%.*]] = icmp ne i8 [[TMP0]], 0
22; CHECK-NEXT:    [[OR:%.*]] = zext i1 [[TOBOOL_NOT]] to i64
23; CHECK-NEXT:    [[ARRAYIDX_1:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 1
24; CHECK-NEXT:    [[TMP1:%.*]] = load <8 x i8>, ptr [[ARRAYIDX_1]], align 1
25; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <8 x i8> [[TMP1]], zeroinitializer
26; CHECK-NEXT:    [[TMP3:%.*]] = select <8 x i1> [[TMP2]], <8 x i64> zeroinitializer, <8 x i64> <i64 2, i64 4, i64 8, i64 16, i64 32, i64 64, i64 128, i64 256>
27; CHECK-NEXT:    [[ARRAYIDX_9:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 9
28; CHECK-NEXT:    [[TMP4:%.*]] = load <4 x i8>, ptr [[ARRAYIDX_9]], align 1
29; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq <4 x i8> [[TMP4]], zeroinitializer
30; CHECK-NEXT:    [[TMP6:%.*]] = select <4 x i1> [[TMP5]], <4 x i64> zeroinitializer, <4 x i64> <i64 512, i64 1024, i64 2048, i64 4096>
31; CHECK-NEXT:    [[ARRAYIDX_13:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 13
32; CHECK-NEXT:    [[TMP7:%.*]] = load i8, ptr [[ARRAYIDX_13]], align 1
33; CHECK-NEXT:    [[TOBOOL_NOT_13:%.*]] = icmp eq i8 [[TMP7]], 0
34; CHECK-NEXT:    [[OR_13:%.*]] = select i1 [[TOBOOL_NOT_13]], i64 0, i64 8192
35; CHECK-NEXT:    [[ARRAYIDX_14:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 14
36; CHECK-NEXT:    [[TMP8:%.*]] = load i8, ptr [[ARRAYIDX_14]], align 1
37; CHECK-NEXT:    [[TOBOOL_NOT_14:%.*]] = icmp eq i8 [[TMP8]], 0
38; CHECK-NEXT:    [[OR_14:%.*]] = select i1 [[TOBOOL_NOT_14]], i64 0, i64 16384
39; CHECK-NEXT:    [[ARRAYIDX_15:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i64 15
40; CHECK-NEXT:    [[TMP9:%.*]] = load i8, ptr [[ARRAYIDX_15]], align 1
41; CHECK-NEXT:    [[TOBOOL_NOT_15:%.*]] = icmp eq i8 [[TMP9]], 0
42; CHECK-NEXT:    [[OR_15:%.*]] = select i1 [[TOBOOL_NOT_15]], i64 0, i64 32768
43; CHECK-NEXT:    [[TMP10:%.*]] = call i64 @llvm.vector.reduce.or.v8i64(<8 x i64> [[TMP3]])
44; CHECK-NEXT:    [[TMP11:%.*]] = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> [[TMP6]])
45; CHECK-NEXT:    [[OP_RDX:%.*]] = or i64 [[TMP10]], [[TMP11]]
46; CHECK-NEXT:    [[OP_RDX1:%.*]] = or i64 [[OP_RDX]], [[OR_13]]
47; CHECK-NEXT:    [[OP_RDX2:%.*]] = or i64 [[OP_RDX1]], [[OR_14]]
48; CHECK-NEXT:    [[OP_RDX3:%.*]] = or i64 [[OP_RDX2]], [[OR_15]]
49; CHECK-NEXT:    [[OP_RDX4:%.*]] = or i64 [[OP_RDX3]], [[OR]]
50; CHECK-NEXT:    ret i64 [[OP_RDX4]]
51;
52entry:
53  %0 = load i8, ptr %src, align 1
54  %tobool.not = icmp ne i8 %0, 0
55  %or = zext i1 %tobool.not to i64
56  %arrayidx.1 = getelementptr inbounds i8, ptr %src, i64 1
57  %1 = load i8, ptr %arrayidx.1, align 1
58  %tobool.not.1 = icmp eq i8 %1, 0
59  %or.1 = select i1 %tobool.not.1, i64 0, i64 2
60  %mask.1.1 = or i64 %or.1, %or
61  %arrayidx.2 = getelementptr inbounds i8, ptr %src, i64 2
62  %2 = load i8, ptr %arrayidx.2, align 1
63  %tobool.not.2 = icmp eq i8 %2, 0
64  %or.2 = select i1 %tobool.not.2, i64 0, i64 4
65  %mask.1.2 = or i64 %or.2, %mask.1.1
66  %arrayidx.3 = getelementptr inbounds i8, ptr %src, i64 3
67  %3 = load i8, ptr %arrayidx.3, align 1
68  %tobool.not.3 = icmp eq i8 %3, 0
69  %or.3 = select i1 %tobool.not.3, i64 0, i64 8
70  %mask.1.3 = or i64 %or.3, %mask.1.2
71  %arrayidx.4 = getelementptr inbounds i8, ptr %src, i64 4
72  %4 = load i8, ptr %arrayidx.4, align 1
73  %tobool.not.4 = icmp eq i8 %4, 0
74  %or.4 = select i1 %tobool.not.4, i64 0, i64 16
75  %mask.1.4 = or i64 %or.4, %mask.1.3
76  %arrayidx.5 = getelementptr inbounds i8, ptr %src, i64 5
77  %5 = load i8, ptr %arrayidx.5, align 1
78  %tobool.not.5 = icmp eq i8 %5, 0
79  %or.5 = select i1 %tobool.not.5, i64 0, i64 32
80  %mask.1.5 = or i64 %or.5, %mask.1.4
81  %arrayidx.6 = getelementptr inbounds i8, ptr %src, i64 6
82  %6 = load i8, ptr %arrayidx.6, align 1
83  %tobool.not.6 = icmp eq i8 %6, 0
84  %or.6 = select i1 %tobool.not.6, i64 0, i64 64
85  %mask.1.6 = or i64 %or.6, %mask.1.5
86  %arrayidx.7 = getelementptr inbounds i8, ptr %src, i64 7
87  %7 = load i8, ptr %arrayidx.7, align 1
88  %tobool.not.7 = icmp eq i8 %7, 0
89  %or.7 = select i1 %tobool.not.7, i64 0, i64 128
90  %mask.1.7 = or i64 %or.7, %mask.1.6
91  %arrayidx.8 = getelementptr inbounds i8, ptr %src, i64 8
92  %8 = load i8, ptr %arrayidx.8, align 1
93  %tobool.not.8 = icmp eq i8 %8, 0
94  %or.8 = select i1 %tobool.not.8, i64 0, i64 256
95  %mask.1.8 = or i64 %or.8, %mask.1.7
96  %arrayidx.9 = getelementptr inbounds i8, ptr %src, i64 9
97  %9 = load i8, ptr %arrayidx.9, align 1
98  %tobool.not.9 = icmp eq i8 %9, 0
99  %or.9 = select i1 %tobool.not.9, i64 0, i64 512
100  %mask.1.9 = or i64 %or.9, %mask.1.8
101  %arrayidx.10 = getelementptr inbounds i8, ptr %src, i64 10
102  %10 = load i8, ptr %arrayidx.10, align 1
103  %tobool.not.10 = icmp eq i8 %10, 0
104  %or.10 = select i1 %tobool.not.10, i64 0, i64 1024
105  %mask.1.10 = or i64 %or.10, %mask.1.9
106  %arrayidx.11 = getelementptr inbounds i8, ptr %src, i64 11
107  %11 = load i8, ptr %arrayidx.11, align 1
108  %tobool.not.11 = icmp eq i8 %11, 0
109  %or.11 = select i1 %tobool.not.11, i64 0, i64 2048
110  %mask.1.11 = or i64 %or.11, %mask.1.10
111  %arrayidx.12 = getelementptr inbounds i8, ptr %src, i64 12
112  %12 = load i8, ptr %arrayidx.12, align 1
113  %tobool.not.12 = icmp eq i8 %12, 0
114  %or.12 = select i1 %tobool.not.12, i64 0, i64 4096
115  %mask.1.12 = or i64 %or.12, %mask.1.11
116  %arrayidx.13 = getelementptr inbounds i8, ptr %src, i64 13
117  %13 = load i8, ptr %arrayidx.13, align 1
118  %tobool.not.13 = icmp eq i8 %13, 0
119  %or.13 = select i1 %tobool.not.13, i64 0, i64 8192
120  %mask.1.13 = or i64 %or.13, %mask.1.12
121  %arrayidx.14 = getelementptr inbounds i8, ptr %src, i64 14
122  %14 = load i8, ptr %arrayidx.14, align 1
123  %tobool.not.14 = icmp eq i8 %14, 0
124  %or.14 = select i1 %tobool.not.14, i64 0, i64 16384
125  %mask.1.14 = or i64 %or.14, %mask.1.13
126  %arrayidx.15 = getelementptr inbounds i8, ptr %src, i64 15
127  %15 = load i8, ptr %arrayidx.15, align 1
128  %tobool.not.15 = icmp eq i8 %15, 0
129  %or.15 = select i1 %tobool.not.15, i64 0, i64 32768
130  %mask.1.15 = or i64 %or.15, %mask.1.14
131  ret i64 %mask.1.15
132}
133
134define i64 @bitmask_4xi16(ptr nocapture noundef readonly %src) {
135; CHECK-LABEL: @bitmask_4xi16(
136; CHECK-NEXT:  entry:
137; CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr [[SRC:%.*]], align 2
138; CHECK-NEXT:    [[TOBOOL_NOT:%.*]] = icmp ne i16 [[TMP0]], 0
139; CHECK-NEXT:    [[OR:%.*]] = zext i1 [[TOBOOL_NOT]] to i64
140; CHECK-NEXT:    [[ARRAYIDX_1:%.*]] = getelementptr inbounds i16, ptr [[SRC]], i64 1
141; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i16>, ptr [[ARRAYIDX_1]], align 2
142; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <4 x i16> [[TMP1]], zeroinitializer
143; CHECK-NEXT:    [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i64> zeroinitializer, <4 x i64> <i64 2, i64 4, i64 8, i64 16>
144; CHECK-NEXT:    [[ARRAYIDX_5:%.*]] = getelementptr inbounds i16, ptr [[SRC]], i64 5
145; CHECK-NEXT:    [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX_5]], align 2
146; CHECK-NEXT:    [[TOBOOL_NOT_5:%.*]] = icmp eq i16 [[TMP4]], 0
147; CHECK-NEXT:    [[OR_5:%.*]] = select i1 [[TOBOOL_NOT_5]], i64 0, i64 32
148; CHECK-NEXT:    [[ARRAYIDX_6:%.*]] = getelementptr inbounds i16, ptr [[SRC]], i64 6
149; CHECK-NEXT:    [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX_6]], align 2
150; CHECK-NEXT:    [[TOBOOL_NOT_6:%.*]] = icmp eq i16 [[TMP5]], 0
151; CHECK-NEXT:    [[OR_6:%.*]] = select i1 [[TOBOOL_NOT_6]], i64 0, i64 64
152; CHECK-NEXT:    [[ARRAYIDX_7:%.*]] = getelementptr inbounds i16, ptr [[SRC]], i64 7
153; CHECK-NEXT:    [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX_7]], align 2
154; CHECK-NEXT:    [[TOBOOL_NOT_7:%.*]] = icmp eq i16 [[TMP6]], 0
155; CHECK-NEXT:    [[OR_7:%.*]] = select i1 [[TOBOOL_NOT_7]], i64 0, i64 128
156; CHECK-NEXT:    [[TMP7:%.*]] = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> [[TMP3]])
157; CHECK-NEXT:    [[OP_RDX:%.*]] = or i64 [[TMP7]], [[OR_5]]
158; CHECK-NEXT:    [[OP_RDX1:%.*]] = or i64 [[OP_RDX]], [[OR_6]]
159; CHECK-NEXT:    [[OP_RDX2:%.*]] = or i64 [[OP_RDX1]], [[OR_7]]
160; CHECK-NEXT:    [[OP_RDX3:%.*]] = or i64 [[OP_RDX2]], [[OR]]
161; CHECK-NEXT:    ret i64 [[OP_RDX3]]
162;
163entry:
164  %0 = load i16, ptr %src, align 2
165  %tobool.not = icmp ne i16 %0, 0
166  %or = zext i1 %tobool.not to i64
167  %arrayidx.1 = getelementptr inbounds i16, ptr %src, i64 1
168  %1 = load i16, ptr %arrayidx.1, align 2
169  %tobool.not.1 = icmp eq i16 %1, 0
170  %or.1 = select i1 %tobool.not.1, i64 0, i64 2
171  %mask.1.1 = or i64 %or.1, %or
172  %arrayidx.2 = getelementptr inbounds i16, ptr %src, i64 2
173  %2 = load i16, ptr %arrayidx.2, align 2
174  %tobool.not.2 = icmp eq i16 %2, 0
175  %or.2 = select i1 %tobool.not.2, i64 0, i64 4
176  %mask.1.2 = or i64 %or.2, %mask.1.1
177  %arrayidx.3 = getelementptr inbounds i16, ptr %src, i64 3
178  %3 = load i16, ptr %arrayidx.3, align 2
179  %tobool.not.3 = icmp eq i16 %3, 0
180  %or.3 = select i1 %tobool.not.3, i64 0, i64 8
181  %mask.1.3 = or i64 %or.3, %mask.1.2
182  %arrayidx.4 = getelementptr inbounds i16, ptr %src, i64 4
183  %4 = load i16, ptr %arrayidx.4, align 2
184  %tobool.not.4 = icmp eq i16 %4, 0
185  %or.4 = select i1 %tobool.not.4, i64 0, i64 16
186  %mask.1.4 = or i64 %or.4, %mask.1.3
187  %arrayidx.5 = getelementptr inbounds i16, ptr %src, i64 5
188  %5 = load i16, ptr %arrayidx.5, align 2
189  %tobool.not.5 = icmp eq i16 %5, 0
190  %or.5 = select i1 %tobool.not.5, i64 0, i64 32
191  %mask.1.5 = or i64 %or.5, %mask.1.4
192  %arrayidx.6 = getelementptr inbounds i16, ptr %src, i64 6
193  %6 = load i16, ptr %arrayidx.6, align 2
194  %tobool.not.6 = icmp eq i16 %6, 0
195  %or.6 = select i1 %tobool.not.6, i64 0, i64 64
196  %mask.1.6 = or i64 %or.6, %mask.1.5
197  %arrayidx.7 = getelementptr inbounds i16, ptr %src, i64 7
198  %7 = load i16, ptr %arrayidx.7, align 2
199  %tobool.not.7 = icmp eq i16 %7, 0
200  %or.7 = select i1 %tobool.not.7, i64 0, i64 128
201  %mask.1.7 = or i64 %or.7, %mask.1.6
202  ret i64 %mask.1.7
203}
204
205define i64 @bitmask_8xi32(ptr nocapture noundef readonly %src) {
206; CHECK-LABEL: @bitmask_8xi32(
207; CHECK-NEXT:  entry:
208; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[SRC:%.*]], align 4
209; CHECK-NEXT:    [[TOBOOL_NOT:%.*]] = icmp ne i32 [[TMP0]], 0
210; CHECK-NEXT:    [[OR:%.*]] = zext i1 [[TOBOOL_NOT]] to i64
211; CHECK-NEXT:    [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 1
212; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr [[ARRAYIDX_1]], align 4
213; CHECK-NEXT:    [[TMP2:%.*]] = icmp eq <4 x i32> [[TMP1]], zeroinitializer
214; CHECK-NEXT:    [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i64> zeroinitializer, <4 x i64> <i64 2, i64 4, i64 8, i64 16>
215; CHECK-NEXT:    [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 5
216; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_5]], align 4
217; CHECK-NEXT:    [[TOBOOL_NOT_5:%.*]] = icmp eq i32 [[TMP4]], 0
218; CHECK-NEXT:    [[OR_5:%.*]] = select i1 [[TOBOOL_NOT_5]], i64 0, i64 32
219; CHECK-NEXT:    [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 6
220; CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_6]], align 4
221; CHECK-NEXT:    [[TOBOOL_NOT_6:%.*]] = icmp eq i32 [[TMP5]], 0
222; CHECK-NEXT:    [[OR_6:%.*]] = select i1 [[TOBOOL_NOT_6]], i64 0, i64 64
223; CHECK-NEXT:    [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i64 7
224; CHECK-NEXT:    [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX_7]], align 4
225; CHECK-NEXT:    [[TOBOOL_NOT_7:%.*]] = icmp eq i32 [[TMP6]], 0
226; CHECK-NEXT:    [[OR_7:%.*]] = select i1 [[TOBOOL_NOT_7]], i64 0, i64 128
227; CHECK-NEXT:    [[TMP7:%.*]] = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> [[TMP3]])
228; CHECK-NEXT:    [[OP_RDX:%.*]] = or i64 [[TMP7]], [[OR_5]]
229; CHECK-NEXT:    [[OP_RDX1:%.*]] = or i64 [[OP_RDX]], [[OR_6]]
230; CHECK-NEXT:    [[OP_RDX2:%.*]] = or i64 [[OP_RDX1]], [[OR_7]]
231; CHECK-NEXT:    [[OP_RDX3:%.*]] = or i64 [[OP_RDX2]], [[OR]]
232; CHECK-NEXT:    ret i64 [[OP_RDX3]]
233;
234entry:
235  %0 = load i32, ptr %src, align 4
236  %tobool.not = icmp ne i32 %0, 0
237  %or = zext i1 %tobool.not to i64
238  %arrayidx.1 = getelementptr inbounds i32, ptr %src, i64 1
239  %1 = load i32, ptr %arrayidx.1, align 4
240  %tobool.not.1 = icmp eq i32 %1, 0
241  %or.1 = select i1 %tobool.not.1, i64 0, i64 2
242  %mask.1.1 = or i64 %or.1, %or
243  %arrayidx.2 = getelementptr inbounds i32, ptr %src, i64 2
244  %2 = load i32, ptr %arrayidx.2, align 4
245  %tobool.not.2 = icmp eq i32 %2, 0
246  %or.2 = select i1 %tobool.not.2, i64 0, i64 4
247  %mask.1.2 = or i64 %or.2, %mask.1.1
248  %arrayidx.3 = getelementptr inbounds i32, ptr %src, i64 3
249  %3 = load i32, ptr %arrayidx.3, align 4
250  %tobool.not.3 = icmp eq i32 %3, 0
251  %or.3 = select i1 %tobool.not.3, i64 0, i64 8
252  %mask.1.3 = or i64 %or.3, %mask.1.2
253  %arrayidx.4 = getelementptr inbounds i32, ptr %src, i64 4
254  %4 = load i32, ptr %arrayidx.4, align 4
255  %tobool.not.4 = icmp eq i32 %4, 0
256  %or.4 = select i1 %tobool.not.4, i64 0, i64 16
257  %mask.1.4 = or i64 %or.4, %mask.1.3
258  %arrayidx.5 = getelementptr inbounds i32, ptr %src, i64 5
259  %5 = load i32, ptr %arrayidx.5, align 4
260  %tobool.not.5 = icmp eq i32 %5, 0
261  %or.5 = select i1 %tobool.not.5, i64 0, i64 32
262  %mask.1.5 = or i64 %or.5, %mask.1.4
263  %arrayidx.6 = getelementptr inbounds i32, ptr %src, i64 6
264  %6 = load i32, ptr %arrayidx.6, align 4
265  %tobool.not.6 = icmp eq i32 %6, 0
266  %or.6 = select i1 %tobool.not.6, i64 0, i64 64
267  %mask.1.6 = or i64 %or.6, %mask.1.5
268  %arrayidx.7 = getelementptr inbounds i32, ptr %src, i64 7
269  %7 = load i32, ptr %arrayidx.7, align 4
270  %tobool.not.7 = icmp eq i32 %7, 0
271  %or.7 = select i1 %tobool.not.7, i64 0, i64 128
272  %mask.1.7 = or i64 %or.7, %mask.1.6
273  ret i64 %mask.1.7
274}
275
276define i64 @bitmask_8xi64(ptr nocapture noundef readonly %src) {
277; SSE2-LABEL: @bitmask_8xi64(
278; SSE2-NEXT:  entry:
279; SSE2-NEXT:    [[TMP0:%.*]] = load i64, ptr [[SRC:%.*]], align 8
280; SSE2-NEXT:    [[TOBOOL_NOT:%.*]] = icmp ne i64 [[TMP0]], 0
281; SSE2-NEXT:    [[OR:%.*]] = zext i1 [[TOBOOL_NOT]] to i64
282; SSE2-NEXT:    [[ARRAYIDX_1:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 1
283; SSE2-NEXT:    [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX_1]], align 8
284; SSE2-NEXT:    [[TOBOOL_NOT_1:%.*]] = icmp eq i64 [[TMP1]], 0
285; SSE2-NEXT:    [[OR_1:%.*]] = select i1 [[TOBOOL_NOT_1]], i64 0, i64 2
286; SSE2-NEXT:    [[MASK_1_1:%.*]] = or i64 [[OR_1]], [[OR]]
287; SSE2-NEXT:    [[ARRAYIDX_2:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 2
288; SSE2-NEXT:    [[TMP2:%.*]] = load i64, ptr [[ARRAYIDX_2]], align 8
289; SSE2-NEXT:    [[TOBOOL_NOT_2:%.*]] = icmp eq i64 [[TMP2]], 0
290; SSE2-NEXT:    [[OR_2:%.*]] = select i1 [[TOBOOL_NOT_2]], i64 0, i64 4
291; SSE2-NEXT:    [[MASK_1_2:%.*]] = or i64 [[OR_2]], [[MASK_1_1]]
292; SSE2-NEXT:    [[ARRAYIDX_3:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 3
293; SSE2-NEXT:    [[TMP3:%.*]] = load i64, ptr [[ARRAYIDX_3]], align 8
294; SSE2-NEXT:    [[TOBOOL_NOT_3:%.*]] = icmp eq i64 [[TMP3]], 0
295; SSE2-NEXT:    [[OR_3:%.*]] = select i1 [[TOBOOL_NOT_3]], i64 0, i64 8
296; SSE2-NEXT:    [[MASK_1_3:%.*]] = or i64 [[OR_3]], [[MASK_1_2]]
297; SSE2-NEXT:    [[ARRAYIDX_4:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 4
298; SSE2-NEXT:    [[TMP4:%.*]] = load i64, ptr [[ARRAYIDX_4]], align 8
299; SSE2-NEXT:    [[TOBOOL_NOT_4:%.*]] = icmp eq i64 [[TMP4]], 0
300; SSE2-NEXT:    [[OR_4:%.*]] = select i1 [[TOBOOL_NOT_4]], i64 0, i64 16
301; SSE2-NEXT:    [[MASK_1_4:%.*]] = or i64 [[OR_4]], [[MASK_1_3]]
302; SSE2-NEXT:    [[ARRAYIDX_5:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 5
303; SSE2-NEXT:    [[TMP5:%.*]] = load i64, ptr [[ARRAYIDX_5]], align 8
304; SSE2-NEXT:    [[TOBOOL_NOT_5:%.*]] = icmp eq i64 [[TMP5]], 0
305; SSE2-NEXT:    [[OR_5:%.*]] = select i1 [[TOBOOL_NOT_5]], i64 0, i64 32
306; SSE2-NEXT:    [[MASK_1_5:%.*]] = or i64 [[OR_5]], [[MASK_1_4]]
307; SSE2-NEXT:    [[ARRAYIDX_6:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 6
308; SSE2-NEXT:    [[TMP6:%.*]] = load i64, ptr [[ARRAYIDX_6]], align 8
309; SSE2-NEXT:    [[TOBOOL_NOT_6:%.*]] = icmp eq i64 [[TMP6]], 0
310; SSE2-NEXT:    [[OR_6:%.*]] = select i1 [[TOBOOL_NOT_6]], i64 0, i64 64
311; SSE2-NEXT:    [[MASK_1_6:%.*]] = or i64 [[OR_6]], [[MASK_1_5]]
312; SSE2-NEXT:    [[ARRAYIDX_7:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 7
313; SSE2-NEXT:    [[TMP7:%.*]] = load i64, ptr [[ARRAYIDX_7]], align 8
314; SSE2-NEXT:    [[TOBOOL_NOT_7:%.*]] = icmp eq i64 [[TMP7]], 0
315; SSE2-NEXT:    [[OR_7:%.*]] = select i1 [[TOBOOL_NOT_7]], i64 0, i64 128
316; SSE2-NEXT:    [[MASK_1_7:%.*]] = or i64 [[OR_7]], [[MASK_1_6]]
317; SSE2-NEXT:    ret i64 [[MASK_1_7]]
318;
319; SSE4-LABEL: @bitmask_8xi64(
320; SSE4-NEXT:  entry:
321; SSE4-NEXT:    [[TMP0:%.*]] = load i64, ptr [[SRC:%.*]], align 8
322; SSE4-NEXT:    [[TOBOOL_NOT:%.*]] = icmp ne i64 [[TMP0]], 0
323; SSE4-NEXT:    [[OR:%.*]] = zext i1 [[TOBOOL_NOT]] to i64
324; SSE4-NEXT:    [[ARRAYIDX_1:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 1
325; SSE4-NEXT:    [[TMP1:%.*]] = load <4 x i64>, ptr [[ARRAYIDX_1]], align 8
326; SSE4-NEXT:    [[TMP2:%.*]] = icmp eq <4 x i64> [[TMP1]], zeroinitializer
327; SSE4-NEXT:    [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i64> zeroinitializer, <4 x i64> <i64 2, i64 4, i64 8, i64 16>
328; SSE4-NEXT:    [[ARRAYIDX_5:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 5
329; SSE4-NEXT:    [[TMP4:%.*]] = load i64, ptr [[ARRAYIDX_5]], align 8
330; SSE4-NEXT:    [[TOBOOL_NOT_5:%.*]] = icmp eq i64 [[TMP4]], 0
331; SSE4-NEXT:    [[OR_5:%.*]] = select i1 [[TOBOOL_NOT_5]], i64 0, i64 32
332; SSE4-NEXT:    [[ARRAYIDX_6:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 6
333; SSE4-NEXT:    [[TMP5:%.*]] = load i64, ptr [[ARRAYIDX_6]], align 8
334; SSE4-NEXT:    [[TOBOOL_NOT_6:%.*]] = icmp eq i64 [[TMP5]], 0
335; SSE4-NEXT:    [[OR_6:%.*]] = select i1 [[TOBOOL_NOT_6]], i64 0, i64 64
336; SSE4-NEXT:    [[ARRAYIDX_7:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 7
337; SSE4-NEXT:    [[TMP6:%.*]] = load i64, ptr [[ARRAYIDX_7]], align 8
338; SSE4-NEXT:    [[TOBOOL_NOT_7:%.*]] = icmp eq i64 [[TMP6]], 0
339; SSE4-NEXT:    [[OR_7:%.*]] = select i1 [[TOBOOL_NOT_7]], i64 0, i64 128
340; SSE4-NEXT:    [[TMP7:%.*]] = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> [[TMP3]])
341; SSE4-NEXT:    [[OP_RDX:%.*]] = or i64 [[TMP7]], [[OR_5]]
342; SSE4-NEXT:    [[OP_RDX1:%.*]] = or i64 [[OP_RDX]], [[OR_6]]
343; SSE4-NEXT:    [[OP_RDX2:%.*]] = or i64 [[OP_RDX1]], [[OR_7]]
344; SSE4-NEXT:    [[OP_RDX3:%.*]] = or i64 [[OP_RDX2]], [[OR]]
345; SSE4-NEXT:    ret i64 [[OP_RDX3]]
346;
347; AVX-LABEL: @bitmask_8xi64(
348; AVX-NEXT:  entry:
349; AVX-NEXT:    [[TMP0:%.*]] = load i64, ptr [[SRC:%.*]], align 8
350; AVX-NEXT:    [[TOBOOL_NOT:%.*]] = icmp ne i64 [[TMP0]], 0
351; AVX-NEXT:    [[OR:%.*]] = zext i1 [[TOBOOL_NOT]] to i64
352; AVX-NEXT:    [[ARRAYIDX_1:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 1
353; AVX-NEXT:    [[TMP1:%.*]] = load <4 x i64>, ptr [[ARRAYIDX_1]], align 8
354; AVX-NEXT:    [[TMP2:%.*]] = icmp eq <4 x i64> [[TMP1]], zeroinitializer
355; AVX-NEXT:    [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i64> zeroinitializer, <4 x i64> <i64 2, i64 4, i64 8, i64 16>
356; AVX-NEXT:    [[ARRAYIDX_5:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 5
357; AVX-NEXT:    [[TMP4:%.*]] = load i64, ptr [[ARRAYIDX_5]], align 8
358; AVX-NEXT:    [[TOBOOL_NOT_5:%.*]] = icmp eq i64 [[TMP4]], 0
359; AVX-NEXT:    [[OR_5:%.*]] = select i1 [[TOBOOL_NOT_5]], i64 0, i64 32
360; AVX-NEXT:    [[ARRAYIDX_6:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 6
361; AVX-NEXT:    [[TMP5:%.*]] = load i64, ptr [[ARRAYIDX_6]], align 8
362; AVX-NEXT:    [[TOBOOL_NOT_6:%.*]] = icmp eq i64 [[TMP5]], 0
363; AVX-NEXT:    [[OR_6:%.*]] = select i1 [[TOBOOL_NOT_6]], i64 0, i64 64
364; AVX-NEXT:    [[ARRAYIDX_7:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 7
365; AVX-NEXT:    [[TMP6:%.*]] = load i64, ptr [[ARRAYIDX_7]], align 8
366; AVX-NEXT:    [[TOBOOL_NOT_7:%.*]] = icmp eq i64 [[TMP6]], 0
367; AVX-NEXT:    [[OR_7:%.*]] = select i1 [[TOBOOL_NOT_7]], i64 0, i64 128
368; AVX-NEXT:    [[TMP7:%.*]] = call i64 @llvm.vector.reduce.or.v4i64(<4 x i64> [[TMP3]])
369; AVX-NEXT:    [[OP_RDX:%.*]] = or i64 [[TMP7]], [[OR_5]]
370; AVX-NEXT:    [[OP_RDX1:%.*]] = or i64 [[OP_RDX]], [[OR_6]]
371; AVX-NEXT:    [[OP_RDX2:%.*]] = or i64 [[OP_RDX1]], [[OR_7]]
372; AVX-NEXT:    [[OP_RDX3:%.*]] = or i64 [[OP_RDX2]], [[OR]]
373; AVX-NEXT:    ret i64 [[OP_RDX3]]
374;
375entry:
376  %0 = load i64, ptr %src, align 8
377  %tobool.not = icmp ne i64 %0, 0
378  %or = zext i1 %tobool.not to i64
379  %arrayidx.1 = getelementptr inbounds i64, ptr %src, i64 1
380  %1 = load i64, ptr %arrayidx.1, align 8
381  %tobool.not.1 = icmp eq i64 %1, 0
382  %or.1 = select i1 %tobool.not.1, i64 0, i64 2
383  %mask.1.1 = or i64 %or.1, %or
384  %arrayidx.2 = getelementptr inbounds i64, ptr %src, i64 2
385  %2 = load i64, ptr %arrayidx.2, align 8
386  %tobool.not.2 = icmp eq i64 %2, 0
387  %or.2 = select i1 %tobool.not.2, i64 0, i64 4
388  %mask.1.2 = or i64 %or.2, %mask.1.1
389  %arrayidx.3 = getelementptr inbounds i64, ptr %src, i64 3
390  %3 = load i64, ptr %arrayidx.3, align 8
391  %tobool.not.3 = icmp eq i64 %3, 0
392  %or.3 = select i1 %tobool.not.3, i64 0, i64 8
393  %mask.1.3 = or i64 %or.3, %mask.1.2
394  %arrayidx.4 = getelementptr inbounds i64, ptr %src, i64 4
395  %4 = load i64, ptr %arrayidx.4, align 8
396  %tobool.not.4 = icmp eq i64 %4, 0
397  %or.4 = select i1 %tobool.not.4, i64 0, i64 16
398  %mask.1.4 = or i64 %or.4, %mask.1.3
399  %arrayidx.5 = getelementptr inbounds i64, ptr %src, i64 5
400  %5 = load i64, ptr %arrayidx.5, align 8
401  %tobool.not.5 = icmp eq i64 %5, 0
402  %or.5 = select i1 %tobool.not.5, i64 0, i64 32
403  %mask.1.5 = or i64 %or.5, %mask.1.4
404  %arrayidx.6 = getelementptr inbounds i64, ptr %src, i64 6
405  %6 = load i64, ptr %arrayidx.6, align 8
406  %tobool.not.6 = icmp eq i64 %6, 0
407  %or.6 = select i1 %tobool.not.6, i64 0, i64 64
408  %mask.1.6 = or i64 %or.6, %mask.1.5
409  %arrayidx.7 = getelementptr inbounds i64, ptr %src, i64 7
410  %7 = load i64, ptr %arrayidx.7, align 8
411  %tobool.not.7 = icmp eq i64 %7, 0
412  %or.7 = select i1 %tobool.not.7, i64 0, i64 128
413  %mask.1.7 = or i64 %or.7, %mask.1.6
414  ret i64 %mask.1.7
415}
416