1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck %s 3 4define void @mainTest(i32 %param, i32 * %vals, i32 %len) { 5; CHECK-LABEL: @mainTest( 6; CHECK-NEXT: bci_15.preheader: 7; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i32> <i32 poison, i32 31>, i32 [[PARAM:%.*]], i32 0 8; CHECK-NEXT: br label [[BCI_15:%.*]] 9; CHECK: bci_15: 10; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x i32> [ [[TMP7:%.*]], [[BCI_15]] ], [ [[TMP0]], [[BCI_15_PREHEADER:%.*]] ] 11; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> poison, <16 x i32> <i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 12; CHECK-NEXT: [[TMP2:%.*]] = extractelement <16 x i32> [[SHUFFLE]], i32 1 13; CHECK-NEXT: [[TMP3:%.*]] = add <16 x i32> [[SHUFFLE]], <i32 -1, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 14; CHECK-NEXT: [[TMP4:%.*]] = extractelement <16 x i32> [[SHUFFLE]], i32 0 15; CHECK-NEXT: store atomic i32 [[TMP4]], i32* [[VALS:%.*]] unordered, align 4 16; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vector.reduce.and.v16i32(<16 x i32> [[TMP3]]) 17; CHECK-NEXT: [[OP_RDX:%.*]] = and i32 [[TMP5]], [[TMP2]] 18; CHECK-NEXT: [[V44:%.*]] = add i32 [[TMP2]], 16 19; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> poison, i32 [[OP_RDX]], i32 0 20; CHECK-NEXT: [[TMP7]] = insertelement <2 x i32> [[TMP6]], i32 [[V44]], i32 1 21; CHECK-NEXT: br i1 true, label [[BCI_15]], label [[LOOPEXIT:%.*]] 22; CHECK: loopexit: 23; CHECK-NEXT: ret void 24; 25bci_15.preheader: 26 br label %bci_15 27 28bci_15: ; preds = %bci_15.preheader, %bci_15 29 %local_0_ = phi i32 [ %v43, %bci_15 ], [ %param, %bci_15.preheader ] 30 %local_4_ = phi i32 [ %v44, %bci_15 ], [ 31, %bci_15.preheader ] 31 %v12 = add i32 %local_0_, -1 32 store atomic i32 %local_0_, i32 * %vals unordered, align 4 33 %v13 = add i32 %local_4_, 1 34 %v14 = and i32 %local_4_, %v12 35 %v15 = add i32 %local_4_, 2 36 %v16 = and i32 %v13, %v14 37 %v17 = add i32 %local_4_, 3 38 %v18 = and i32 %v15, %v16 39 %v19 = add i32 %local_4_, 4 40 %v20 = and i32 %v17, %v18 41 %v21 = add i32 %local_4_, 5 42 %v22 = and i32 %v19, %v20 43 %v23 = add i32 %local_4_, 6 44 %v24 = and i32 %v21, %v22 45 %v25 = add i32 %local_4_, 7 46 %v26 = and i32 %v23, %v24 47 %v27 = add i32 %local_4_, 8 48 %v28 = and i32 %v25, %v26 49 %v29 = add i32 %local_4_, 9 50 %v30 = and i32 %v27, %v28 51 %v31 = add i32 %local_4_, 10 52 %v32 = and i32 %v29, %v30 53 %v33 = add i32 %local_4_, 11 54 %v34 = and i32 %v31, %v32 55 %v35 = add i32 %local_4_, 12 56 %v36 = and i32 %v33, %v34 57 %v37 = add i32 %local_4_, 13 58 %v38 = and i32 %v35, %v36 59 %v39 = add i32 %local_4_, 14 60 %v40 = and i32 %v37, %v38 61 %v41 = add i32 %local_4_, 15 62 %v42 = and i32 %v39, %v40 63 %v43 = and i32 %v41, %v42 64 %v44 = add i32 %local_4_, 16 65 br i1 true, label %bci_15, label %loopexit 66 67loopexit: 68 ret void 69} 70