1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -O2 -S -mattr=avx < %s | FileCheck %s 3; RUN: opt -passes='default<O2>' -S -mattr=avx < %s | FileCheck %s 4 5target triple = "x86_64--" 6target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 7 8; Eliminate redundant shuffles 9 10define <2 x i64> @shuffle_32_add_16_shuffle_32_masks_are_eq(<2 x i64> %v) { 11; CHECK-LABEL: @shuffle_32_add_16_shuffle_32_masks_are_eq( 12; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[V:%.*]] to <8 x i16> 13; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i16> [[TMP1]], <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> 14; CHECK-NEXT: [[BC5:%.*]] = bitcast <8 x i16> [[TMP2]] to <2 x i64> 15; CHECK-NEXT: ret <2 x i64> [[BC5]] 16; 17 %bc0 = bitcast <2 x i64> %v to <4 x i32> 18 %shuffle = shufflevector <4 x i32> %bc0, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 19 %bc1 = bitcast <4 x i32> %shuffle to <2 x i64> 20 %bc2 = bitcast <2 x i64> %bc1 to <8 x i16> 21 %add.i = add <8 x i16> %bc2, %bc2 22 %bc3 = bitcast <8 x i16> %add.i to <2 x i64> 23 %bc4 = bitcast <2 x i64> %bc3 to <4 x i32> 24 %shuffle4 = shufflevector <4 x i32> %bc4, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 25 %bc5 = bitcast <4 x i32> %shuffle4 to <2 x i64> 26 ret <2 x i64> %bc5 27} 28 29; Eliminate redundant shuffles 30 31define <2 x i64> @shuffle_32_add_8_shuffle_32_masks_are_eq(<2 x i64> %v) { 32; CHECK-LABEL: @shuffle_32_add_8_shuffle_32_masks_are_eq( 33; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[V:%.*]] to <16 x i8> 34; CHECK-NEXT: [[TMP2:%.*]] = shl <16 x i8> [[TMP1]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1> 35; CHECK-NEXT: [[BC5:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64> 36; CHECK-NEXT: ret <2 x i64> [[BC5]] 37; 38 %bc0 = bitcast <2 x i64> %v to <4 x i32> 39 %shuffle = shufflevector <4 x i32> %bc0, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 40 %bc1 = bitcast <4 x i32> %shuffle to <2 x i64> 41 %bc2 = bitcast <2 x i64> %bc1 to <16 x i8> 42 %add.i = add <16 x i8> %bc2, %bc2 43 %bc3 = bitcast <16 x i8> %add.i to <2 x i64> 44 %bc4 = bitcast <2 x i64> %bc3 to <4 x i32> 45 %shuffle4 = shufflevector <4 x i32> %bc4, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 46 %bc5 = bitcast <4 x i32> %shuffle4 to <2 x i64> 47 ret <2 x i64> %bc5 48} 49 50; TODO: Eliminate redundant shuffles 51 52define <2 x i64> @shuffle_8_add_32_shuffle_8_masks_are_eq(<2 x i64> %v) { 53; CHECK-LABEL: @shuffle_8_add_32_shuffle_8_masks_are_eq( 54; CHECK-NEXT: [[BC0:%.*]] = bitcast <2 x i64> [[V:%.*]] to <16 x i8> 55; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <16 x i8> [[BC0]], <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 56; CHECK-NEXT: [[BC2:%.*]] = bitcast <16 x i8> [[SHUFFLE]] to <4 x i32> 57; CHECK-NEXT: [[ADD_I:%.*]] = shl <4 x i32> [[BC2]], <i32 1, i32 1, i32 1, i32 1> 58; CHECK-NEXT: [[BC4:%.*]] = bitcast <4 x i32> [[ADD_I]] to <16 x i8> 59; CHECK-NEXT: [[SHUFFLE4:%.*]] = shufflevector <16 x i8> [[BC4]], <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 60; CHECK-NEXT: [[BC5:%.*]] = bitcast <16 x i8> [[SHUFFLE4]] to <2 x i64> 61; CHECK-NEXT: ret <2 x i64> [[BC5]] 62; 63 %bc0 = bitcast <2 x i64> %v to <16 x i8> 64 %shuffle = shufflevector <16 x i8> %bc0, <16 x i8> zeroinitializer, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 65 %bc1 = bitcast <16 x i8> %shuffle to <2 x i64> 66 %bc2 = bitcast <2 x i64> %bc1 to <4 x i32> 67 %add.i = add <4 x i32> %bc2, %bc2 68 %bc3 = bitcast <4 x i32> %add.i to <2 x i64> 69 %bc4 = bitcast <2 x i64> %bc3 to <16 x i8> 70 %shuffle4 = shufflevector <16 x i8> %bc4, <16 x i8> zeroinitializer, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 71 %bc5 = bitcast <16 x i8> %shuffle4 to <2 x i64> 72 ret <2 x i64> %bc5 73} 74 75; Single shuffle should sink. 76 77define <8 x i16> @shuffle_32_add_16_masks_are_eq(<4 x i32> %v1, <4 x i32> %v2) { 78; CHECK-LABEL: @shuffle_32_add_16_masks_are_eq( 79; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[V1:%.*]] to <8 x i16> 80; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[V2:%.*]] to <8 x i16> 81; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i16> [[TMP2]], [[TMP1]] 82; CHECK-NEXT: [[ADD:%.*]] = shufflevector <8 x i16> [[TMP3]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 83; CHECK-NEXT: ret <8 x i16> [[ADD]] 84; 85 86 %shuffle1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 87 %shuffle2 = shufflevector <4 x i32> %v2, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 88 %bc1 = bitcast <4 x i32> %shuffle1 to <8 x i16> 89 %bc2 = bitcast <4 x i32> %shuffle2 to <8 x i16> 90 %add = add <8 x i16> %bc1, %bc2 91 ret <8 x i16> %add 92} 93 94; Sink single shuffle. 95 96define <16 x i8> @shuffle_32_add_8_masks_are_eq(<4 x i32> %v1, <4 x i32> %v2) { 97; CHECK-LABEL: @shuffle_32_add_8_masks_are_eq( 98; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[V1:%.*]] to <16 x i8> 99; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[V2:%.*]] to <16 x i8> 100; CHECK-NEXT: [[TMP3:%.*]] = add <16 x i8> [[TMP2]], [[TMP1]] 101; CHECK-NEXT: [[ADD:%.*]] = shufflevector <16 x i8> [[TMP3]], <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 102; CHECK-NEXT: ret <16 x i8> [[ADD]] 103; 104 105 %shuffle1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 106 %shuffle2 = shufflevector <4 x i32> %v2, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 107 %bc1 = bitcast <4 x i32> %shuffle1 to <16 x i8> 108 %bc2 = bitcast <4 x i32> %shuffle2 to <16 x i8> 109 %add = add <16 x i8> %bc1, %bc2 110 ret <16 x i8> %add 111} 112 113; Sink single shuffle. 114 115define <16 x i8> @shuffle_16_add_8_masks_are_eq(<8 x i16> %v1, <8 x i16> %v2) { 116; CHECK-LABEL: @shuffle_16_add_8_masks_are_eq( 117; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[V1:%.*]] to <16 x i8> 118; CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[V2:%.*]] to <16 x i8> 119; CHECK-NEXT: [[TMP3:%.*]] = add <16 x i8> [[TMP2]], [[TMP1]] 120; CHECK-NEXT: [[ADD:%.*]] = shufflevector <16 x i8> [[TMP3]], <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1, i32 8, i32 9, i32 10, i32 11, i32 14, i32 15, i32 12, i32 13> 121; CHECK-NEXT: ret <16 x i8> [[ADD]] 122; 123 124 %shuffle1 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 4, i32 5, i32 7, i32 6> 125 %shuffle2 = shufflevector <8 x i16> %v2, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 4, i32 5, i32 7, i32 6> 126 %bc1 = bitcast <8 x i16> %shuffle1 to <16 x i8> 127 %bc2 = bitcast <8 x i16> %shuffle2 to <16 x i8> 128 %add = add <16 x i8> %bc1, %bc2 129 ret <16 x i8> %add 130} 131 132; TODO: Sink single shuffle. 133 134define <4 x i32> @shuffle_16_add_32_masks_are_eq_and_can_be_converted_up(<8 x i16> %v1, <8 x i16> %v2) { 135; CHECK-LABEL: @shuffle_16_add_32_masks_are_eq_and_can_be_converted_up( 136; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <8 x i16> [[V1:%.*]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 137; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <8 x i16> [[V2:%.*]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 138; CHECK-NEXT: [[BC1:%.*]] = bitcast <8 x i16> [[SHUFFLE1]] to <4 x i32> 139; CHECK-NEXT: [[BC2:%.*]] = bitcast <8 x i16> [[SHUFFLE2]] to <4 x i32> 140; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[BC2]], [[BC1]] 141; CHECK-NEXT: ret <4 x i32> [[ADD]] 142; 143 144 %shuffle1 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 145 %shuffle2 = shufflevector <8 x i16> %v2, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 146 %bc1 = bitcast <8 x i16> %shuffle1 to <4 x i32> 147 %bc2 = bitcast <8 x i16> %shuffle2 to <4 x i32> 148 %add = add <4 x i32> %bc1, %bc2 149 ret <4 x i32> %add 150} 151 152; TODO: Sink single shuffle. 153 154define <4 x i32> @shuffle_8_add_32_masks_are_eq_and_can_be_converted_up(<16 x i8> %v1, <16 x i8> %v2) { 155; CHECK-LABEL: @shuffle_8_add_32_masks_are_eq_and_can_be_converted_up( 156; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <16 x i8> [[V1:%.*]], <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 157; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <16 x i8> [[V2:%.*]], <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 158; CHECK-NEXT: [[BC1:%.*]] = bitcast <16 x i8> [[SHUFFLE1]] to <4 x i32> 159; CHECK-NEXT: [[BC2:%.*]] = bitcast <16 x i8> [[SHUFFLE2]] to <4 x i32> 160; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[BC2]], [[BC1]] 161; CHECK-NEXT: ret <4 x i32> [[ADD]] 162; 163 164 %shuffle1 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 165 %shuffle2 = shufflevector <16 x i8> %v2, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 166 %bc1 = bitcast <16 x i8> %shuffle1 to <4 x i32> 167 %bc2 = bitcast <16 x i8> %shuffle2 to <4 x i32> 168 %add = add <4 x i32> %bc1, %bc2 169 ret <4 x i32> %add 170} 171 172; shuffle<8 x i16>( bitcast<8 x i16>( shuffle<4 x i32>(v))) 173; TODO: Squash shuffles and widen type? 174 175define <8 x i16> @shuffle_32_bitcast_16_shuffle_16_can_be_converted_up(<4 x i32> %v1) { 176; CHECK-LABEL: @shuffle_32_bitcast_16_shuffle_16_can_be_converted_up( 177; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[V1:%.*]] to <8 x i16> 178; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 179; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 180; CHECK-NEXT: ret <8 x i16> [[SHUFFLE2]] 181; 182 183 %shuffle1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 184 %bc1 = bitcast <4 x i32> %shuffle1 to <8 x i16> 185 %shuffle2 = shufflevector <8 x i16> %bc1, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 186 ret <8 x i16> %shuffle2 187} 188 189; shuffle<8 x i16>( bitcast<8 x i16>( shuffle<4 x i32>(v))) 190; TODO: Squash shuffles? 191 192define <8 x i16> @shuffle_32_bitcast_16_shuffle_16_can_not_be_converted_up(<4 x i32> %v1) { 193; CHECK-LABEL: @shuffle_32_bitcast_16_shuffle_16_can_not_be_converted_up( 194; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[V1:%.*]] to <8 x i16> 195; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[TMP1]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 196; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <8 x i16> [[TMP2]], <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 197; CHECK-NEXT: ret <8 x i16> [[SHUFFLE2]] 198; 199 200 %shuffle1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 201 %bc1 = bitcast <4 x i32> %shuffle1 to <8 x i16> 202 %shuffle2 = shufflevector <8 x i16> %bc1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 203 ret <8 x i16> %shuffle2 204} 205 206; shuffle<16 x i8>( bitcast<16 x i8>( shuffle<4 x i32>(v))) 207; TODO: Squash shuffles and widen type? 208 209define <16 x i8> @shuffle_32_bitcast_8_shuffle_8_can_be_converted_up(<4 x i32> %v1) { 210; CHECK-LABEL: @shuffle_32_bitcast_8_shuffle_8_can_be_converted_up( 211; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[V1:%.*]] to <16 x i8> 212; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 213; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 214; CHECK-NEXT: ret <16 x i8> [[SHUFFLE2]] 215; 216 217 %shuffle1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 218 %bc1 = bitcast <4 x i32> %shuffle1 to <16 x i8> 219 %shuffle2 = shufflevector <16 x i8> %bc1, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 220 ret <16 x i8> %shuffle2 221} 222 223; shuffle<16 x i8>( bitcast<16 x i8>( shuffle<4 x i32>(v))) 224; TODO: Squash shuffles? 225 226define <16 x i8> @shuffle_32_bitcast_8_shuffle_8_can_not_be_converted_up(<4 x i32> %v1) { 227; CHECK-LABEL: @shuffle_32_bitcast_8_shuffle_8_can_not_be_converted_up( 228; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[V1:%.*]] to <16 x i8> 229; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 230; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <16 x i8> [[TMP2]], <16 x i8> undef, <16 x i32> <i32 5, i32 4, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 231; CHECK-NEXT: ret <16 x i8> [[SHUFFLE2]] 232; 233 234 %shuffle1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 235 %bc1 = bitcast <4 x i32> %shuffle1 to <16 x i8> 236 %shuffle2 = shufflevector <16 x i8> %bc1, <16 x i8> undef, <16 x i32> <i32 5, i32 4, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 237 ret <16 x i8> %shuffle2 238} 239 240; shuffle<4 x i32>( bitcast<4 x i32>( shuffle<16 x i8>(v))) 241; TODO: Narrow, squash shuffles, and widen type? 242 243define <4 x i32> @shuffle_8_bitcast_32_shuffle_32_can_be_converted_up(<16 x i8> %v1) { 244; CHECK-LABEL: @shuffle_8_bitcast_32_shuffle_32_can_be_converted_up( 245; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <16 x i8> [[V1:%.*]], <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 246; CHECK-NEXT: [[BC1:%.*]] = bitcast <16 x i8> [[SHUFFLE1]] to <4 x i32> 247; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <4 x i32> [[BC1]], <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 248; CHECK-NEXT: ret <4 x i32> [[SHUFFLE2]] 249; 250 251 %shuffle1 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 252 %bc1 = bitcast <16 x i8> %shuffle1 to <4 x i32> 253 %shuffle2 = shufflevector <4 x i32> %bc1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 254 ret <4 x i32> %shuffle2 255} 256 257; shuffle<4 x i32>( bitcast<4 x i32>( shuffle<8 x i16>(v))) 258; TODO: Narrow, squash shuffles, and widen type? 259 260define <4 x i32> @shuffle_16_bitcast_32_shuffle_32_can_be_converted_up(<8 x i16> %v1) { 261; CHECK-LABEL: @shuffle_16_bitcast_32_shuffle_32_can_be_converted_up( 262; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <8 x i16> [[V1:%.*]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 263; CHECK-NEXT: [[BC1:%.*]] = bitcast <8 x i16> [[SHUFFLE1]] to <4 x i32> 264; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <4 x i32> [[BC1]], <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 265; CHECK-NEXT: ret <4 x i32> [[SHUFFLE2]] 266; 267 268 %shuffle1 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 269 %bc1 = bitcast <8 x i16> %shuffle1 to <4 x i32> 270 %shuffle2 = shufflevector <4 x i32> %bc1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 271 ret <4 x i32> %shuffle2 272} 273 274; shuffle<4 x i32>( bitcast<4 x i32>( shuffle<16 x i8>(v))) 275; TODO: Narrow and squash shuffles? 276 277define <4 x i32> @shuffle_8_bitcast_32_shuffle_32_can_not_be_converted_up(<16 x i8> %v1) { 278; CHECK-LABEL: @shuffle_8_bitcast_32_shuffle_32_can_not_be_converted_up( 279; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <16 x i8> [[V1:%.*]], <16 x i8> undef, <16 x i32> <i32 9, i32 8, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 280; CHECK-NEXT: [[BC1:%.*]] = bitcast <16 x i8> [[SHUFFLE1]] to <4 x i32> 281; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <4 x i32> [[BC1]], <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 282; CHECK-NEXT: ret <4 x i32> [[SHUFFLE2]] 283; 284 285 %shuffle1 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> <i32 9, i32 8, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 286 %bc1 = bitcast <16 x i8> %shuffle1 to <4 x i32> 287 %shuffle2 = shufflevector <4 x i32> %bc1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 288 ret <4 x i32> %shuffle2 289} 290 291; shuffle<4 x i32>( bitcast<4 x i32>( shuffle<8 x i16>(v))) 292; TODO: Narrow and squash shuffles? 293 294define <4 x i32> @shuffle_16_bitcast_32_shuffle_32_can_not_be_converted_up(<8 x i16> %v1) { 295; CHECK-LABEL: @shuffle_16_bitcast_32_shuffle_32_can_not_be_converted_up( 296; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <8 x i16> [[V1:%.*]], <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 297; CHECK-NEXT: [[BC1:%.*]] = bitcast <8 x i16> [[SHUFFLE1]] to <4 x i32> 298; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <4 x i32> [[BC1]], <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 299; CHECK-NEXT: ret <4 x i32> [[SHUFFLE2]] 300; 301 302 %shuffle1 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 303 %bc1 = bitcast <8 x i16> %shuffle1 to <4 x i32> 304 %shuffle2 = shufflevector <4 x i32> %bc1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0> 305 ret <4 x i32> %shuffle2 306} 307 308; shuffle<8 x i16>( bitcast<8 x i16>( shuffle<16 x i8>(v))) 309; TODO: Narrow, squash shuffles, and widen type? 310 311define <8 x i16> @shuffle_8_bitcast_16_shuffle_16_can__be_converted_up(<16 x i8> %v1) { 312; CHECK-LABEL: @shuffle_8_bitcast_16_shuffle_16_can__be_converted_up( 313; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <16 x i8> [[V1:%.*]], <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 314; CHECK-NEXT: [[BC1:%.*]] = bitcast <16 x i8> [[SHUFFLE1]] to <8 x i16> 315; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <8 x i16> [[BC1]], <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 316; CHECK-NEXT: ret <8 x i16> [[SHUFFLE2]] 317; 318 319 %shuffle1 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 320 %bc1 = bitcast <16 x i8> %shuffle1 to <8 x i16> 321 %shuffle2 = shufflevector <8 x i16> %bc1, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 322 ret <8 x i16> %shuffle2 323} 324 325; shuffle<8 x i16>( bitcast<8 x i16>( shuffle<16 x i8>(v))) 326; TODO: Narrow and squash shuffles? 327 328define <8 x i16> @shuffle_8_bitcast_16_shuffle_16_can_not_be_converted_up(<16 x i8> %v1) { 329; CHECK-LABEL: @shuffle_8_bitcast_16_shuffle_16_can_not_be_converted_up( 330; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <16 x i8> [[V1:%.*]], <16 x i8> undef, <16 x i32> <i32 9, i32 8, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 331; CHECK-NEXT: [[BC1:%.*]] = bitcast <16 x i8> [[SHUFFLE1]] to <8 x i16> 332; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <8 x i16> [[BC1]], <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 333; CHECK-NEXT: ret <8 x i16> [[SHUFFLE2]] 334; 335 336 %shuffle1 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> <i32 9, i32 8, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 337 %bc1 = bitcast <16 x i8> %shuffle1 to <8 x i16> 338 %shuffle2 = shufflevector <8 x i16> %bc1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 2, i32 3, i32 0, i32 1> 339 ret <8 x i16> %shuffle2 340} 341