1cee313d2SEric Christopher; RUN: opt < %s  -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s
2cee313d2SEric Christopher
3cee313d2SEric Christophertarget datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
4cee313d2SEric Christopher
5cee313d2SEric Christopher;CHECK-LABEL: @read_mod_write_single_ptr(
6cee313d2SEric Christopher;CHECK: load <4 x float>
7cee313d2SEric Christopher;CHECK: ret i32
8cee313d2SEric Christopherdefine i32 @read_mod_write_single_ptr(float* nocapture %a, i32 %n) nounwind uwtable ssp {
9cee313d2SEric Christopher  %1 = icmp sgt i32 %n, 0
10cee313d2SEric Christopher  br i1 %1, label %.lr.ph, label %._crit_edge
11cee313d2SEric Christopher
12cee313d2SEric Christopher.lr.ph:                                           ; preds = %0, %.lr.ph
13cee313d2SEric Christopher  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
14cee313d2SEric Christopher  %2 = getelementptr inbounds float, float* %a, i64 %indvars.iv
15cee313d2SEric Christopher  %3 = load float, float* %2, align 4
16cee313d2SEric Christopher  %4 = fmul float %3, 3.000000e+00
17cee313d2SEric Christopher  store float %4, float* %2, align 4
18cee313d2SEric Christopher  %indvars.iv.next = add i64 %indvars.iv, 1
19cee313d2SEric Christopher  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
20cee313d2SEric Christopher  %exitcond = icmp eq i32 %lftr.wideiv, %n
21cee313d2SEric Christopher  br i1 %exitcond, label %._crit_edge, label %.lr.ph
22cee313d2SEric Christopher
23cee313d2SEric Christopher._crit_edge:                                      ; preds = %.lr.ph, %0
24cee313d2SEric Christopher  ret i32 undef
25cee313d2SEric Christopher}
26*1e21181aSMatt Arsenault
27*1e21181aSMatt Arsenault; Ensure that volatile stores are not vectorized.
28*1e21181aSMatt Arsenault; CHECK-LABEL: @read_mod_write_single_ptr_volatile_store(
29*1e21181aSMatt Arsenault; CHECK-NOT: store <4 x float>
30*1e21181aSMatt Arsenault; CHECK: ret i32
31*1e21181aSMatt Arsenaultdefine i32 @read_mod_write_single_ptr_volatile_store(float* nocapture %a, i32 %n) nounwind uwtable ssp {
32*1e21181aSMatt Arsenault  %1 = icmp sgt i32 %n, 0
33*1e21181aSMatt Arsenault  br i1 %1, label %.lr.ph, label %._crit_edge
34*1e21181aSMatt Arsenault
35*1e21181aSMatt Arsenault.lr.ph:                                           ; preds = %0, %.lr.ph
36*1e21181aSMatt Arsenault  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
37*1e21181aSMatt Arsenault  %2 = getelementptr inbounds float, float* %a, i64 %indvars.iv
38*1e21181aSMatt Arsenault  %3 = load float, float* %2, align 4
39*1e21181aSMatt Arsenault  %4 = fmul float %3, 3.000000e+00
40*1e21181aSMatt Arsenault  store volatile float %4, float* %2, align 4
41*1e21181aSMatt Arsenault  %indvars.iv.next = add i64 %indvars.iv, 1
42*1e21181aSMatt Arsenault  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
43*1e21181aSMatt Arsenault  %exitcond = icmp eq i32 %lftr.wideiv, %n
44*1e21181aSMatt Arsenault  br i1 %exitcond, label %._crit_edge, label %.lr.ph
45*1e21181aSMatt Arsenault
46*1e21181aSMatt Arsenault._crit_edge:                                      ; preds = %.lr.ph, %0
47*1e21181aSMatt Arsenault  ret i32 undef
48*1e21181aSMatt Arsenault}
49