1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -loop-vectorize -force-vector-width=2 -S %s | FileCheck %s 3 4@src = external global [32 x i16], align 1 5@dst = external global [32 x i16], align 1 6 7; The load in the loop does not need predication, because the accessed memory 8; is de-referenceable for all loop iterations. 9define void @single_incoming_phi_no_blend_mask(i64 %a, i64 %b) { 10; CHECK-LABEL: @single_incoming_phi_no_blend_mask( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 13; CHECK: vector.ph: 14; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A:%.*]], i32 0 15; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 16; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 17; CHECK: vector.body: 18; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 19; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 20; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i16 21; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 0 22; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 0 23; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[TMP1]] 24; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i32 0 25; CHECK-NEXT: [[TMP5:%.*]] = bitcast i16* [[TMP4]] to <2 x i16>* 26; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i16>, <2 x i16>* [[TMP5]], align 1 27; CHECK-NEXT: [[TMP6:%.*]] = icmp sgt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 28; CHECK-NEXT: [[TMP7:%.*]] = xor <2 x i1> [[TMP6]], <i1 true, i1 true> 29; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP6]], <2 x i16> <i16 1, i16 1>, <2 x i16> [[WIDE_LOAD]] 30; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 [[TMP2]] 31; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i16, i16* [[TMP8]], i32 0 32; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16* [[TMP9]] to <2 x i16>* 33; CHECK-NEXT: store <2 x i16> [[PREDPHI]], <2 x i16>* [[TMP10]], align 2 34; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 35; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], <i64 2, i64 2> 36; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32 37; CHECK-NEXT: br i1 [[TMP11]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 38; CHECK: middle.block: 39; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 32, 32 40; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 41; CHECK: scalar.ph: 42; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 32, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 43; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 44; CHECK: loop.header: 45; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 46; CHECK-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i16 47; CHECK-NEXT: br label [[LOOP_COND:%.*]] 48; CHECK: loop.cond: 49; CHECK-NEXT: [[BLEND:%.*]] = phi i16 [ [[IV_TRUNC]], [[LOOP_HEADER]] ] 50; CHECK-NEXT: [[SRC_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[BLEND]] 51; CHECK-NEXT: [[LV:%.*]] = load i16, i16* [[SRC_PTR]], align 1 52; CHECK-NEXT: [[CMP_B:%.*]] = icmp sgt i64 [[IV]], [[A]] 53; CHECK-NEXT: br i1 [[CMP_B]], label [[LOOP_NEXT:%.*]], label [[LOOP_LATCH]] 54; CHECK: loop.next: 55; CHECK-NEXT: br label [[LOOP_LATCH]] 56; CHECK: loop.latch: 57; CHECK-NEXT: [[RES:%.*]] = phi i16 [ [[LV]], [[LOOP_COND]] ], [ 1, [[LOOP_NEXT]] ] 58; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 [[IV]] 59; CHECK-NEXT: store i16 [[RES]], i16* [[DST_PTR]], align 2 60; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 61; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 31 62; CHECK-NEXT: br i1 [[CMP439]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP2:![0-9]+]] 63; CHECK: exit: 64; CHECK-NEXT: ret void 65; 66entry: 67 br label %loop.header 68 69loop.header: 70 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 71 %iv.trunc = trunc i64 %iv to i16 72 br label %loop.cond 73 74loop.cond: 75 %blend = phi i16 [ %iv.trunc, %loop.header ] 76 %src.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 %blend 77 %lv = load i16, i16* %src.ptr, align 1 78 %cmp.b = icmp sgt i64 %iv, %a 79 br i1 %cmp.b, label %loop.next, label %loop.latch 80 81loop.next: 82 br label %loop.latch 83 84loop.latch: 85 %res = phi i16 [ %lv, %loop.cond ], [ 1, %loop.next ] 86 %dst.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 %iv 87 store i16 %res, i16* %dst.ptr 88 %iv.next = add nuw nsw i64 %iv, 1 89 %cmp439 = icmp ult i64 %iv, 31 90 br i1 %cmp439, label %loop.header, label %exit 91 92exit: 93 ret void 94} 95 96; The load in the loop does not need predication, because the accessed memory 97; is de-referenceable for all loop iterations. 98define void @single_incoming_phi_with_blend_mask(i64 %a, i64 %b) { 99; CHECK-LABEL: @single_incoming_phi_with_blend_mask( 100; CHECK-NEXT: entry: 101; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 102; CHECK: vector.ph: 103; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A:%.*]], i32 0 104; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 105; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 106; CHECK: vector.body: 107; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 108; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 109; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i16 110; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 0 111; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 0 112; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 113; CHECK-NEXT: [[TMP4:%.*]] = getelementptr [32 x i16], [32 x i16]* @src, i16 0, i16 [[TMP1]] 114; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i16, i16* [[TMP4]], i32 0 115; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16* [[TMP5]] to <2 x i16>* 116; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i16>, <2 x i16>* [[TMP6]], align 1 117; CHECK-NEXT: [[TMP7:%.*]] = icmp sgt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 118; CHECK-NEXT: [[TMP8:%.*]] = xor <2 x i1> [[TMP3]], <i1 true, i1 true> 119; CHECK-NEXT: [[TMP9:%.*]] = xor <2 x i1> [[TMP7]], <i1 true, i1 true> 120; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP3]], <2 x i1> [[TMP9]], <2 x i1> zeroinitializer 121; CHECK-NEXT: [[TMP11:%.*]] = select <2 x i1> [[TMP3]], <2 x i1> [[TMP7]], <2 x i1> zeroinitializer 122; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP10]], <2 x i16> [[WIDE_LOAD]], <2 x i16> zeroinitializer 123; CHECK-NEXT: [[PREDPHI1:%.*]] = select <2 x i1> [[TMP11]], <2 x i16> <i16 1, i16 1>, <2 x i16> [[PREDPHI]] 124; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 [[TMP2]] 125; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i16, i16* [[TMP12]], i32 0 126; CHECK-NEXT: [[TMP14:%.*]] = bitcast i16* [[TMP13]] to <2 x i16>* 127; CHECK-NEXT: store <2 x i16> [[PREDPHI1]], <2 x i16>* [[TMP14]], align 2 128; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 129; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], <i64 2, i64 2> 130; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32 131; CHECK-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 132; CHECK: middle.block: 133; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 32, 32 134; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 135; CHECK: scalar.ph: 136; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 32, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 137; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 138; CHECK: loop.header: 139; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 140; CHECK-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i16 141; CHECK-NEXT: [[CMP_A:%.*]] = icmp ugt i64 [[IV]], [[A]] 142; CHECK-NEXT: br i1 [[CMP_A]], label [[LOOP_COND:%.*]], label [[LOOP_LATCH]] 143; CHECK: loop.cond: 144; CHECK-NEXT: [[BLEND:%.*]] = phi i16 [ [[IV_TRUNC]], [[LOOP_HEADER]] ] 145; CHECK-NEXT: [[SRC_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[BLEND]] 146; CHECK-NEXT: [[LV:%.*]] = load i16, i16* [[SRC_PTR]], align 1 147; CHECK-NEXT: [[CMP_B:%.*]] = icmp sgt i64 [[IV]], [[A]] 148; CHECK-NEXT: br i1 [[CMP_B]], label [[LOOP_NEXT:%.*]], label [[LOOP_LATCH]] 149; CHECK: loop.next: 150; CHECK-NEXT: br label [[LOOP_LATCH]] 151; CHECK: loop.latch: 152; CHECK-NEXT: [[RES:%.*]] = phi i16 [ 0, [[LOOP_HEADER]] ], [ [[LV]], [[LOOP_COND]] ], [ 1, [[LOOP_NEXT]] ] 153; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 [[IV]] 154; CHECK-NEXT: store i16 [[RES]], i16* [[DST_PTR]], align 2 155; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 156; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 31 157; CHECK-NEXT: br i1 [[CMP439]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP5:![0-9]+]] 158; CHECK: exit: 159; CHECK-NEXT: ret void 160; 161entry: 162 br label %loop.header 163 164loop.header: 165 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 166 %iv.trunc = trunc i64 %iv to i16 167 %cmp.a = icmp ugt i64 %iv, %a 168 br i1 %cmp.a, label %loop.cond, label %loop.latch 169 170loop.cond: 171 %blend = phi i16 [ %iv.trunc, %loop.header ] 172 %src.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 %blend 173 %lv = load i16, i16* %src.ptr, align 1 174 %cmp.b = icmp sgt i64 %iv, %a 175 br i1 %cmp.b, label %loop.next, label %loop.latch 176 177loop.next: 178 br label %loop.latch 179 180loop.latch: 181 %res = phi i16 [ 0, %loop.header ], [ %lv, %loop.cond ], [ 1, %loop.next ] 182 %dst.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 %iv 183 store i16 %res, i16* %dst.ptr 184 %iv.next = add nuw nsw i64 %iv, 1 185 %cmp439 = icmp ult i64 %iv, 31 186 br i1 %cmp439, label %loop.header, label %exit 187 188exit: 189 ret void 190} 191 192define void @multiple_incoming_phi_with_blend_mask(i64 %a, i16* noalias %dst) { 193; CHECK-LABEL: @multiple_incoming_phi_with_blend_mask( 194; CHECK-NEXT: entry: 195; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 196; CHECK: vector.ph: 197; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A:%.*]], i32 0 198; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 199; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 200; CHECK: vector.body: 201; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 202; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 203; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <2 x i16> [ <i16 0, i16 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[VECTOR_BODY]] ] 204; CHECK-NEXT: [[VEC_IND3:%.*]] = phi <2 x i16> [ <i16 0, i16 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT4:%.*]], [[VECTOR_BODY]] ] 205; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 206; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 207; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i1> [[TMP1]], <i1 true, i1 true> 208; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[VEC_IND3]], <2 x i16> [[VEC_IND1]] 209; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i16> [[PREDPHI]], i32 0 210; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[TMP3]] 211; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i16> [[PREDPHI]], i32 1 212; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[TMP5]] 213; CHECK-NEXT: [[TMP7:%.*]] = load i16, i16* [[TMP4]], align 1 214; CHECK-NEXT: [[TMP8:%.*]] = load i16, i16* [[TMP6]], align 1 215; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i16> poison, i16 [[TMP7]], i32 0 216; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i16> [[TMP9]], i16 [[TMP8]], i32 1 217; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i16, i16* [[DST:%.*]], i64 [[TMP0]] 218; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i16, i16* [[TMP11]], i32 0 219; CHECK-NEXT: [[TMP13:%.*]] = bitcast i16* [[TMP12]] to <2 x i16>* 220; CHECK-NEXT: store <2 x i16> [[TMP10]], <2 x i16>* [[TMP13]], align 2 221; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 222; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], <i64 2, i64 2> 223; CHECK-NEXT: [[VEC_IND_NEXT2]] = add <2 x i16> [[VEC_IND1]], <i16 2, i16 2> 224; CHECK-NEXT: [[VEC_IND_NEXT4]] = add <2 x i16> [[VEC_IND3]], <i16 2, i16 2> 225; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 32 226; CHECK-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 227; CHECK: middle.block: 228; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 32, 32 229; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 230; CHECK: scalar.ph: 231; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 32, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 232; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 233; CHECK: loop.header: 234; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 235; CHECK-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i16 236; CHECK-NEXT: [[IV_TRUNC_2:%.*]] = trunc i64 [[IV]] to i16 237; CHECK-NEXT: [[CMP_A:%.*]] = icmp ugt i64 [[IV]], [[A]] 238; CHECK-NEXT: br i1 [[CMP_A]], label [[LOOP_NEXT:%.*]], label [[LOOP_LATCH]] 239; CHECK: loop.next: 240; CHECK-NEXT: br label [[LOOP_LATCH]] 241; CHECK: loop.latch: 242; CHECK-NEXT: [[BLEND:%.*]] = phi i16 [ [[IV_TRUNC]], [[LOOP_HEADER]] ], [ [[IV_TRUNC_2]], [[LOOP_NEXT]] ] 243; CHECK-NEXT: [[SRC_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[BLEND]] 244; CHECK-NEXT: [[LV:%.*]] = load i16, i16* [[SRC_PTR]], align 1 245; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds i16, i16* [[DST]], i64 [[IV]] 246; CHECK-NEXT: store i16 [[LV]], i16* [[DST_PTR]], align 2 247; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 248; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 31 249; CHECK-NEXT: br i1 [[CMP439]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP7:![0-9]+]] 250; CHECK: exit: 251; CHECK-NEXT: ret void 252; 253entry: 254 br label %loop.header 255 256loop.header: 257 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 258 %iv.trunc = trunc i64 %iv to i16 259 %iv.trunc.2 = trunc i64 %iv to i16 260 %cmp.a = icmp ugt i64 %iv, %a 261 br i1 %cmp.a, label %loop.next, label %loop.latch 262 263loop.next: 264 br label %loop.latch 265 266loop.latch: 267 %blend = phi i16 [ %iv.trunc, %loop.header ], [ %iv.trunc.2, %loop.next ] 268 %src.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 %blend 269 %lv = load i16, i16* %src.ptr, align 1 270 %dst.ptr = getelementptr inbounds i16, i16* %dst, i64 %iv 271 store i16 %lv, i16* %dst.ptr 272 %iv.next = add nuw nsw i64 %iv, 1 273 %cmp439 = icmp ult i64 %iv, 31 274 br i1 %cmp439, label %loop.header, label %exit 275 276exit: 277 ret void 278} 279 280; The load in the loop needs predication, because the accessed memory is not 281; de-referencable for all iterations of the loop. 282define void @single_incoming_needs_predication(i64 %a, i64 %b) { 283; CHECK-LABEL: @single_incoming_needs_predication( 284; CHECK-NEXT: entry: 285; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 286; CHECK: vector.ph: 287; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[A:%.*]], i32 0 288; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i64> [[BROADCAST_SPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer 289; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 290; CHECK: vector.body: 291; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE4:%.*]] ] 292; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_LOAD_CONTINUE4]] ] 293; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <2 x i16> [ <i16 0, i16 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[PRED_LOAD_CONTINUE4]] ] 294; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 295; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 296; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0 297; CHECK-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] 298; CHECK: pred.load.if: 299; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i16> [[VEC_IND1]], i32 0 300; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[TMP3]] 301; CHECK-NEXT: [[TMP5:%.*]] = load i16, i16* [[TMP4]], align 1 302; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i16> poison, i16 [[TMP5]], i32 0 303; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] 304; CHECK: pred.load.continue: 305; CHECK-NEXT: [[TMP7:%.*]] = phi <2 x i16> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] 306; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i1> [[TMP1]], i32 1 307; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4]] 308; CHECK: pred.load.if3: 309; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i16> [[VEC_IND1]], i32 1 310; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[TMP9]] 311; CHECK-NEXT: [[TMP11:%.*]] = load i16, i16* [[TMP10]], align 1 312; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i16> [[TMP7]], i16 [[TMP11]], i32 1 313; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE4]] 314; CHECK: pred.load.continue4: 315; CHECK-NEXT: [[TMP13:%.*]] = phi <2 x i16> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF3]] ] 316; CHECK-NEXT: [[TMP14:%.*]] = icmp sgt <2 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 317; CHECK-NEXT: [[TMP15:%.*]] = xor <2 x i1> [[TMP1]], <i1 true, i1 true> 318; CHECK-NEXT: [[TMP16:%.*]] = xor <2 x i1> [[TMP14]], <i1 true, i1 true> 319; CHECK-NEXT: [[TMP17:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP16]], <2 x i1> zeroinitializer 320; CHECK-NEXT: [[TMP18:%.*]] = select <2 x i1> [[TMP1]], <2 x i1> [[TMP14]], <2 x i1> zeroinitializer 321; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP17]], <2 x i16> [[TMP13]], <2 x i16> zeroinitializer 322; CHECK-NEXT: [[PREDPHI5:%.*]] = select <2 x i1> [[TMP18]], <2 x i16> <i16 1, i16 1>, <2 x i16> [[PREDPHI]] 323; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 [[TMP0]] 324; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i16, i16* [[TMP19]], i32 0 325; CHECK-NEXT: [[TMP21:%.*]] = bitcast i16* [[TMP20]] to <2 x i16>* 326; CHECK-NEXT: store <2 x i16> [[PREDPHI5]], <2 x i16>* [[TMP21]], align 2 327; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 328; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], <i64 2, i64 2> 329; CHECK-NEXT: [[VEC_IND_NEXT2]] = add <2 x i16> [[VEC_IND1]], <i16 2, i16 2> 330; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], 64 331; CHECK-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] 332; CHECK: middle.block: 333; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 64, 64 334; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 335; CHECK: scalar.ph: 336; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 64, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 337; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 338; CHECK: loop.header: 339; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 340; CHECK-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV]] to i16 341; CHECK-NEXT: [[CMP_A:%.*]] = icmp ugt i64 [[IV]], [[A]] 342; CHECK-NEXT: br i1 [[CMP_A]], label [[LOOP_COND:%.*]], label [[LOOP_LATCH]] 343; CHECK: loop.cond: 344; CHECK-NEXT: [[BLEND:%.*]] = phi i16 [ [[IV_TRUNC]], [[LOOP_HEADER]] ] 345; CHECK-NEXT: [[SRC_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 [[BLEND]] 346; CHECK-NEXT: [[LV:%.*]] = load i16, i16* [[SRC_PTR]], align 1 347; CHECK-NEXT: [[CMP_B:%.*]] = icmp sgt i64 [[IV]], [[A]] 348; CHECK-NEXT: br i1 [[CMP_B]], label [[LOOP_NEXT:%.*]], label [[LOOP_LATCH]] 349; CHECK: loop.next: 350; CHECK-NEXT: br label [[LOOP_LATCH]] 351; CHECK: loop.latch: 352; CHECK-NEXT: [[RES:%.*]] = phi i16 [ 0, [[LOOP_HEADER]] ], [ [[LV]], [[LOOP_COND]] ], [ 1, [[LOOP_NEXT]] ] 353; CHECK-NEXT: [[DST_PTR:%.*]] = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 [[IV]] 354; CHECK-NEXT: store i16 [[RES]], i16* [[DST_PTR]], align 2 355; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 356; CHECK-NEXT: [[CMP439:%.*]] = icmp ult i64 [[IV]], 63 357; CHECK-NEXT: br i1 [[CMP439]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP9:![0-9]+]] 358; CHECK: exit: 359; CHECK-NEXT: ret void 360; 361entry: 362 br label %loop.header 363 364loop.header: 365 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] 366 %iv.trunc = trunc i64 %iv to i16 367 %cmp.a = icmp ugt i64 %iv, %a 368 br i1 %cmp.a, label %loop.cond, label %loop.latch 369 370loop.cond: 371 %blend = phi i16 [ %iv.trunc, %loop.header ] 372 %src.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @src, i16 0, i16 %blend 373 %lv = load i16, i16* %src.ptr, align 1 374 %cmp.b = icmp sgt i64 %iv, %a 375 br i1 %cmp.b, label %loop.next, label %loop.latch 376 377loop.next: 378 br label %loop.latch 379 380loop.latch: 381 %res = phi i16 [ 0, %loop.header ], [ %lv, %loop.cond ], [ 1, %loop.next ] 382 %dst.ptr = getelementptr inbounds [32 x i16], [32 x i16]* @dst, i16 0, i64 %iv 383 store i16 %res, i16* %dst.ptr 384 %iv.next = add nuw nsw i64 %iv, 1 385 %cmp439 = icmp ult i64 %iv, 63 386 br i1 %cmp439, label %loop.header, label %exit 387 388exit: 389 ret void 390} 391 392; Test case for PR44800. 393define void @duplicated_incoming_blocks_blend(i32 %x, i32* %ptr) { 394; CHECK-LABEL: @duplicated_incoming_blocks_blend( 395; CHECK-NEXT: entry: 396; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 397; CHECK: vector.ph: 398; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 399; CHECK: vector.body: 400; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 401; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i32> [ <i32 0, i32 1>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 402; CHECK-NEXT: [[TMP0:%.*]] = extractelement <2 x i32> [[VEC_IND]], i32 0 403; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i32 [[TMP0]] 404; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP1]], i32 0 405; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>* 406; CHECK-NEXT: store <2 x i32> [[VEC_IND]], <2 x i32>* [[TMP3]], align 4 407; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 408; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], <i32 2, i32 2> 409; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000 410; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] 411; CHECK: middle.block: 412; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 1000, 1000 413; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 414; CHECK: scalar.ph: 415; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 416; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 417; CHECK: loop.header: 418; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD_I:%.*]], [[LOOP_LATCH:%.*]] ] 419; CHECK-NEXT: [[C_0:%.*]] = icmp ugt i32 [[IV]], [[X:%.*]] 420; CHECK-NEXT: br i1 [[C_0]], label [[LOOP_LATCH]], label [[LOOP_LATCH]] 421; CHECK: loop.latch: 422; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[IV]], [[LOOP_HEADER]] ], [ [[IV]], [[LOOP_HEADER]] ] 423; CHECK-NEXT: [[GEP_PTR:%.*]] = getelementptr i32, i32* [[PTR]], i32 [[P]] 424; CHECK-NEXT: store i32 [[P]], i32* [[GEP_PTR]], align 4 425; CHECK-NEXT: [[ADD_I]] = add nsw i32 [[P]], 1 426; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD_I]], 1000 427; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_HEADER]], label [[EXIT]], !llvm.loop [[LOOP11:![0-9]+]] 428; CHECK: exit: 429; CHECK-NEXT: ret void 430; 431entry: 432 br label %loop.header 433 434loop.header: 435 %iv = phi i32 [ 0 , %entry ], [ %add.i, %loop.latch ] 436 %c.0 = icmp ugt i32 %iv, %x 437 br i1 %c.0, label %loop.latch, label %loop.latch 438 439loop.latch: 440 %p = phi i32 [ %iv, %loop.header ], [ %iv, %loop.header ] 441 %gep.ptr = getelementptr i32, i32* %ptr, i32 %p 442 store i32 %p, i32* %gep.ptr 443 %add.i = add nsw i32 %p, 1 444 %cmp = icmp slt i32 %add.i, 1000 445 br i1 %cmp, label %loop.header, label %exit 446 447exit: 448 ret void 449} 450