1; RUN: opt -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S < %s 2>&1 | FileCheck %s
2; RUN: opt -passes='loop-vectorize' -force-vector-width=4 -force-vector-interleave=1 -S < %s 2>&1 | FileCheck %s
3
4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
5
6; Make sure the selects generated from reduction are always emitted
7; in deterministic order.
8; CHECK-LABEL: @foo(
9; CHECK: vector.body:
10; CHECK: icmp ule <4 x i64>
11; CHECK-NEXT: %[[VAR1:.*]] = add <4 x i32> <i32 3, i32 3, i32 3, i32 3>, %vec.phi1
12; CHECK-NEXT: %[[VAR2:.*]] = add <4 x i32> %vec.phi, <i32 5, i32 5, i32 5, i32 5>
13; CHECK-NEXT: select <4 x i1> {{.*}}, <4 x i32> %[[VAR2]], <4 x i32>
14; CHECK-NEXT: select <4 x i1> {{.*}}, <4 x i32> %[[VAR1]], <4 x i32>
15; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
16;
17define internal i64 @foo(i32* %t0) !prof !1 {
18t16:
19  br label %t20
20
21t17:                                               ; preds = %t20
22  %t18 = phi i32 [ %t24, %t20 ]
23  %t19 = phi i32 [ %t28, %t20 ]
24  br label %t31
25
26t20:                                               ; preds = %t20, %t16
27  %t21 = phi i64 [ 0, %t16 ], [ %t29, %t20 ]
28  %t22 = phi i32 [ 0, %t16 ], [ %t28, %t20 ]
29  %t23 = phi i32 [ 0, %t16 ], [ %t24, %t20 ]
30  %t24 = add i32 3, %t23
31  %t28 = add i32 %t22, 5
32  %t29 = add nuw nsw i64 %t21, 1
33  %t30 = icmp eq i64 %t29, undef
34  br i1 %t30, label %t17, label %t20, !prof !2
35
36t31:
37  ret i64 undef
38}
39
40; Make sure we do not fail when checking for ordered reduction. This test just
41; exercises the path and bails out without performing vectorization.
42; CHECK-LABEL: quux
43; CHECK-NOT: fadd <4 x
44define void @quux() {
45bb:
46  br label %header
47
48latch:                                              ; preds = %header
49  %tmp = phi double [ %tmp6, %header ]
50  br i1 undef, label %header, label %bb2
51
52bb2:                                              ; preds = %latch
53  %tmp3 = phi double [ %tmp, %latch ]
54  ret void
55
56header:                                              ; preds = %latch, %bb
57  %tmp5 = phi double [ 1.300000e+01, %bb ], [ %tmp, %latch ]
58  %tmp6 = fadd double %tmp5, 1.000000e+00
59  br label %latch
60}
61
62!1 = !{!"function_entry_count", i64 801}
63!2 = !{!"branch_weights", i32 746, i32 1}
64