1cee313d2SEric Christopher; RUN: opt < %s  -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s
2cee313d2SEric Christopher
3cee313d2SEric Christophertarget datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
4cee313d2SEric Christopher
5cee313d2SEric Christopher;CHECK-LABEL: @read_only_func(
6cee313d2SEric Christopher;CHECK: load <4 x i32>
7cee313d2SEric Christopher;CHECK: ret i32
8cee313d2SEric Christopherdefine i32 @read_only_func(i32* nocapture %A, i32* nocapture %B, i32 %n) nounwind uwtable readonly ssp {
9cee313d2SEric Christopher  %1 = icmp sgt i32 %n, 0
10cee313d2SEric Christopher  br i1 %1, label %.lr.ph, label %._crit_edge
11cee313d2SEric Christopher
12cee313d2SEric Christopher.lr.ph:                                           ; preds = %0, %.lr.ph
13cee313d2SEric Christopher  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
14cee313d2SEric Christopher  %sum.02 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
15cee313d2SEric Christopher  %2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
16cee313d2SEric Christopher  %3 = load i32, i32* %2, align 4
17cee313d2SEric Christopher  %4 = add nsw i64 %indvars.iv, 13
18cee313d2SEric Christopher  %5 = getelementptr inbounds i32, i32* %B, i64 %4
19cee313d2SEric Christopher  %6 = load i32, i32* %5, align 4
20cee313d2SEric Christopher  %7 = shl i32 %6, 1
21cee313d2SEric Christopher  %8 = add i32 %3, %sum.02
22cee313d2SEric Christopher  %9 = add i32 %8, %7
23cee313d2SEric Christopher  %indvars.iv.next = add i64 %indvars.iv, 1
24cee313d2SEric Christopher  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
25cee313d2SEric Christopher  %exitcond = icmp eq i32 %lftr.wideiv, %n
26cee313d2SEric Christopher  br i1 %exitcond, label %._crit_edge, label %.lr.ph
27cee313d2SEric Christopher
28cee313d2SEric Christopher._crit_edge:                                      ; preds = %.lr.ph, %0
29cee313d2SEric Christopher  %sum.0.lcssa = phi i32 [ 0, %0 ], [ %9, %.lr.ph ]
30cee313d2SEric Christopher  ret i32 %sum.0.lcssa
31cee313d2SEric Christopher}
32*1e21181aSMatt Arsenault
33*1e21181aSMatt Arsenault; Ensure that volatile loads are not vectorized in a read-only loop.
34*1e21181aSMatt Arsenault
35*1e21181aSMatt Arsenault;CHECK-LABEL: @read_only_func_volatile(
36*1e21181aSMatt Arsenault;CHECK-NOT: load <4 x i32>
37*1e21181aSMatt Arsenault;CHECK: ret i32
38*1e21181aSMatt Arsenaultdefine i32 @read_only_func_volatile(i32* nocapture %A, i32* nocapture %B, i32 %n) nounwind uwtable readonly ssp {
39*1e21181aSMatt Arsenault  %1 = icmp sgt i32 %n, 0
40*1e21181aSMatt Arsenault  br i1 %1, label %.lr.ph, label %._crit_edge
41*1e21181aSMatt Arsenault
42*1e21181aSMatt Arsenault.lr.ph:                                           ; preds = %0, %.lr.ph
43*1e21181aSMatt Arsenault  %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %0 ]
44*1e21181aSMatt Arsenault  %sum.02 = phi i32 [ %9, %.lr.ph ], [ 0, %0 ]
45*1e21181aSMatt Arsenault  %2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
46*1e21181aSMatt Arsenault  %3 = load volatile i32, i32* %2, align 4
47*1e21181aSMatt Arsenault  %4 = add nsw i64 %indvars.iv, 13
48*1e21181aSMatt Arsenault  %5 = getelementptr inbounds i32, i32* %B, i64 %4
49*1e21181aSMatt Arsenault  %6 = load i32, i32* %5, align 4
50*1e21181aSMatt Arsenault  %7 = shl i32 %6, 1
51*1e21181aSMatt Arsenault  %8 = add i32 %3, %sum.02
52*1e21181aSMatt Arsenault  %9 = add i32 %8, %7
53*1e21181aSMatt Arsenault  %indvars.iv.next = add i64 %indvars.iv, 1
54*1e21181aSMatt Arsenault  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
55*1e21181aSMatt Arsenault  %exitcond = icmp eq i32 %lftr.wideiv, %n
56*1e21181aSMatt Arsenault  br i1 %exitcond, label %._crit_edge, label %.lr.ph
57*1e21181aSMatt Arsenault
58*1e21181aSMatt Arsenault._crit_edge:                                      ; preds = %.lr.ph, %0
59*1e21181aSMatt Arsenault  %sum.0.lcssa = phi i32 [ 0, %0 ], [ %9, %.lr.ph ]
60*1e21181aSMatt Arsenault  ret i32 %sum.0.lcssa
61*1e21181aSMatt Arsenault}
62