1; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info -simplifycfg < %s | FileCheck %s --check-prefix=UNROLL 2; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY 3; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -enable-cond-stores-vec -verify-loop-info -simplifycfg < %s | FileCheck %s --check-prefix=VEC 4 5target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 6 7; Test predication of stores. 8define i32 @test(i32* nocapture %f) #0 { 9entry: 10 br label %for.body 11 12; VEC-LABEL: test 13; VEC: %[[v0:.+]] = add i64 %index, 0 14; VEC: %[[v8:.+]] = icmp sgt <2 x i32> %{{.*}}, <i32 100, i32 100> 15; VEC: %[[v9:.+]] = add nsw <2 x i32> %{{.*}}, <i32 20, i32 20> 16; VEC: %[[v10:.+]] = and <2 x i1> %[[v8]], <i1 true, i1 true> 17; VEC: %[[o1:.+]] = or <2 x i1> zeroinitializer, %[[v10]] 18; VEC: %[[v11:.+]] = extractelement <2 x i1> %[[o1]], i32 0 19; VEC: %[[v12:.+]] = icmp eq i1 %[[v11]], true 20; VEC: br i1 %[[v12]], label %[[cond:.+]], label %[[else:.+]] 21; 22; VEC: [[cond]]: 23; VEC: %[[v13:.+]] = extractelement <2 x i32> %[[v9]], i32 0 24; VEC: %[[v2:.+]] = getelementptr inbounds i32, i32* %f, i64 %[[v0]] 25; VEC: store i32 %[[v13]], i32* %[[v2]], align 4 26; VEC: br label %[[else:.+]] 27; 28; VEC: [[else]]: 29; VEC: %[[v15:.+]] = extractelement <2 x i1> %[[o1]], i32 1 30; VEC: %[[v16:.+]] = icmp eq i1 %[[v15]], true 31; VEC: br i1 %[[v16]], label %[[cond2:.+]], label %[[else2:.+]] 32; 33; VEC: [[cond2]]: 34; VEC: %[[v17:.+]] = extractelement <2 x i32> %[[v9]], i32 1 35; VEC: %[[v1:.+]] = add i64 %index, 1 36; VEC: %[[v4:.+]] = getelementptr inbounds i32, i32* %f, i64 %[[v1]] 37; VEC: store i32 %[[v17]], i32* %[[v4]], align 4 38; VEC: br label %[[else2:.+]] 39; 40; VEC: [[else2]]: 41 42; UNROLL-LABEL: test 43; UNROLL: vector.body: 44; UNROLL: %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 0 45; UNROLL: %[[IND1:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 1 46; UNROLL: %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]] 47; UNROLL: %[[v1:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND1]] 48; UNROLL: %[[v2:[a-zA-Z0-9]+]] = load i32, i32* %[[v0]], align 4 49; UNROLL: %[[v3:[a-zA-Z0-9]+]] = load i32, i32* %[[v1]], align 4 50; UNROLL: %[[v4:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v2]], 100 51; UNROLL: %[[v5:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v3]], 100 52; UNROLL: %[[o1:[a-zA-Z0-9]+]] = or i1 false, %[[v4]] 53; UNROLL: %[[o2:[a-zA-Z0-9]+]] = or i1 false, %[[v5]] 54; UNROLL: %[[v8:[a-zA-Z0-9]+]] = icmp eq i1 %[[o1]], true 55; UNROLL: br i1 %[[v8]], label %[[cond:[a-zA-Z0-9.]+]], label %[[else:[a-zA-Z0-9.]+]] 56; 57; UNROLL: [[cond]]: 58; UNROLL: %[[v6:[a-zA-Z0-9]+]] = add nsw i32 %[[v2]], 20 59; UNROLL: store i32 %[[v6]], i32* %[[v0]], align 4 60; UNROLL: br label %[[else]] 61; 62; UNROLL: [[else]]: 63; UNROLL: %[[v9:[a-zA-Z0-9]+]] = icmp eq i1 %[[o2]], true 64; UNROLL: br i1 %[[v9]], label %[[cond2:[a-zA-Z0-9.]+]], label %[[else2:[a-zA-Z0-9.]+]] 65; 66; UNROLL: [[cond2]]: 67; UNROLL: %[[v7:[a-zA-Z0-9]+]] = add nsw i32 %[[v3]], 20 68; UNROLL: store i32 %[[v7]], i32* %[[v1]], align 4 69; UNROLL: br label %[[else2]] 70; 71; UNROLL: [[else2]]: 72 73for.body: 74 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ] 75 %arrayidx = getelementptr inbounds i32, i32* %f, i64 %indvars.iv 76 %0 = load i32, i32* %arrayidx, align 4 77 %cmp1 = icmp sgt i32 %0, 100 78 br i1 %cmp1, label %if.then, label %for.inc 79 80if.then: 81 %add = add nsw i32 %0, 20 82 store i32 %add, i32* %arrayidx, align 4 83 br label %for.inc 84 85for.inc: 86 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 87 %exitcond = icmp eq i64 %indvars.iv.next, 128 88 br i1 %exitcond, label %for.end, label %for.body 89 90for.end: 91 ret i32 0 92} 93 94; Track basic blocks when unrolling conditional blocks. This code used to assert 95; because we did not update the phi nodes with the proper predecessor in the 96; vectorized loop body. 97; PR18724 98 99; UNROLL-NOSIMPLIFY-LABEL: bug18724 100; UNROLL-NOSIMPLIFY: store i32 101; UNROLL-NOSIMPLIFY: store i32 102 103define void @bug18724() { 104entry: 105 br label %for.body9 106 107for.body9: 108 br i1 undef, label %for.inc26, label %for.body14 109 110for.body14: 111 %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ undef, %for.body9 ] 112 %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ undef, %for.body9 ] 113 %arrayidx16 = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 %indvars.iv3 114 %tmp = load i32, i32* %arrayidx16, align 4 115 br i1 undef, label %if.then18, label %for.inc23 116 117if.then18: 118 store i32 2, i32* %arrayidx16, align 4 119 %inc21 = add nsw i32 %iNewChunks.120, 1 120 br label %for.inc23 121 122for.inc23: 123 %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ] 124 %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1 125 %tmp1 = trunc i64 %indvars.iv3 to i32 126 %cmp13 = icmp slt i32 %tmp1, 0 127 br i1 %cmp13, label %for.body14, label %for.inc26 128 129for.inc26: 130 %iNewChunks.1.lcssa = phi i32 [ undef, %for.body9 ], [ %iNewChunks.2, %for.inc23 ] 131 unreachable 132} 133