1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s --check-prefix=UNROLL
3; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY
4; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -verify-loop-info -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s --check-prefix=VEC
5
6target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
7
8; Test predication of stores.
9define i32 @test(i32* nocapture %f) #0 {
10; UNROLL-LABEL: @test(
11; UNROLL-NEXT:  entry:
12; UNROLL-NEXT:    br label [[VECTOR_BODY:%.*]]
13; UNROLL:       vector.body:
14; UNROLL-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE3:%.*]] ]
15; UNROLL-NEXT:    [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
16; UNROLL-NEXT:    [[INDUCTION1:%.*]] = add i64 [[INDEX]], 1
17; UNROLL-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[F:%.*]], i64 [[INDUCTION]]
18; UNROLL-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDUCTION1]]
19; UNROLL-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
20; UNROLL-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
21; UNROLL-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[TMP2]], 100
22; UNROLL-NEXT:    [[TMP5:%.*]] = icmp sgt i32 [[TMP3]], 100
23; UNROLL-NEXT:    br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
24; UNROLL:       pred.store.if:
25; UNROLL-NEXT:    [[TMP6:%.*]] = add nsw i32 [[TMP2]], 20
26; UNROLL-NEXT:    store i32 [[TMP6]], i32* [[TMP0]], align 4
27; UNROLL-NEXT:    br label [[PRED_STORE_CONTINUE]]
28; UNROLL:       pred.store.continue:
29; UNROLL-NEXT:    br i1 [[TMP5]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3]]
30; UNROLL:       pred.store.if2:
31; UNROLL-NEXT:    [[TMP7:%.*]] = add nsw i32 [[TMP3]], 20
32; UNROLL-NEXT:    store i32 [[TMP7]], i32* [[TMP1]], align 4
33; UNROLL-NEXT:    br label [[PRED_STORE_CONTINUE3]]
34; UNROLL:       pred.store.continue3:
35; UNROLL-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
36; UNROLL-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
37; UNROLL-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
38; UNROLL:       middle.block:
39; UNROLL-NEXT:    [[CMP_N:%.*]] = icmp eq i64 128, 128
40; UNROLL-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
41; UNROLL:       for.body:
42; UNROLL-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 128, [[MIDDLE_BLOCK]] ]
43; UNROLL-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDVARS_IV]]
44; UNROLL-NEXT:    [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
45; UNROLL-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[TMP9]], 100
46; UNROLL-NEXT:    br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]]
47; UNROLL:       if.then:
48; UNROLL-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], 20
49; UNROLL-NEXT:    store i32 [[ADD]], i32* [[ARRAYIDX]], align 4
50; UNROLL-NEXT:    br label [[FOR_INC]]
51; UNROLL:       for.inc:
52; UNROLL-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
53; UNROLL-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128
54; UNROLL-NEXT:    br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
55; UNROLL:       for.end:
56; UNROLL-NEXT:    ret i32 0
57;
58; UNROLL-NOSIMPLIFY-LABEL: @test(
59; UNROLL-NOSIMPLIFY-NEXT:  entry:
60; UNROLL-NOSIMPLIFY-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
61; UNROLL-NOSIMPLIFY:       vector.ph:
62; UNROLL-NOSIMPLIFY-NEXT:    br label [[VECTOR_BODY:%.*]]
63; UNROLL-NOSIMPLIFY:       vector.body:
64; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE3:%.*]] ]
65; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
66; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION1:%.*]] = add i64 [[INDEX]], 1
67; UNROLL-NOSIMPLIFY-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[F:%.*]], i64 [[INDUCTION]]
68; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDUCTION1]]
69; UNROLL-NOSIMPLIFY-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
70; UNROLL-NOSIMPLIFY-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
71; UNROLL-NOSIMPLIFY-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[TMP2]], 100
72; UNROLL-NOSIMPLIFY-NEXT:    [[TMP5:%.*]] = icmp sgt i32 [[TMP3]], 100
73; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
74; UNROLL-NOSIMPLIFY:       pred.store.if:
75; UNROLL-NOSIMPLIFY-NEXT:    [[TMP6:%.*]] = add nsw i32 [[TMP2]], 20
76; UNROLL-NOSIMPLIFY-NEXT:    store i32 [[TMP6]], i32* [[TMP0]], align 4
77; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE]]
78; UNROLL-NOSIMPLIFY:       pred.store.continue:
79; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP5]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3]]
80; UNROLL-NOSIMPLIFY:       pred.store.if2:
81; UNROLL-NOSIMPLIFY-NEXT:    [[TMP7:%.*]] = add nsw i32 [[TMP3]], 20
82; UNROLL-NOSIMPLIFY-NEXT:    store i32 [[TMP7]], i32* [[TMP1]], align 4
83; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE3]]
84; UNROLL-NOSIMPLIFY:       pred.store.continue3:
85; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
86; UNROLL-NOSIMPLIFY-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
87; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
88; UNROLL-NOSIMPLIFY:       middle.block:
89; UNROLL-NOSIMPLIFY-NEXT:    [[CMP_N:%.*]] = icmp eq i64 128, 128
90; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
91; UNROLL-NOSIMPLIFY:       scalar.ph:
92; UNROLL-NOSIMPLIFY-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
93; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_BODY:%.*]]
94; UNROLL-NOSIMPLIFY:       for.body:
95; UNROLL-NOSIMPLIFY-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ]
96; UNROLL-NOSIMPLIFY-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDVARS_IV]]
97; UNROLL-NOSIMPLIFY-NEXT:    [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
98; UNROLL-NOSIMPLIFY-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[TMP9]], 100
99; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]]
100; UNROLL-NOSIMPLIFY:       if.then:
101; UNROLL-NOSIMPLIFY-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], 20
102; UNROLL-NOSIMPLIFY-NEXT:    store i32 [[ADD]], i32* [[ARRAYIDX]], align 4
103; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_INC]]
104; UNROLL-NOSIMPLIFY:       for.inc:
105; UNROLL-NOSIMPLIFY-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
106; UNROLL-NOSIMPLIFY-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128
107; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
108; UNROLL-NOSIMPLIFY:       for.end:
109; UNROLL-NOSIMPLIFY-NEXT:    ret i32 0
110;
111; VEC-LABEL: @test(
112; VEC-NEXT:  entry:
113; VEC-NEXT:    br label [[VECTOR_BODY:%.*]]
114; VEC:       vector.body:
115; VEC-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]
116; VEC-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
117; VEC-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[F:%.*]], i64 [[TMP0]]
118; VEC-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0
119; VEC-NEXT:    [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <2 x i32>*
120; VEC-NEXT:    [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP3]], align 4
121; VEC-NEXT:    [[TMP4:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], <i32 100, i32 100>
122; VEC-NEXT:    [[TMP5:%.*]] = extractelement <2 x i1> [[TMP4]], i32 0
123; VEC-NEXT:    br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
124; VEC:       pred.store.if:
125; VEC-NEXT:    [[TMP6:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 0
126; VEC-NEXT:    [[TMP7:%.*]] = add nsw i32 [[TMP6]], 20
127; VEC-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[TMP0]]
128; VEC-NEXT:    store i32 [[TMP7]], i32* [[TMP8]], align 4
129; VEC-NEXT:    br label [[PRED_STORE_CONTINUE]]
130; VEC:       pred.store.continue:
131; VEC-NEXT:    [[TMP9:%.*]] = extractelement <2 x i1> [[TMP4]], i32 1
132; VEC-NEXT:    br i1 [[TMP9]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2]]
133; VEC:       pred.store.if1:
134; VEC-NEXT:    [[TMP10:%.*]] = add i64 [[INDEX]], 1
135; VEC-NEXT:    [[TMP11:%.*]] = extractelement <2 x i32> [[WIDE_LOAD]], i32 1
136; VEC-NEXT:    [[TMP12:%.*]] = add nsw i32 [[TMP11]], 20
137; VEC-NEXT:    [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[TMP10]]
138; VEC-NEXT:    store i32 [[TMP12]], i32* [[TMP13]], align 4
139; VEC-NEXT:    br label [[PRED_STORE_CONTINUE2]]
140; VEC:       pred.store.continue2:
141; VEC-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
142; VEC-NEXT:    [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
143; VEC-NEXT:    br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
144; VEC:       middle.block:
145; VEC-NEXT:    [[CMP_N:%.*]] = icmp eq i64 128, 128
146; VEC-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
147; VEC:       for.body:
148; VEC-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 128, [[MIDDLE_BLOCK]] ]
149; VEC-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[F]], i64 [[INDVARS_IV]]
150; VEC-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
151; VEC-NEXT:    [[CMP1:%.*]] = icmp sgt i32 [[TMP15]], 100
152; VEC-NEXT:    br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]]
153; VEC:       if.then:
154; VEC-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 20
155; VEC-NEXT:    store i32 [[ADD]], i32* [[ARRAYIDX]], align 4
156; VEC-NEXT:    br label [[FOR_INC]]
157; VEC:       for.inc:
158; VEC-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
159; VEC-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128
160; VEC-NEXT:    br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
161; VEC:       for.end:
162; VEC-NEXT:    ret i32 0
163;
164entry:
165  br label %for.body
166
167
168
169for.body:
170  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
171  %arrayidx = getelementptr inbounds i32, i32* %f, i64 %indvars.iv
172  %0 = load i32, i32* %arrayidx, align 4
173  %cmp1 = icmp sgt i32 %0, 100
174  br i1 %cmp1, label %if.then, label %for.inc
175
176if.then:
177  %add = add nsw i32 %0, 20
178  store i32 %add, i32* %arrayidx, align 4
179  br label %for.inc
180
181for.inc:
182  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
183  %exitcond = icmp eq i64 %indvars.iv.next, 128
184  br i1 %exitcond, label %for.end, label %for.body
185
186for.end:
187  ret i32 0
188}
189
190; Track basic blocks when unrolling conditional blocks. This code used to assert
191; because we did not update the phi nodes with the proper predecessor in the
192; vectorized loop body.
193; PR18724
194
195define void @bug18724(i1 %cond) {
196; UNROLL-LABEL: @bug18724(
197; UNROLL-NEXT:  entry:
198; UNROLL-NEXT:    [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
199; UNROLL-NEXT:    call void @llvm.assume(i1 [[TMP0]])
200; UNROLL-NEXT:    [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 undef, i32 0)
201; UNROLL-NEXT:    [[TMP1:%.*]] = sub i32 [[SMAX]], undef
202; UNROLL-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
203; UNROLL-NEXT:    [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
204; UNROLL-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2
205; UNROLL-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
206; UNROLL:       vector.ph:
207; UNROLL-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2
208; UNROLL-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
209; UNROLL-NEXT:    [[IND_END:%.*]] = add i64 undef, [[N_VEC]]
210; UNROLL-NEXT:    br label [[VECTOR_BODY:%.*]]
211; UNROLL:       vector.body:
212; UNROLL-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE4:%.*]] ]
213; UNROLL-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ undef, [[VECTOR_PH]] ], [ [[PREDPHI:%.*]], [[PRED_STORE_CONTINUE4]] ]
214; UNROLL-NEXT:    [[VEC_PHI2:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[PREDPHI5:%.*]], [[PRED_STORE_CONTINUE4]] ]
215; UNROLL-NEXT:    [[OFFSET_IDX:%.*]] = add i64 undef, [[INDEX]]
216; UNROLL-NEXT:    [[INDUCTION:%.*]] = add i64 [[OFFSET_IDX]], 0
217; UNROLL-NEXT:    [[INDUCTION1:%.*]] = add i64 [[OFFSET_IDX]], 1
218; UNROLL-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDUCTION]]
219; UNROLL-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDUCTION1]]
220; UNROLL-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 4
221; UNROLL-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP5]], align 4
222; UNROLL-NEXT:    br i1 undef, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE4]]
223; UNROLL:       pred.store.if:
224; UNROLL-NEXT:    store i32 2, i32* [[TMP4]], align 4
225; UNROLL-NEXT:    br label [[PRED_STORE_CONTINUE4]]
226; UNROLL:       pred.store.continue4:
227; UNROLL-NEXT:    [[TMP8:%.*]] = add i32 [[VEC_PHI]], 1
228; UNROLL-NEXT:    [[TMP9:%.*]] = add i32 [[VEC_PHI2]], 1
229; UNROLL-NEXT:    [[PREDPHI]] = select i1 undef, i32 [[VEC_PHI]], i32 [[TMP8]]
230; UNROLL-NEXT:    [[PREDPHI5]] = select i1 undef, i32 [[VEC_PHI2]], i32 [[TMP9]]
231; UNROLL-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
232; UNROLL-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
233; UNROLL-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
234; UNROLL:       middle.block:
235; UNROLL-NEXT:    [[BIN_RDX:%.*]] = add i32 [[PREDPHI5]], [[PREDPHI]]
236; UNROLL-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
237; UNROLL-NEXT:    [[TMP11:%.*]] = xor i1 [[CMP_N]], true
238; UNROLL-NEXT:    call void @llvm.assume(i1 [[TMP11]])
239; UNROLL-NEXT:    br label [[SCALAR_PH]]
240; UNROLL:       scalar.ph:
241; UNROLL-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ undef, [[ENTRY:%.*]] ]
242; UNROLL-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ]
243; UNROLL-NEXT:    br label [[FOR_BODY14:%.*]]
244; UNROLL:       for.body14:
245; UNROLL-NEXT:    [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
246; UNROLL-NEXT:    [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], [[FOR_INC23]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]
247; UNROLL-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDVARS_IV3]]
248; UNROLL-NEXT:    [[TMP:%.*]] = load i32, i32* [[ARRAYIDX16]], align 4
249; UNROLL-NEXT:    br i1 undef, label [[IF_THEN18:%.*]], label [[FOR_INC23]]
250; UNROLL:       if.then18:
251; UNROLL-NEXT:    store i32 2, i32* [[ARRAYIDX16]], align 4
252; UNROLL-NEXT:    [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1
253; UNROLL-NEXT:    br label [[FOR_INC23]]
254; UNROLL:       for.inc23:
255; UNROLL-NEXT:    [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
256; UNROLL-NEXT:    [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
257; UNROLL-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
258; UNROLL-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
259; UNROLL-NEXT:    call void @llvm.assume(i1 [[CMP13]])
260; UNROLL-NEXT:    br label [[FOR_BODY14]]
261;
262; UNROLL-NOSIMPLIFY-LABEL: @bug18724(
263; UNROLL-NOSIMPLIFY-NEXT:  entry:
264; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_BODY9:%.*]]
265; UNROLL-NOSIMPLIFY:       for.body9:
266; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[COND:%.*]], label [[FOR_INC26:%.*]], label [[FOR_BODY14_PREHEADER:%.*]]
267; UNROLL-NOSIMPLIFY:       for.body14.preheader:
268; UNROLL-NOSIMPLIFY-NEXT:    [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 undef, i32 0)
269; UNROLL-NOSIMPLIFY-NEXT:    [[TMP0:%.*]] = sub i32 [[SMAX]], undef
270; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
271; UNROLL-NOSIMPLIFY-NEXT:    [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
272; UNROLL-NOSIMPLIFY-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2
273; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
274; UNROLL-NOSIMPLIFY:       vector.ph:
275; UNROLL-NOSIMPLIFY-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 2
276; UNROLL-NOSIMPLIFY-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]
277; UNROLL-NOSIMPLIFY-NEXT:    [[IND_END:%.*]] = add i64 undef, [[N_VEC]]
278; UNROLL-NOSIMPLIFY-NEXT:    br label [[VECTOR_BODY:%.*]]
279; UNROLL-NOSIMPLIFY:       vector.body:
280; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE4:%.*]] ]
281; UNROLL-NOSIMPLIFY-NEXT:    [[VEC_PHI:%.*]] = phi i32 [ undef, [[VECTOR_PH]] ], [ [[PREDPHI:%.*]], [[PRED_STORE_CONTINUE4]] ]
282; UNROLL-NOSIMPLIFY-NEXT:    [[VEC_PHI2:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[PREDPHI5:%.*]], [[PRED_STORE_CONTINUE4]] ]
283; UNROLL-NOSIMPLIFY-NEXT:    [[OFFSET_IDX:%.*]] = add i64 undef, [[INDEX]]
284; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION:%.*]] = add i64 [[OFFSET_IDX]], 0
285; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION1:%.*]] = add i64 [[OFFSET_IDX]], 1
286; UNROLL-NOSIMPLIFY-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDUCTION]]
287; UNROLL-NOSIMPLIFY-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDUCTION1]]
288; UNROLL-NOSIMPLIFY-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 4
289; UNROLL-NOSIMPLIFY-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 4
290; UNROLL-NOSIMPLIFY-NEXT:    br i1 undef, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
291; UNROLL-NOSIMPLIFY:       pred.store.if:
292; UNROLL-NOSIMPLIFY-NEXT:    store i32 2, i32* [[TMP3]], align 4
293; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE]]
294; UNROLL-NOSIMPLIFY:       pred.store.continue:
295; UNROLL-NOSIMPLIFY-NEXT:    br i1 undef, label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4]]
296; UNROLL-NOSIMPLIFY:       pred.store.if3:
297; UNROLL-NOSIMPLIFY-NEXT:    store i32 2, i32* [[TMP4]], align 4
298; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE4]]
299; UNROLL-NOSIMPLIFY:       pred.store.continue4:
300; UNROLL-NOSIMPLIFY-NEXT:    [[TMP7:%.*]] = add i32 [[VEC_PHI]], 1
301; UNROLL-NOSIMPLIFY-NEXT:    [[TMP8:%.*]] = add i32 [[VEC_PHI2]], 1
302; UNROLL-NOSIMPLIFY-NEXT:    [[PREDPHI]] = select i1 undef, i32 [[VEC_PHI]], i32 [[TMP7]]
303; UNROLL-NOSIMPLIFY-NEXT:    [[PREDPHI5]] = select i1 undef, i32 [[VEC_PHI2]], i32 [[TMP8]]
304; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
305; UNROLL-NOSIMPLIFY-NEXT:    [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
306; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
307; UNROLL-NOSIMPLIFY:       middle.block:
308; UNROLL-NOSIMPLIFY-NEXT:    [[BIN_RDX:%.*]] = add i32 [[PREDPHI5]], [[PREDPHI]]
309; UNROLL-NOSIMPLIFY-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]
310; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[CMP_N]], label [[FOR_INC26_LOOPEXIT:%.*]], label [[SCALAR_PH]]
311; UNROLL-NOSIMPLIFY:       scalar.ph:
312; UNROLL-NOSIMPLIFY-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ undef, [[FOR_BODY14_PREHEADER]] ]
313; UNROLL-NOSIMPLIFY-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ undef, [[FOR_BODY14_PREHEADER]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ]
314; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_BODY14:%.*]]
315; UNROLL-NOSIMPLIFY:       for.body14:
316; UNROLL-NOSIMPLIFY-NEXT:    [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
317; UNROLL-NOSIMPLIFY-NEXT:    [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], [[FOR_INC23]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]
318; UNROLL-NOSIMPLIFY-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDVARS_IV3]]
319; UNROLL-NOSIMPLIFY-NEXT:    [[TMP:%.*]] = load i32, i32* [[ARRAYIDX16]], align 4
320; UNROLL-NOSIMPLIFY-NEXT:    br i1 undef, label [[IF_THEN18:%.*]], label [[FOR_INC23]]
321; UNROLL-NOSIMPLIFY:       if.then18:
322; UNROLL-NOSIMPLIFY-NEXT:    store i32 2, i32* [[ARRAYIDX16]], align 4
323; UNROLL-NOSIMPLIFY-NEXT:    [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1
324; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_INC23]]
325; UNROLL-NOSIMPLIFY:       for.inc23:
326; UNROLL-NOSIMPLIFY-NEXT:    [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
327; UNROLL-NOSIMPLIFY-NEXT:    [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
328; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
329; UNROLL-NOSIMPLIFY-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
330; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[CMP13]], label [[FOR_BODY14]], label [[FOR_INC26_LOOPEXIT]], !llvm.loop [[LOOP4:![0-9]+]]
331; UNROLL-NOSIMPLIFY:       for.inc26.loopexit:
332; UNROLL-NOSIMPLIFY-NEXT:    [[INEWCHUNKS_2_LCSSA:%.*]] = phi i32 [ [[INEWCHUNKS_2]], [[FOR_INC23]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK]] ]
333; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_INC26]]
334; UNROLL-NOSIMPLIFY:       for.inc26:
335; UNROLL-NOSIMPLIFY-NEXT:    [[INEWCHUNKS_1_LCSSA:%.*]] = phi i32 [ undef, [[FOR_BODY9]] ], [ [[INEWCHUNKS_2_LCSSA]], [[FOR_INC26_LOOPEXIT]] ]
336; UNROLL-NOSIMPLIFY-NEXT:    unreachable
337;
338; VEC-LABEL: @bug18724(
339; VEC-NEXT:  entry:
340; VEC-NEXT:    [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
341; VEC-NEXT:    call void @llvm.assume(i1 [[TMP0]])
342; VEC-NEXT:    [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 undef, i32 0)
343; VEC-NEXT:    [[TMP1:%.*]] = sub i32 [[SMAX]], undef
344; VEC-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
345; VEC-NEXT:    [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
346; VEC-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2
347; VEC-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
348; VEC:       vector.ph:
349; VEC-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2
350; VEC-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
351; VEC-NEXT:    [[IND_END:%.*]] = add i64 undef, [[N_VEC]]
352; VEC-NEXT:    br label [[VECTOR_BODY:%.*]]
353; VEC:       vector.body:
354; VEC-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE2:%.*]] ]
355; VEC-NEXT:    [[VEC_PHI:%.*]] = phi <2 x i32> [ <i32 undef, i32 0>, [[VECTOR_PH]] ], [ [[PREDPHI:%.*]], [[PRED_STORE_CONTINUE2]] ]
356; VEC-NEXT:    [[OFFSET_IDX:%.*]] = add i64 undef, [[INDEX]]
357; VEC-NEXT:    [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 0
358; VEC-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[TMP4]]
359; VEC-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i32 0
360; VEC-NEXT:    [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <2 x i32>*
361; VEC-NEXT:    [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP7]], align 4
362; VEC-NEXT:    br i1 undef, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE2]]
363; VEC:       pred.store.if:
364; VEC-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[TMP4]]
365; VEC-NEXT:    store i32 2, i32* [[TMP8]], align 4
366; VEC-NEXT:    br label [[PRED_STORE_CONTINUE2]]
367; VEC:       pred.store.continue2:
368; VEC-NEXT:    [[TMP9:%.*]] = add <2 x i32> [[VEC_PHI]], <i32 1, i32 1>
369; VEC-NEXT:    [[PREDPHI]] = select <2 x i1> undef, <2 x i32> [[VEC_PHI]], <2 x i32> [[TMP9]]
370; VEC-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
371; VEC-NEXT:    [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
372; VEC-NEXT:    br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
373; VEC:       middle.block:
374; VEC-NEXT:    [[TMP11:%.*]] = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> [[PREDPHI]])
375; VEC-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
376; VEC-NEXT:    [[TMP12:%.*]] = xor i1 [[CMP_N]], true
377; VEC-NEXT:    call void @llvm.assume(i1 [[TMP12]])
378; VEC-NEXT:    br label [[SCALAR_PH]]
379; VEC:       scalar.ph:
380; VEC-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ undef, [[ENTRY:%.*]] ]
381; VEC-NEXT:    [[BC_MERGE_RDX:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[TMP11]], [[MIDDLE_BLOCK]] ]
382; VEC-NEXT:    br label [[FOR_BODY14:%.*]]
383; VEC:       for.body14:
384; VEC-NEXT:    [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
385; VEC-NEXT:    [[INEWCHUNKS_120:%.*]] = phi i32 [ [[INEWCHUNKS_2:%.*]], [[FOR_INC23]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ]
386; VEC-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 [[INDVARS_IV3]]
387; VEC-NEXT:    [[TMP:%.*]] = load i32, i32* [[ARRAYIDX16]], align 4
388; VEC-NEXT:    br i1 undef, label [[IF_THEN18:%.*]], label [[FOR_INC23]]
389; VEC:       if.then18:
390; VEC-NEXT:    store i32 2, i32* [[ARRAYIDX16]], align 4
391; VEC-NEXT:    [[INC21:%.*]] = add nsw i32 [[INEWCHUNKS_120]], 1
392; VEC-NEXT:    br label [[FOR_INC23]]
393; VEC:       for.inc23:
394; VEC-NEXT:    [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
395; VEC-NEXT:    [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
396; VEC-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
397; VEC-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
398; VEC-NEXT:    call void @llvm.assume(i1 [[CMP13]])
399; VEC-NEXT:    br label [[FOR_BODY14]]
400;
401entry:
402  br label %for.body9
403
404for.body9:
405  br i1 %cond, label %for.inc26, label %for.body14
406
407for.body14:
408  %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ undef, %for.body9 ]
409  %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ undef, %for.body9 ]
410  %arrayidx16 = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 %indvars.iv3
411  %tmp = load i32, i32* %arrayidx16, align 4
412  br i1 undef, label %if.then18, label %for.inc23
413
414if.then18:
415  store i32 2, i32* %arrayidx16, align 4
416  %inc21 = add nsw i32 %iNewChunks.120, 1
417  br label %for.inc23
418
419for.inc23:
420  %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ]
421  %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1
422  %tmp1 = trunc i64 %indvars.iv3 to i32
423  %cmp13 = icmp slt i32 %tmp1, 0
424  br i1 %cmp13, label %for.body14, label %for.inc26
425
426for.inc26:
427  %iNewChunks.1.lcssa = phi i32 [ undef, %for.body9 ], [ %iNewChunks.2, %for.inc23 ]
428  unreachable
429}
430
431; In the test below, it's more profitable for the expression feeding the
432; conditional store to remain scalar. Since we can only type-shrink vector
433; types, we shouldn't try to represent the expression in a smaller type.
434;
435define void @minimal_bit_widths(i1 %c) {
436; UNROLL-LABEL: @minimal_bit_widths(
437; UNROLL-NEXT:  entry:
438; UNROLL-NEXT:    br label [[VECTOR_BODY:%.*]]
439; UNROLL:       vector.body:
440; UNROLL-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ]
441; UNROLL-NEXT:    [[OFFSET_IDX:%.*]] = sub i64 undef, [[INDEX]]
442; UNROLL-NEXT:    [[INDUCTION3:%.*]] = add i64 [[OFFSET_IDX]], 0
443; UNROLL-NEXT:    [[INDUCTION4:%.*]] = add i64 [[OFFSET_IDX]], -1
444; UNROLL-NEXT:    br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE6]]
445; UNROLL:       pred.store.if:
446; UNROLL-NEXT:    [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
447; UNROLL-NEXT:    [[TMP0:%.*]] = getelementptr i8, i8* undef, i64 [[INDUCTION]]
448; UNROLL-NEXT:    [[TMP1:%.*]] = load i8, i8* [[TMP0]], align 1
449; UNROLL-NEXT:    [[TMP2:%.*]] = zext i8 [[TMP1]] to i32
450; UNROLL-NEXT:    [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
451; UNROLL-NEXT:    store i8 [[TMP3]], i8* [[TMP0]], align 1
452; UNROLL-NEXT:    [[INDUCTION2:%.*]] = add i64 [[INDEX]], 1
453; UNROLL-NEXT:    [[TMP4:%.*]] = getelementptr i8, i8* undef, i64 [[INDUCTION2]]
454; UNROLL-NEXT:    [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1
455; UNROLL-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
456; UNROLL-NEXT:    [[TMP7:%.*]] = trunc i32 [[TMP6]] to i8
457; UNROLL-NEXT:    store i8 [[TMP7]], i8* [[TMP4]], align 1
458; UNROLL-NEXT:    br label [[PRED_STORE_CONTINUE6]]
459; UNROLL:       pred.store.continue6:
460; UNROLL-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
461; UNROLL-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], undef
462; UNROLL-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
463; UNROLL:       middle.block:
464; UNROLL-NEXT:    [[CMP_N:%.*]] = icmp eq i64 undef, undef
465; UNROLL-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
466; UNROLL:       for.body:
467; UNROLL-NEXT:    [[TMP0:%.*]] = phi i64 [ [[TMP6:%.*]], [[FOR_INC:%.*]] ], [ undef, [[MIDDLE_BLOCK]] ]
468; UNROLL-NEXT:    [[TMP1:%.*]] = phi i64 [ [[TMP7:%.*]], [[FOR_INC]] ], [ undef, [[MIDDLE_BLOCK]] ]
469; UNROLL-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* undef, i64 [[TMP0]]
470; UNROLL-NEXT:    [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 1
471; UNROLL-NEXT:    br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]]
472; UNROLL:       if.then:
473; UNROLL-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
474; UNROLL-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
475; UNROLL-NEXT:    store i8 [[TMP5]], i8* [[TMP2]], align 1
476; UNROLL-NEXT:    br label [[FOR_INC]]
477; UNROLL:       for.inc:
478; UNROLL-NEXT:    [[TMP6]] = add nuw nsw i64 [[TMP0]], 1
479; UNROLL-NEXT:    [[TMP7]] = add i64 [[TMP1]], -1
480; UNROLL-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0
481; UNROLL-NEXT:    br i1 [[TMP8]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
482; UNROLL:       for.end:
483; UNROLL-NEXT:    ret void
484;
485; UNROLL-NOSIMPLIFY-LABEL: @minimal_bit_widths(
486; UNROLL-NOSIMPLIFY-NEXT:  entry:
487; UNROLL-NOSIMPLIFY-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
488; UNROLL-NOSIMPLIFY:       vector.ph:
489; UNROLL-NOSIMPLIFY-NEXT:    br label [[VECTOR_BODY:%.*]]
490; UNROLL-NOSIMPLIFY:       vector.body:
491; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ]
492; UNROLL-NOSIMPLIFY-NEXT:    [[OFFSET_IDX:%.*]] = sub i64 undef, [[INDEX]]
493; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION3:%.*]] = add i64 [[OFFSET_IDX]], 0
494; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION4:%.*]] = add i64 [[OFFSET_IDX]], -1
495; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
496; UNROLL-NOSIMPLIFY:       pred.store.if:
497; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
498; UNROLL-NOSIMPLIFY-NEXT:    [[TMP0:%.*]] = getelementptr i8, i8* undef, i64 [[INDUCTION]]
499; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = load i8, i8* [[TMP0]], align 1
500; UNROLL-NOSIMPLIFY-NEXT:    [[TMP2:%.*]] = zext i8 [[TMP1]] to i32
501; UNROLL-NOSIMPLIFY-NEXT:    [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
502; UNROLL-NOSIMPLIFY-NEXT:    store i8 [[TMP3]], i8* [[TMP0]], align 1
503; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE]]
504; UNROLL-NOSIMPLIFY:       pred.store.continue:
505; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[C]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]]
506; UNROLL-NOSIMPLIFY:       pred.store.if5:
507; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION2:%.*]] = add i64 [[INDEX]], 1
508; UNROLL-NOSIMPLIFY-NEXT:    [[TMP4:%.*]] = getelementptr i8, i8* undef, i64 [[INDUCTION2]]
509; UNROLL-NOSIMPLIFY-NEXT:    [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 1
510; UNROLL-NOSIMPLIFY-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
511; UNROLL-NOSIMPLIFY-NEXT:    [[TMP7:%.*]] = trunc i32 [[TMP6]] to i8
512; UNROLL-NOSIMPLIFY-NEXT:    store i8 [[TMP7]], i8* [[TMP4]], align 1
513; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE6]]
514; UNROLL-NOSIMPLIFY:       pred.store.continue6:
515; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
516; UNROLL-NOSIMPLIFY-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], undef
517; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
518; UNROLL-NOSIMPLIFY:       middle.block:
519; UNROLL-NOSIMPLIFY-NEXT:    [[CMP_N:%.*]] = icmp eq i64 undef, undef
520; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
521; UNROLL-NOSIMPLIFY:       scalar.ph:
522; UNROLL-NOSIMPLIFY-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ undef, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
523; UNROLL-NOSIMPLIFY-NEXT:    [[BC_RESUME_VAL1:%.*]] = phi i64 [ undef, [[MIDDLE_BLOCK]] ], [ undef, [[ENTRY]] ]
524; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_BODY:%.*]]
525; UNROLL-NOSIMPLIFY:       for.body:
526; UNROLL-NOSIMPLIFY-NEXT:    [[TMP0:%.*]] = phi i64 [ [[TMP6:%.*]], [[FOR_INC:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
527; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = phi i64 [ [[TMP7:%.*]], [[FOR_INC]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ]
528; UNROLL-NOSIMPLIFY-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* undef, i64 [[TMP0]]
529; UNROLL-NOSIMPLIFY-NEXT:    [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 1
530; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]]
531; UNROLL-NOSIMPLIFY:       if.then:
532; UNROLL-NOSIMPLIFY-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
533; UNROLL-NOSIMPLIFY-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
534; UNROLL-NOSIMPLIFY-NEXT:    store i8 [[TMP5]], i8* [[TMP2]], align 1
535; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_INC]]
536; UNROLL-NOSIMPLIFY:       for.inc:
537; UNROLL-NOSIMPLIFY-NEXT:    [[TMP6]] = add nuw nsw i64 [[TMP0]], 1
538; UNROLL-NOSIMPLIFY-NEXT:    [[TMP7]] = add i64 [[TMP1]], -1
539; UNROLL-NOSIMPLIFY-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0
540; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP8]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
541; UNROLL-NOSIMPLIFY:       for.end:
542; UNROLL-NOSIMPLIFY-NEXT:    ret void
543;
544; VEC-LABEL: @minimal_bit_widths(
545; VEC-NEXT:  entry:
546; VEC-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i1> poison, i1 [[C:%.*]], i32 0
547; VEC-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i1> [[BROADCAST_SPLATINSERT]], <2 x i1> poison, <2 x i32> zeroinitializer
548; VEC-NEXT:    br label [[VECTOR_BODY:%.*]]
549; VEC:       vector.body:
550; VEC-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE3:%.*]] ]
551; VEC-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
552; VEC-NEXT:    [[OFFSET_IDX:%.*]] = sub i64 undef, [[INDEX]]
553; VEC-NEXT:    [[TMP1:%.*]] = add i64 [[OFFSET_IDX]], 0
554; VEC-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* undef, i64 [[TMP0]]
555; VEC-NEXT:    [[TMP3:%.*]] = getelementptr i8, i8* [[TMP2]], i32 0
556; VEC-NEXT:    [[TMP4:%.*]] = bitcast i8* [[TMP3]] to <2 x i8>*
557; VEC-NEXT:    [[WIDE_LOAD:%.*]] = load <2 x i8>, <2 x i8>* [[TMP4]], align 1
558; VEC-NEXT:    [[TMP5:%.*]] = extractelement <2 x i1> [[BROADCAST_SPLAT]], i32 0
559; VEC-NEXT:    br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
560; VEC:       pred.store.if:
561; VEC-NEXT:    [[TMP6:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 0
562; VEC-NEXT:    [[TMP7:%.*]] = zext i8 [[TMP6]] to i32
563; VEC-NEXT:    [[TMP8:%.*]] = trunc i32 [[TMP7]] to i8
564; VEC-NEXT:    [[TMP9:%.*]] = getelementptr i8, i8* undef, i64 [[TMP0]]
565; VEC-NEXT:    store i8 [[TMP8]], i8* [[TMP9]], align 1
566; VEC-NEXT:    br label [[PRED_STORE_CONTINUE]]
567; VEC:       pred.store.continue:
568; VEC-NEXT:    [[TMP10:%.*]] = extractelement <2 x i1> [[BROADCAST_SPLAT]], i32 1
569; VEC-NEXT:    br i1 [[TMP10]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3]]
570; VEC:       pred.store.if2:
571; VEC-NEXT:    [[TMP11:%.*]] = add i64 [[INDEX]], 1
572; VEC-NEXT:    [[TMP12:%.*]] = extractelement <2 x i8> [[WIDE_LOAD]], i32 1
573; VEC-NEXT:    [[TMP13:%.*]] = zext i8 [[TMP12]] to i32
574; VEC-NEXT:    [[TMP14:%.*]] = trunc i32 [[TMP13]] to i8
575; VEC-NEXT:    [[TMP15:%.*]] = getelementptr i8, i8* undef, i64 [[TMP11]]
576; VEC-NEXT:    store i8 [[TMP14]], i8* [[TMP15]], align 1
577; VEC-NEXT:    br label [[PRED_STORE_CONTINUE3]]
578; VEC:       pred.store.continue3:
579; VEC-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
580; VEC-NEXT:    [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], undef
581; VEC-NEXT:    br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
582; VEC:       middle.block:
583; VEC-NEXT:    [[CMP_N:%.*]] = icmp eq i64 undef, undef
584; VEC-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
585; VEC:       for.body:
586; VEC-NEXT:    [[TMP0:%.*]] = phi i64 [ [[TMP6:%.*]], [[FOR_INC:%.*]] ], [ undef, [[MIDDLE_BLOCK]] ]
587; VEC-NEXT:    [[TMP1:%.*]] = phi i64 [ [[TMP7:%.*]], [[FOR_INC]] ], [ undef, [[MIDDLE_BLOCK]] ]
588; VEC-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* undef, i64 [[TMP0]]
589; VEC-NEXT:    [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 1
590; VEC-NEXT:    br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]]
591; VEC:       if.then:
592; VEC-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
593; VEC-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
594; VEC-NEXT:    store i8 [[TMP5]], i8* [[TMP2]], align 1
595; VEC-NEXT:    br label [[FOR_INC]]
596; VEC:       for.inc:
597; VEC-NEXT:    [[TMP6]] = add nuw nsw i64 [[TMP0]], 1
598; VEC-NEXT:    [[TMP7]] = add i64 [[TMP1]], -1
599; VEC-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0
600; VEC-NEXT:    br i1 [[TMP8]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
601; VEC:       for.end:
602; VEC-NEXT:    ret void
603;
604entry:
605  br label %for.body
606
607for.body:
608  %tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ]
609  %tmp1 = phi i64 [ %tmp7, %for.inc ], [ undef, %entry ]
610  %tmp2 = getelementptr i8, i8* undef, i64 %tmp0
611  %tmp3 = load i8, i8* %tmp2, align 1
612  br i1 %c, label %if.then, label %for.inc
613
614if.then:
615  %tmp4 = zext i8 %tmp3 to i32
616  %tmp5 = trunc i32 %tmp4 to i8
617  store i8 %tmp5, i8* %tmp2, align 1
618  br label %for.inc
619
620for.inc:
621  %tmp6 = add nuw nsw i64 %tmp0, 1
622  %tmp7 = add i64 %tmp1, -1
623  %tmp8 = icmp eq i64 %tmp7, 0
624  br i1 %tmp8, label %for.end, label %for.body
625
626for.end:
627  ret void
628}
629
630define void @minimal_bit_widths_with_aliasing_store(i1 %c, i8* %ptr) {
631; UNROLL-LABEL: @minimal_bit_widths_with_aliasing_store(
632; UNROLL-NEXT:  entry:
633; UNROLL-NEXT:    br label [[FOR_BODY:%.*]]
634; UNROLL:       for.body:
635; UNROLL-NEXT:    [[TMP0:%.*]] = phi i64 [ [[TMP6:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
636; UNROLL-NEXT:    [[TMP1:%.*]] = phi i64 [ [[TMP7:%.*]], [[FOR_INC]] ], [ 0, [[ENTRY]] ]
637; UNROLL-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* [[PTR:%.*]], i64 [[TMP0]]
638; UNROLL-NEXT:    [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 1
639; UNROLL-NEXT:    store i8 0, i8* [[TMP2]], align 1
640; UNROLL-NEXT:    br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[FOR_INC]]
641; UNROLL:       if.then:
642; UNROLL-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
643; UNROLL-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
644; UNROLL-NEXT:    store i8 [[TMP5]], i8* [[TMP2]], align 1
645; UNROLL-NEXT:    br label [[FOR_INC]]
646; UNROLL:       for.inc:
647; UNROLL-NEXT:    [[TMP6]] = add nuw nsw i64 [[TMP0]], 1
648; UNROLL-NEXT:    [[TMP7]] = add i64 [[TMP1]], -1
649; UNROLL-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0
650; UNROLL-NEXT:    br i1 [[TMP8]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
651; UNROLL:       for.end:
652; UNROLL-NEXT:    ret void
653;
654; UNROLL-NOSIMPLIFY-LABEL: @minimal_bit_widths_with_aliasing_store(
655; UNROLL-NOSIMPLIFY-NEXT:  entry:
656; UNROLL-NOSIMPLIFY-NEXT:    br i1 true, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
657; UNROLL-NOSIMPLIFY:       vector.ph:
658; UNROLL-NOSIMPLIFY-NEXT:    br label [[VECTOR_BODY:%.*]]
659; UNROLL-NOSIMPLIFY:       vector.body:
660; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ]
661; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
662; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION2:%.*]] = add i64 [[INDEX]], 1
663; UNROLL-NOSIMPLIFY-NEXT:    [[OFFSET_IDX:%.*]] = sub i64 0, [[INDEX]]
664; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION3:%.*]] = add i64 [[OFFSET_IDX]], 0
665; UNROLL-NOSIMPLIFY-NEXT:    [[INDUCTION4:%.*]] = add i64 [[OFFSET_IDX]], -1
666; UNROLL-NOSIMPLIFY-NEXT:    [[TMP0:%.*]] = getelementptr i8, i8* [[PTR:%.*]], i64 [[INDUCTION]]
667; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = getelementptr i8, i8* [[PTR]], i64 [[INDUCTION2]]
668; UNROLL-NOSIMPLIFY-NEXT:    store i8 0, i8* [[TMP0]], align 1
669; UNROLL-NOSIMPLIFY-NEXT:    store i8 0, i8* [[TMP1]], align 1
670; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[C:%.*]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
671; UNROLL-NOSIMPLIFY:       pred.store.if:
672; UNROLL-NOSIMPLIFY-NEXT:    [[TMP2:%.*]] = load i8, i8* [[TMP0]], align 1
673; UNROLL-NOSIMPLIFY-NEXT:    [[TMP3:%.*]] = zext i8 [[TMP2]] to i32
674; UNROLL-NOSIMPLIFY-NEXT:    [[TMP4:%.*]] = trunc i32 [[TMP3]] to i8
675; UNROLL-NOSIMPLIFY-NEXT:    store i8 [[TMP4]], i8* [[TMP0]], align 1
676; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE]]
677; UNROLL-NOSIMPLIFY:       pred.store.continue:
678; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[C]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]]
679; UNROLL-NOSIMPLIFY:       pred.store.if5:
680; UNROLL-NOSIMPLIFY-NEXT:    [[TMP5:%.*]] = load i8, i8* [[TMP1]], align 1
681; UNROLL-NOSIMPLIFY-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
682; UNROLL-NOSIMPLIFY-NEXT:    [[TMP7:%.*]] = trunc i32 [[TMP6]] to i8
683; UNROLL-NOSIMPLIFY-NEXT:    store i8 [[TMP7]], i8* [[TMP1]], align 1
684; UNROLL-NOSIMPLIFY-NEXT:    br label [[PRED_STORE_CONTINUE6]]
685; UNROLL-NOSIMPLIFY:       pred.store.continue6:
686; UNROLL-NOSIMPLIFY-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
687; UNROLL-NOSIMPLIFY-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 0
688; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
689; UNROLL-NOSIMPLIFY:       middle.block:
690; UNROLL-NOSIMPLIFY-NEXT:    [[CMP_N:%.*]] = icmp eq i64 0, 0
691; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
692; UNROLL-NOSIMPLIFY:       scalar.ph:
693; UNROLL-NOSIMPLIFY-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
694; UNROLL-NOSIMPLIFY-NEXT:    [[BC_RESUME_VAL1:%.*]] = phi i64 [ 0, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]
695; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_BODY:%.*]]
696; UNROLL-NOSIMPLIFY:       for.body:
697; UNROLL-NOSIMPLIFY-NEXT:    [[TMP0:%.*]] = phi i64 [ [[TMP6:%.*]], [[FOR_INC:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
698; UNROLL-NOSIMPLIFY-NEXT:    [[TMP1:%.*]] = phi i64 [ [[TMP7:%.*]], [[FOR_INC]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ]
699; UNROLL-NOSIMPLIFY-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* [[PTR]], i64 [[TMP0]]
700; UNROLL-NOSIMPLIFY-NEXT:    [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 1
701; UNROLL-NOSIMPLIFY-NEXT:    store i8 0, i8* [[TMP2]], align 1
702; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]]
703; UNROLL-NOSIMPLIFY:       if.then:
704; UNROLL-NOSIMPLIFY-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
705; UNROLL-NOSIMPLIFY-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
706; UNROLL-NOSIMPLIFY-NEXT:    store i8 [[TMP5]], i8* [[TMP2]], align 1
707; UNROLL-NOSIMPLIFY-NEXT:    br label [[FOR_INC]]
708; UNROLL-NOSIMPLIFY:       for.inc:
709; UNROLL-NOSIMPLIFY-NEXT:    [[TMP6]] = add nuw nsw i64 [[TMP0]], 1
710; UNROLL-NOSIMPLIFY-NEXT:    [[TMP7]] = add i64 [[TMP1]], -1
711; UNROLL-NOSIMPLIFY-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0
712; UNROLL-NOSIMPLIFY-NEXT:    br i1 [[TMP8]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
713; UNROLL-NOSIMPLIFY:       for.end:
714; UNROLL-NOSIMPLIFY-NEXT:    ret void
715;
716; VEC-LABEL: @minimal_bit_widths_with_aliasing_store(
717; VEC-NEXT:  entry:
718; VEC-NEXT:    br label [[FOR_BODY:%.*]]
719; VEC:       for.body:
720; VEC-NEXT:    [[TMP0:%.*]] = phi i64 [ [[TMP6:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
721; VEC-NEXT:    [[TMP1:%.*]] = phi i64 [ [[TMP7:%.*]], [[FOR_INC]] ], [ 0, [[ENTRY]] ]
722; VEC-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* [[PTR:%.*]], i64 [[TMP0]]
723; VEC-NEXT:    [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 1
724; VEC-NEXT:    store i8 0, i8* [[TMP2]], align 1
725; VEC-NEXT:    br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[FOR_INC]]
726; VEC:       if.then:
727; VEC-NEXT:    [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
728; VEC-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
729; VEC-NEXT:    store i8 [[TMP5]], i8* [[TMP2]], align 1
730; VEC-NEXT:    br label [[FOR_INC]]
731; VEC:       for.inc:
732; VEC-NEXT:    [[TMP6]] = add nuw nsw i64 [[TMP0]], 1
733; VEC-NEXT:    [[TMP7]] = add i64 [[TMP1]], -1
734; VEC-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 0
735; VEC-NEXT:    br i1 [[TMP8]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
736; VEC:       for.end:
737; VEC-NEXT:    ret void
738;
739entry:
740  br label %for.body
741
742for.body:
743  %tmp0 = phi i64 [ %tmp6, %for.inc ], [ 0, %entry ]
744  %tmp1 = phi i64 [ %tmp7, %for.inc ], [ 0, %entry ]
745  %tmp2 = getelementptr i8, i8* %ptr, i64 %tmp0
746  %tmp3 = load i8, i8* %tmp2, align 1
747  store i8 0, i8* %tmp2
748  br i1 %c, label %if.then, label %for.inc
749
750if.then:
751  %tmp4 = zext i8 %tmp3 to i32
752  %tmp5 = trunc i32 %tmp4 to i8
753  store i8 %tmp5, i8* %tmp2, align 1
754  br label %for.inc
755
756for.inc:
757  %tmp6 = add nuw nsw i64 %tmp0, 1
758  %tmp7 = add i64 %tmp1, -1
759  %tmp8 = icmp eq i64 %tmp7, 0
760  br i1 %tmp8, label %for.end, label %for.body
761
762for.end:
763  ret void
764}
765