1; REQUIRES: asserts 2; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -instcombine -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s 3 4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" 5 6; CHECK-LABEL: more_than_one_use 7; 8; PR30627. Check that a compare instruction with more than one use is not 9; recognized as uniform and is vectorized. 10; 11; CHECK-NOT: Found uniform instruction: %cond = icmp slt i64 %i.next, %n 12; CHECK: vector.body 13; CHECK: %[[I:.+]] = add nuw nsw <4 x i64> %vec.ind, <i64 1, i64 1, i64 1, i64 1> 14; CHECK: icmp slt <4 x i64> %[[I]], %broadcast.splat 15; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body 16; 17define i32 @more_than_one_use(i32* %a, i64 %n) { 18entry: 19 br label %for.body 20 21for.body: 22 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ] 23 %r = phi i32 [ %tmp3, %for.body ], [ 0, %entry ] 24 %i.next = add nuw nsw i64 %i, 1 25 %cond = icmp slt i64 %i.next, %n 26 %tmp0 = select i1 %cond, i64 %i.next, i64 0 27 %tmp1 = getelementptr inbounds i32, i32* %a, i64 %tmp0 28 %tmp2 = load i32, i32* %tmp1, align 8 29 %tmp3 = add i32 %r, %tmp2 30 br i1 %cond, label %for.body, label %for.end 31 32for.end: 33 %tmp4 = phi i32 [ %tmp3, %for.body ] 34 ret i32 %tmp4 35} 36 37; Check for crash exposed by D76992. 38; CHECK: N0 [label = 39; CHECK-NEXT: "loop:\n" + 40; CHECK-NEXT: "WIDEN-INDUCTION %iv = phi 0, %iv.next\l" + 41; CHECK-NEXT: "WIDEN\l"" %cond0 = icmp %iv, 13\l" + 42; CHECK-NEXT: "WIDEN-SELECT ir<%s> = select ir<%cond0>, ir<10>, ir<20>\l" 43; CHECK-NEXT: ] 44define void @test() { 45entry: 46 br label %loop 47 48loop: ; preds = %loop, %entry 49 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] 50 %cond0 = icmp ult i64 %iv, 13 51 %s = select i1 %cond0, i32 10, i32 20 52 %iv.next = add nuw nsw i64 %iv, 1 53 %exitcond = icmp eq i64 %iv.next, 14 54 br i1 %exitcond, label %exit, label %loop 55 56exit: ; preds = %loop 57 ret void 58} 59