1; REQUIRES: asserts
2; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -instcombine -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s
3
4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
5
6; CHECK-LABEL: more_than_one_use
7;
8; PR30627. Check that a compare instruction with more than one use is not
9; recognized as uniform and is vectorized.
10;
11; CHECK-NOT: Found uniform instruction: %cond = icmp slt i64 %i.next, %n
12; CHECK:     vector.body
13; CHECK:       %[[I:.+]] = add nuw nsw <4 x i64> %vec.ind, <i64 1, i64 1, i64 1, i64 1>
14; CHECK:       icmp slt <4 x i64> %[[I]], %broadcast.splat
15; CHECK:       br i1 {{.*}}, label %middle.block, label %vector.body
16;
17define i32 @more_than_one_use(i32* %a, i64 %n) {
18entry:
19  br label %for.body
20
21for.body:
22  %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
23  %r = phi i32 [ %tmp3, %for.body ], [ 0, %entry ]
24  %i.next = add nuw nsw i64 %i, 1
25  %cond = icmp slt i64 %i.next, %n
26  %tmp0 = select i1 %cond, i64 %i.next, i64 0
27  %tmp1 = getelementptr inbounds i32, i32* %a, i64 %tmp0
28  %tmp2 = load i32, i32* %tmp1, align 8
29  %tmp3 = add i32 %r, %tmp2
30  br i1 %cond, label %for.body, label %for.end
31
32for.end:
33  %tmp4 = phi i32 [ %tmp3, %for.body ]
34  ret i32 %tmp4
35}
36