1; REQUIRES: asserts
2; RUN: opt < %s -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -disable-output -debug-only=loop-vectorize 2>&1 | FileCheck %s
3
4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
5
6; Test cases for PR50009, which require sinking a replicate-region due to a
7; first-order recurrence.
8
9define void @sink_replicate_region_1(i32 %x, i8* %ptr) optsize {
10; CHECK-LABEL: sink_replicate_region_1
11; CHECK:      VPlan 'Initial VPlan for VF={2},UF>=1' {
12; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
13; CHECK-EMPTY:
14; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
15; CHECK-EMPTY:
16; CHECK-NEXT: vector.ph:
17; CHECK-NEXT: Successor(s): vector loop
18; CHECK-EMPTY:
19; CHECK-NEXT: <x1> vector loop: {
20; CHECK-NEXT: vector.body:
21; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
22; CHECK-NEXT:   FIRST-ORDER-RECURRENCE-PHI ir<%0> = phi ir<0>, ir<%conv>
23; CHECK-NEXT:   WIDEN-INDUCTION %iv = phi 0, %iv.next, ir<1>
24; CHECK-NEXT:   vp<[[STEPS:%.]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
25; CHECK-NEXT:   EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv> vp<[[BTC]]>
26; CHECK-NEXT: Successor(s): loop.0
27; CHECK-EMPTY:
28; CHECK-NEXT: loop.0:
29; CHECK-NEXT: Successor(s): pred.load
30; CHECK-EMPTY:
31; CHECK-NEXT: <xVFxUF> pred.load: {
32; CHECK-NEXT:   pred.load.entry:
33; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
34; CHECK-NEXT:   Successor(s): pred.load.if, pred.load.continue
35; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
36; CHECK-EMPTY:
37; CHECK-NEXT:   pred.load.if:
38; CHECK-NEXT:     REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>
39; CHECK-NEXT:     REPLICATE ir<%lv> = load ir<%gep> (S->V)
40; CHECK-NEXT:   Successor(s): pred.load.continue
41; CHECK-EMPTY:
42; CHECK-NEXT:   pred.load.continue:
43; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED1:%.+]]> = ir<%lv>
44; CHECK-NEXT:   No successors
45; CHECK-NEXT: }
46; CHECK-NEXT: Successor(s): loop.1
47; CHECK-EMPTY:
48; CHECK-NEXT: loop.1:
49; CHECK-NEXT:   WIDEN ir<%conv> = sext vp<[[PRED1]]>
50; CHECK-NEXT:   EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%0> ir<%conv>
51; CHECK-NEXT: Successor(s): pred.srem
52; CHECK-EMPTY:
53; CHECK-NEXT: <xVFxUF> pred.srem: {
54; CHECK-NEXT:   pred.srem.entry:
55; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
56; CHECK-NEXT:   Successor(s): pred.srem.if, pred.srem.continue
57; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
58; CHECK-EMPTY:
59; CHECK-NEXT:   pred.srem.if:
60; CHECK-NEXT:     REPLICATE ir<%rem> = srem vp<[[SPLICE]]>, ir<%x> (S->V)
61; CHECK-NEXT:   Successor(s): pred.srem.continue
62; CHECK-EMPTY:
63; CHECK-NEXT:   pred.srem.continue:
64; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED2:%.+]]> = ir<%rem>
65; CHECK-NEXT:   No successors
66; CHECK-NEXT: }
67; CHECK-NEXT: Successor(s): loop.1.split
68; CHECK-EMPTY:
69; CHECK-NEXT: loop.1.split:
70; CHECK-NEXT:   WIDEN ir<%add> = add ir<%conv>, vp<[[PRED2]]>
71; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF + vp<[[CAN_IV]]>
72; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
73; CHECK-NEXT: No successors
74; CHECK-NEXT: }
75; CHECK-NEXT: Successor(s): middle.block
76; CHECK-EMPTY:
77; CHECK-NEXT: middle.block:
78; CHECK-NEXT: No successors
79; CHECK-NEXT: }
80;
81entry:
82  br label %loop
83
84loop:
85  %0 = phi i32 [ 0, %entry ], [ %conv, %loop ]
86  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
87  %rem = srem i32 %0, %x
88  %gep = getelementptr i8, i8* %ptr, i32 %iv
89  %lv = load i8, i8* %gep
90  %conv = sext i8 %lv to i32
91  %add = add i32 %conv, %rem
92  %iv.next = add nsw i32 %iv, 1
93  %ec = icmp eq i32 %iv.next, 20001
94  br i1 %ec, label %exit, label %loop
95
96exit:
97  ret void
98}
99
100define void @sink_replicate_region_2(i32 %x, i8 %y, i32* %ptr) optsize {
101; CHECK-LABEL: sink_replicate_region_2
102; CHECK:      VPlan 'Initial VPlan for VF={2},UF>=1' {
103; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
104; CHECK-EMPTY:
105; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
106; CHECK-EMPTY:
107; CHECK-NEXT: vector.ph:
108; CHECK-NEXT: Successor(s): vector loop
109; CHECK-EMPTY:
110; CHECK-NEXT: <x1> vector loop: {
111; CHECK-NEXT: vector.body:
112; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
113; CHECK-NEXT:   FIRST-ORDER-RECURRENCE-PHI ir<%recur> = phi ir<0>, ir<%recur.next>
114; CHECK-NEXT:   WIDEN-INDUCTION %iv = phi 0, %iv.next, ir<1>
115; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
116; CHECK-NEXT:   EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv> vp<[[BTC]]>
117; CHECK-NEXT: Successor(s): loop.0
118; CHECK-EMPTY:
119; CHECK-NEXT: loop.0:
120; CHECK-NEXT:   WIDEN ir<%recur.next> = sext ir<%y>
121; CHECK-NEXT:   EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%recur> ir<%recur.next>
122; CHECK-NEXT: Successor(s): loop.0.split
123; CHECK-EMPTY:
124; CHECK-NEXT: loop.0.split:
125; CHECK-NEXT:   Successor(s): pred.store
126; CHECK-EMPTY:
127; CHECK-NEXT: <xVFxUF> pred.store: {
128; CHECK-NEXT:  pred.store.entry:
129; CHECK-NEXT:    BRANCH-ON-MASK vp<[[MASK]]>
130; CHECK-NEXT:  Successor(s): pred.store.if, pred.store.continue
131; CHECK-NEXT:  CondBit: vp<[[MASK]]> (vector.body)
132; CHECK-EMPTY:
133; CHECK-NEXT:  pred.store.if:
134; CHECK-NEXT:     REPLICATE ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>
135; CHECK-NEXT:     REPLICATE ir<%add> = add ir<%rem>, ir<%recur.next>
136; CHECK-NEXT:     REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>
137; CHECK-NEXT:     REPLICATE store ir<%add>, ir<%gep>
138; CHECK-NEXT:   Successor(s): pred.store.continue
139; CHECK-EMPTY:
140; CHECK-NEXT:   pred.store.continue:
141; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%rem>
142; CHECK-NEXT:   No successors
143; CHECK-NEXT: }
144; CHECK-NEXT: Successor(s): loop.1
145; CHECK-EMPTY:
146; CHECK-NEXT: loop.1:
147; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF + vp<[[CAN_IV]]>
148; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
149; CHECK-NEXT: No successors
150; CHECK-NEXT: }
151; CHECK-NEXT: Successor(s): middle.block
152; CHECK-EMPTY:
153; CHECK-NEXT: middle.block:
154; CHECK-NEXT: No successors
155; CHECK-NEXT: }
156;
157entry:
158  br label %loop
159
160loop:
161  %recur = phi i32 [ 0, %entry ], [ %recur.next, %loop ]
162  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
163  %rem = srem i32 %recur, %x
164  %recur.next = sext i8 %y to i32
165  %add = add i32 %rem, %recur.next
166  %gep = getelementptr i32, i32* %ptr, i32 %iv
167  store i32 %add, i32* %gep
168  %iv.next = add nsw i32 %iv, 1
169  %ec = icmp eq i32 %iv.next, 20001
170  br i1 %ec, label %exit, label %loop
171
172exit:
173  ret void
174}
175
176define i32 @sink_replicate_region_3_reduction(i32 %x, i8 %y, i32* %ptr) optsize {
177; CHECK-LABEL: sink_replicate_region_3_reduction
178; CHECK:      VPlan 'Initial VPlan for VF={2},UF>=1' {
179; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
180; CHECK-EMPTY:
181; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
182; CHECK-EMPTY:
183; CHECK-NEXT: vector.ph:
184; CHECK-NEXT: Successor(s): vector loop
185; CHECK-EMPTY:
186; CHECK-NEXT: <x1> vector loop: {
187; CHECK-NEXT: vector.body:
188; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
189; CHECK-NEXT:   FIRST-ORDER-RECURRENCE-PHI ir<%recur> = phi ir<0>, ir<%recur.next>
190; CHECK-NEXT:   WIDEN-REDUCTION-PHI ir<%and.red> = phi ir<1234>, ir<%and.red.next>
191; CHECK-NEXT:   EMIT vp<[[WIDEN_CAN:%.+]]> = WIDEN-CANONICAL-INDUCTION vp<[[CAN_IV]]>
192; CHECK-NEXT:   EMIT vp<[[MASK:%.+]]> = icmp ule vp<[[WIDEN_CAN]]> vp<[[BTC]]>
193; CHECK-NEXT: Successor(s): loop.0
194; CHECK-EMPTY:
195; CHECK-NEXT: loop.0:
196; CHECK-NEXT:   WIDEN ir<%recur.next> = sext ir<%y>
197; CHECK-NEXT:   EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%recur> ir<%recur.next>
198; CHECK-NEXT: Successor(s): pred.srem
199; CHECK-EMPTY:
200; CHECK-NEXT: <xVFxUF> pred.srem: {
201; CHECK-NEXT:   pred.srem.entry:
202; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
203; CHECK-NEXT:   Successor(s): pred.srem.if, pred.srem.continue
204; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
205; CHECK-EMPTY:
206; CHECK-NEXT:   pred.srem.if:
207; CHECK-NEXT:     REPLICATE ir<%rem> = srem vp<[[SPLICE]]>, ir<%x> (S->V)
208; CHECK-NEXT:   Successor(s): pred.srem.continue
209; CHECK-EMPTY:
210; CHECK-NEXT:   pred.srem.continue:
211; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%rem>
212; CHECK-NEXT:   No successors
213; CHECK-NEXT: }
214; CHECK-NEXT: Successor(s): loop.0.split
215; CHECK-EMPTY:
216; CHECK-NEXT: loop.0.split:
217; CHECK-NEXT:   WIDEN ir<%add> = add vp<[[PRED]]>, ir<%recur.next>
218; CHECK-NEXT:   WIDEN ir<%and.red.next> = and ir<%and.red>, ir<%add>
219; CHECK-NEXT:   EMIT vp<[[SEL:%.+]]> = select vp<[[MASK]]> ir<%and.red.next> ir<%and.red>
220; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF + vp<[[CAN_IV]]>
221; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
222; CHECK-NEXT: No successors
223; CHECK-NEXT: }
224; CHECK-NEXT: Successor(s): middle.block
225; CHECK-EMPTY:
226; CHECK-NEXT: middle.block:
227; CHECK-NEXT: No successors
228; CHECK-NEXT: }
229;
230entry:
231  br label %loop
232
233loop:
234  %recur = phi i32 [ 0, %entry ], [ %recur.next, %loop ]
235  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
236  %and.red = phi i32 [ 1234, %entry ], [ %and.red.next, %loop ]
237  %rem = srem i32 %recur, %x
238  %recur.next = sext i8 %y to i32
239  %add = add i32 %rem, %recur.next
240  %and.red.next = and i32 %and.red, %add
241  %iv.next = add nsw i32 %iv, 1
242  %ec = icmp eq i32 %iv.next, 20001
243  br i1 %ec, label %exit, label %loop
244
245exit:
246  %res = phi i32 [ %and.red.next, %loop ]
247  ret i32 %res
248}
249
250; To sink the replicate region containing %rem, we need to split the block
251; containing %conv at the end, because %conv is the last recipe in the block.
252define void @sink_replicate_region_4_requires_split_at_end_of_block(i32 %x, i8* %ptr) optsize {
253; CHECK-LABEL: sink_replicate_region_4_requires_split_at_end_of_block
254; CHECK:      VPlan 'Initial VPlan for VF={2},UF>=1' {
255; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
256; CHECK-EMPTY:
257; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
258; CHECK-EMPTY:
259; CHECK-NEXT: vector.ph:
260; CHECK-NEXT: Successor(s): vector loop
261; CHECK-EMPTY:
262; CHECK-NEXT: <x1> vector loop: {
263; CHECK-NEXT: vector.body:
264; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
265; CHECK-NEXT:   FIRST-ORDER-RECURRENCE-PHI ir<%0> = phi ir<0>, ir<%conv>
266; CHECK-NEXT:   WIDEN-INDUCTION %iv = phi 0, %iv.next, ir<1>
267; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
268; CHECK-NEXT:   EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv> vp<[[BTC]]>
269; CHECK-NEXT:   REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>
270; CHECK-NEXT: Successor(s): loop.0
271; CHECK-EMPTY:
272; CHECK-NEXT: loop.0:
273; CHECK-NEXT: Successor(s): pred.load
274; CHECK-EMPTY:
275; CHECK-NEXT: <xVFxUF> pred.load: {
276; CHECK-NEXT:   pred.load.entry:
277; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
278; CHECK-NEXT:   Successor(s): pred.load.if, pred.load.continue
279; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
280; CHECK-EMPTY:
281; CHECK-NEXT:   pred.load.if:
282; CHECK-NEXT:     REPLICATE ir<%lv> = load ir<%gep> (S->V)
283; CHECK-NEXT:   Successor(s): pred.load.continue
284; CHECK-EMPTY:
285; CHECK-NEXT:   pred.load.continue:
286; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%lv>
287; CHECK-NEXT:   No successors
288; CHECK-NEXT: }
289; CHECK-NEXT: Successor(s): loop.1
290; CHECK-EMPTY:
291; CHECK-NEXT: loop.1:
292; CHECK-NEXT:   WIDEN ir<%conv> = sext vp<[[PRED]]>
293; CHECK-NEXT:   EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%0> ir<%conv>
294; CHECK-NEXT: Successor(s): loop.1.split
295
296; CHECK:      loop.1.split:
297; CHECK-NEXT: Successor(s): pred.load
298
299; CHECK:      <xVFxUF> pred.load: {
300; CHECK-NEXT:   pred.load.entry:
301; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
302; CHECK-NEXT:   Successor(s): pred.load.if, pred.load.continue
303; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
304
305; CHECK:        pred.load.if:
306; CHECK-NEXT:     REPLICATE ir<%rem> = srem vp<[[SPLICE]]>, ir<%x> (S->V)
307; CHECK-NEXT:     REPLICATE ir<%lv.2> = load ir<%gep> (S->V)
308; CHECK-NEXT:   Successor(s): pred.load.continue
309
310; CHECK:        pred.load.continue:
311; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED1:%.+]]> = ir<%rem>
312; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED2:%.+]]> = ir<%lv.2>
313; CHECK-NEXT:   No successors
314; CHECK-NEXT: }
315
316; CHECK:      loop.2:
317; CHECK-NEXT:   WIDEN ir<%add.1> = add ir<%conv>, vp<[[PRED1]]>
318; CHECK-NEXT:   WIDEN ir<%conv.lv.2> = sext vp<[[PRED2]]>
319; CHECK-NEXT:   WIDEN ir<%add> = add ir<%add.1>, ir<%conv.lv.2>
320; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF + vp<[[CAN_IV]]>
321; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
322; CHECK-NEXT: No successors
323; CHECK-NEXT: }
324; CHECK-NEXT: Successor(s): middle.block
325; CHECK-EMPTY:
326; CHECK-NEXT: middle.block:
327; CHECK-NEXT: No successors
328; CHECK-NEXT: }
329;
330entry:
331  br label %loop
332
333loop:
334  %0 = phi i32 [ 0, %entry ], [ %conv, %loop ]
335  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
336  %gep = getelementptr i8, i8* %ptr, i32 %iv
337  %rem = srem i32 %0, %x
338  %lv = load i8, i8* %gep
339  %conv = sext i8 %lv to i32
340  %lv.2 = load i8, i8* %gep
341  %add.1 = add i32 %conv, %rem
342  %conv.lv.2 = sext i8 %lv.2 to i32
343  %add = add i32 %add.1, %conv.lv.2
344  %iv.next = add nsw i32 %iv, 1
345  %ec = icmp eq i32 %iv.next, 20001
346  br i1 %ec, label %exit, label %loop
347
348exit:
349  ret void
350}
351
352; Test case that requires sinking a recipe in a replicate region after another replicate region.
353define void @sink_replicate_region_after_replicate_region(i32* %ptr, i32 %x, i8 %y) optsize {
354; CHECK-LABEL: sink_replicate_region_after_replicate_region
355; CHECK:      VPlan 'Initial VPlan for VF={2},UF>=1' {
356; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
357; CHECK-EMPTY:
358; CHECK-NEXT: Live-in vp<[[BTC:%.+]]> = backedge-taken count
359; CHECK-EMPTY:
360; CHECK-NEXT: vector.ph:
361; CHECK-NEXT: Successor(s): vector loop
362; CHECK-EMPTY:
363; CHECK-NEXT: <x1> vector loop: {
364; CHECK-NEXT: vector.body:
365; CHECK-NEXT:   EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
366; CHECK-NEXT:   FIRST-ORDER-RECURRENCE-PHI ir<%recur> = phi ir<0>, ir<%recur.next>
367; CHECK-NEXT:   WIDEN-INDUCTION %iv = phi 0, %iv.next, ir<1>
368; CHECK-NEXT:   vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<0>, ir<1>
369; CHECK-NEXT:   EMIT vp<[[MASK:%.+]]> = icmp ule ir<%iv> vp<[[BTC]]>
370; CHECK-NEXT: Successor(s): loop.0
371; CHECK-EMPTY:
372; CHECK-NEXT: loop.0:
373; CHECK-NEXT: Successor(s): loop.1
374; CHECK-EMPTY:
375; CHECK-NEXT:  loop.1:
376; CHECK-NEXT:   WIDEN ir<%recur.next> = sext ir<%y>
377; CHECK-NEXT:   EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%recur> ir<%recur.next>
378; CHECK-NEXT: Successor(s): pred.srem
379; CHECK-EMPTY:
380; CHECK-NEXT: <xVFxUF> pred.srem: {
381; CHECK-NEXT:   pred.srem.entry:
382; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
383; CHECK-NEXT:   Successor(s): pred.srem.if, pred.srem.continue
384; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
385; CHECK-EMPTY:
386; CHECK-NEXT:   pred.srem.if:
387; CHECK-NEXT:     REPLICATE ir<%rem> = srem vp<[[SPLICE]]>, ir<%x>
388; CHECK-NEXT:   Successor(s): pred.srem.continue
389; CHECK-EMPTY:
390; CHECK-NEXT:   pred.srem.continue:
391; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED:%.+]]> = ir<%rem>
392; CHECK-NEXT:   No successors
393; CHECK-NEXT: }
394; CHECK-NEXT: Successor(s): loop.1.split
395; CHECK-EMPTY:
396; CHECK-NEXT: loop.1.split:
397; CHECK-NEXT: Successor(s): pred.store
398; CHECK-EMPTY:
399; CHECK-NEXT: <xVFxUF> pred.store: {
400; CHECK-NEXT:   pred.store.entry:
401; CHECK-NEXT:     BRANCH-ON-MASK vp<[[MASK]]>
402; CHECK-NEXT:   Successor(s): pred.store.if, pred.store.continue
403; CHECK-NEXT:   CondBit: vp<[[MASK]]> (vector.body)
404; CHECK-EMPTY:
405; CHECK-NEXT:   pred.store.if:
406; CHECK-NEXT:     REPLICATE ir<%rem.div> = sdiv ir<20>, vp<[[PRED]]>
407; CHECK-NEXT:     REPLICATE ir<%gep> = getelementptr ir<%ptr>, vp<[[STEPS]]>
408; CHECK-NEXT:     REPLICATE store ir<%rem.div>, ir<%gep>
409; CHECK-NEXT:   Successor(s): pred.store.continue
410; CHECK-EMPTY:
411; CHECK-NEXT:   pred.store.continue:
412; CHECK-NEXT:     PHI-PREDICATED-INSTRUCTION vp<[[PRED2:%.+]]> = ir<%rem.div>
413; CHECK-NEXT:   No successors
414; CHECK-NEXT: }
415; CHECK-NEXT: Successor(s): loop.2
416; CHECK-EMPTY:
417; CHECK-NEXT: loop.2:
418; CHECK-NEXT:   EMIT vp<[[CAN_IV_NEXT:%.+]]> = VF * UF + vp<[[CAN_IV]]>
419; CHECK-NEXT:   EMIT branch-on-count vp<[[CAN_IV_NEXT]]> vp<[[VEC_TC]]>
420; CHECK-NEXT: No successors
421; CHECK-NEXT: }
422; CHECK-NEXT: Successor(s): middle.block
423; CHECK-EMPTY:
424; CHECK-NEXT: middle.block:
425; CHECK-NEXT: No successors
426; CHECK-NEXT: }
427;
428entry:
429  br label %loop
430
431loop:                                             ; preds = %loop, %entry
432  %recur = phi i32 [ 0, %entry ], [ %recur.next, %loop ]
433  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
434  %rem = srem i32 %recur, %x
435  %rem.div = sdiv i32 20, %rem
436  %recur.next = sext i8 %y to i32
437  %gep = getelementptr i32, i32* %ptr, i32 %iv
438  store i32 %rem.div, i32* %gep
439  %iv.next = add nsw i32 %iv, 1
440  %C = icmp sgt i32 %iv.next, %recur.next
441  br i1 %C, label %exit, label %loop
442
443exit:                                             ; preds = %loop
444  ret void
445}
446