1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s 3 4 5@p = external local_unnamed_addr global [257 x i32], align 16 6@q = external local_unnamed_addr global [257 x i32], align 16 7 8; Test case for PR43398. 9 10define void @can_sink_after_store(i32 %x, i32* %ptr, i64 %tc) local_unnamed_addr #0 { 11; CHECK-LABEL: @can_sink_after_store( 12; CHECK-NEXT: entry: 13; CHECK-NEXT: br label [[PREHEADER:%.*]] 14; CHECK: preheader: 15; CHECK-NEXT: [[IDX_PHI_TRANS:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 16; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[IDX_PHI_TRANS]], align 4 17; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 18; CHECK: vector.ph: 19; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i32 0 20; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 21; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[DOTPRE]], i32 3 22; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 23; CHECK: vector.body: 24; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 25; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], [[VECTOR_BODY]] ] 26; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]] 27; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 0 28; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[TMP0]] 29; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 30; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 31; CHECK-NEXT: [[WIDE_LOAD]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 32; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[WIDE_LOAD]], <4 x i32> <i32 3, i32 4, i32 5, i32 6> 33; CHECK-NEXT: [[TMP5:%.*]] = add <4 x i32> [[TMP4]], [[BROADCAST_SPLAT]] 34; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i32> [[TMP5]], [[WIDE_LOAD]] 35; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[TMP0]] 36; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[TMP7]], i32 0 37; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[TMP8]] to <4 x i32>* 38; CHECK-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP9]], align 4 39; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 40; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1996 41; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 42; CHECK: middle.block: 43; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 1999, 1996 44; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 45; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 2 46; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 47; CHECK: scalar.ph: 48; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[DOTPRE]], [[PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] 49; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1997, [[MIDDLE_BLOCK]] ], [ 1, [[PREHEADER]] ] 50; CHECK-NEXT: br label [[FOR:%.*]] 51; CHECK: for: 52; CHECK-NEXT: [[SCALAR_RECUR:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[PRE_NEXT:%.*]], [[FOR]] ] 53; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR]] ] 54; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[SCALAR_RECUR]], [[X]] 55; CHECK-NEXT: [[IDX_1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[IV]] 56; CHECK-NEXT: [[PRE_NEXT]] = load i32, i32* [[IDX_1]], align 4 57; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[ADD_1]], [[PRE_NEXT]] 58; CHECK-NEXT: [[IDX_2:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[IV]] 59; CHECK-NEXT: store i32 [[ADD_2]], i32* [[IDX_2]], align 4 60; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 61; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 2000 62; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT]], label [[FOR]], [[LOOP2:!llvm.loop !.*]] 63; CHECK: exit: 64; CHECK-NEXT: ret void 65; 66 67entry: 68 br label %preheader 69 70preheader: 71 %idx.phi.trans = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 72 %.pre = load i32, i32* %idx.phi.trans, align 4 73 br label %for 74 75for: 76 %pre.phi = phi i32 [ %.pre, %preheader ], [ %pre.next, %for ] 77 %iv = phi i64 [ 1, %preheader ], [ %iv.next, %for ] 78 %add.1 = add i32 %pre.phi, %x 79 %idx.1 = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 %iv 80 %pre.next = load i32, i32* %idx.1, align 4 81 %add.2 = add i32 %add.1, %pre.next 82 %idx.2 = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 %iv 83 store i32 %add.2, i32* %idx.2, align 4 84 %iv.next = add nuw nsw i64 %iv, 1 85 %exitcond = icmp eq i64 %iv.next, 2000 86 br i1 %exitcond, label %exit, label %for 87 88exit: 89 ret void 90} 91 92; We can sink potential trapping instructions, as this will only delay the trap 93; and not introduce traps on additional paths. 94define void @sink_sdiv(i32 %x, i32* %ptr, i64 %tc) local_unnamed_addr #0 { 95; CHECK-LABEL: @sink_sdiv( 96; CHECK-NEXT: entry: 97; CHECK-NEXT: br label [[PREHEADER:%.*]] 98; CHECK: preheader: 99; CHECK-NEXT: [[IDX_PHI_TRANS:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 100; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[IDX_PHI_TRANS]], align 4 101; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 102; CHECK: vector.ph: 103; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[X:%.*]], i32 0 104; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 105; CHECK-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[DOTPRE]], i32 3 106; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 107; CHECK: vector.body: 108; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 109; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], [[VECTOR_BODY]] ] 110; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]] 111; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[OFFSET_IDX]], 0 112; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[TMP0]] 113; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 114; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 115; CHECK-NEXT: [[WIDE_LOAD]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 116; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[WIDE_LOAD]], <4 x i32> <i32 3, i32 4, i32 5, i32 6> 117; CHECK-NEXT: [[TMP5:%.*]] = sdiv <4 x i32> [[TMP4]], [[BROADCAST_SPLAT]] 118; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i32> [[TMP5]], [[WIDE_LOAD]] 119; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[TMP0]] 120; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[TMP7]], i32 0 121; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[TMP8]] to <4 x i32>* 122; CHECK-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP9]], align 4 123; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 124; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1996 125; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] 126; CHECK: middle.block: 127; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 1999, 1996 128; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 129; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 2 130; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 131; CHECK: scalar.ph: 132; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[DOTPRE]], [[PREHEADER]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] 133; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1997, [[MIDDLE_BLOCK]] ], [ 1, [[PREHEADER]] ] 134; CHECK-NEXT: br label [[FOR:%.*]] 135; CHECK: for: 136; CHECK-NEXT: [[SCALAR_RECUR:%.*]] = phi i32 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[PRE_NEXT:%.*]], [[FOR]] ] 137; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR]] ] 138; CHECK-NEXT: [[DIV_1:%.*]] = sdiv i32 [[SCALAR_RECUR]], [[X]] 139; CHECK-NEXT: [[IDX_1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[IV]] 140; CHECK-NEXT: [[PRE_NEXT]] = load i32, i32* [[IDX_1]], align 4 141; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[DIV_1]], [[PRE_NEXT]] 142; CHECK-NEXT: [[IDX_2:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[IV]] 143; CHECK-NEXT: store i32 [[ADD_2]], i32* [[IDX_2]], align 4 144; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 145; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 2000 146; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT]], label [[FOR]], [[LOOP5:!llvm.loop !.*]] 147; CHECK: exit: 148; CHECK-NEXT: ret void 149; 150 151entry: 152 br label %preheader 153 154preheader: 155 %idx.phi.trans = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 156 %.pre = load i32, i32* %idx.phi.trans, align 4 157 br label %for 158 159for: 160 %pre.phi = phi i32 [ %.pre, %preheader ], [ %pre.next, %for ] 161 %iv = phi i64 [ 1, %preheader ], [ %iv.next, %for ] 162 %div.1 = sdiv i32 %pre.phi, %x 163 %idx.1 = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 %iv 164 %pre.next = load i32, i32* %idx.1, align 4 165 %add.2 = add i32 %div.1, %pre.next 166 %idx.2 = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 %iv 167 store i32 %add.2, i32* %idx.2, align 4 168 %iv.next = add nuw nsw i64 %iv, 1 169 %exitcond = icmp eq i64 %iv.next, 2000 170 br i1 %exitcond, label %exit, label %for 171 172exit: 173 ret void 174} 175 176; FIXME: Currently we can only sink a single instruction. For the example below, 177; we also have to sink users. 178define void @cannot_sink_with_additional_user(i32 %x, i32* %ptr, i64 %tc) { 179; CHECK-LABEL: @cannot_sink_with_additional_user( 180; CHECK-NEXT: entry: 181; CHECK-NEXT: br label [[PREHEADER:%.*]] 182; CHECK: preheader: 183; CHECK-NEXT: [[IDX_PHI_TRANS:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 184; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[IDX_PHI_TRANS]], align 4 185; CHECK-NEXT: br label [[FOR:%.*]] 186; CHECK: for: 187; CHECK-NEXT: [[PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], [[PREHEADER]] ], [ [[PRE_NEXT:%.*]], [[FOR]] ] 188; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[FOR]] ] 189; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[PRE_PHI]], [[X:%.*]] 190; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[ADD_1]], [[X]] 191; CHECK-NEXT: [[IDX_1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[IV]] 192; CHECK-NEXT: [[PRE_NEXT]] = load i32, i32* [[IDX_1]], align 4 193; CHECK-NEXT: [[ADD_3:%.*]] = add i32 [[ADD_1]], [[PRE_NEXT]] 194; CHECK-NEXT: [[ADD_4:%.*]] = add i32 [[ADD_2]], [[ADD_3]] 195; CHECK-NEXT: [[IDX_2:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[IV]] 196; CHECK-NEXT: store i32 [[ADD_4]], i32* [[IDX_2]], align 4 197; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 198; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 2000 199; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[FOR]] 200; CHECK: exit: 201; CHECK-NEXT: ret void 202; 203 204 205 206 207entry: 208 br label %preheader 209 210preheader: 211 %idx.phi.trans = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 212 %.pre = load i32, i32* %idx.phi.trans, align 4 213 br label %for 214 215for: 216 %pre.phi = phi i32 [ %.pre, %preheader ], [ %pre.next, %for ] 217 %iv = phi i64 [ 1, %preheader ], [ %iv.next, %for ] 218 %add.1 = add i32 %pre.phi, %x 219 %add.2 = add i32 %add.1, %x 220 %idx.1 = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 %iv 221 %pre.next = load i32, i32* %idx.1, align 4 222 %add.3 = add i32 %add.1, %pre.next 223 %add.4 = add i32 %add.2, %add.3 224 %idx.2 = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 %iv 225 store i32 %add.4, i32* %idx.2, align 4 226 %iv.next = add nuw nsw i64 %iv, 1 227 %exitcond = icmp eq i64 %iv.next, 2000 228 br i1 %exitcond, label %exit, label %for 229 230exit: 231 ret void 232} 233 234; FIXME: We can sink a store, if we can guarantee that it does not alias any 235; loads/stores in between. 236define void @cannot_sink_store(i32 %x, i32* %ptr, i64 %tc) { 237; CHECK-LABEL: @cannot_sink_store( 238; CHECK-NEXT: entry: 239; CHECK-NEXT: br label [[PREHEADER:%.*]] 240; CHECK: preheader: 241; CHECK-NEXT: [[IDX_PHI_TRANS:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 242; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[IDX_PHI_TRANS]], align 4 243; CHECK-NEXT: br label [[FOR:%.*]] 244; CHECK: for: 245; CHECK-NEXT: [[PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], [[PREHEADER]] ], [ [[PRE_NEXT:%.*]], [[FOR]] ] 246; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[FOR]] ] 247; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[PRE_PHI]], [[X:%.*]] 248; CHECK-NEXT: store i32 [[ADD_1]], i32* [[PTR:%.*]], align 4 249; CHECK-NEXT: [[IDX_1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[IV]] 250; CHECK-NEXT: [[PRE_NEXT]] = load i32, i32* [[IDX_1]], align 4 251; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[ADD_1]], [[PRE_NEXT]] 252; CHECK-NEXT: [[IDX_2:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[IV]] 253; CHECK-NEXT: store i32 [[ADD_2]], i32* [[IDX_2]], align 4 254; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 255; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 2000 256; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[FOR]] 257; CHECK: exit: 258; CHECK-NEXT: ret void 259; 260 261 262 263entry: 264 br label %preheader 265 266preheader: 267 %idx.phi.trans = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 268 %.pre = load i32, i32* %idx.phi.trans, align 4 269 br label %for 270 271for: 272 %pre.phi = phi i32 [ %.pre, %preheader ], [ %pre.next, %for ] 273 %iv = phi i64 [ 1, %preheader ], [ %iv.next, %for ] 274 %add.1 = add i32 %pre.phi, %x 275 store i32 %add.1, i32* %ptr 276 %idx.1 = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 %iv 277 %pre.next = load i32, i32* %idx.1, align 4 278 %add.2 = add i32 %add.1, %pre.next 279 %idx.2 = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 %iv 280 store i32 %add.2, i32* %idx.2, align 4 281 %iv.next = add nuw nsw i64 %iv, 1 282 %exitcond = icmp eq i64 %iv.next, 2000 283 br i1 %exitcond, label %exit, label %for 284 285exit: 286 ret void 287} 288 289; Some kinds of reductions are not detected by IVDescriptors. If we have a 290; cycle, we cannot sink it. 291define void @cannot_sink_reduction(i32 %x, i32* %ptr, i64 %tc) { 292; CHECK-LABEL: @cannot_sink_reduction( 293; CHECK-NEXT: entry: 294; CHECK-NEXT: br label [[PREHEADER:%.*]] 295; CHECK: preheader: 296; CHECK-NEXT: [[IDX_PHI_TRANS:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 297; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[IDX_PHI_TRANS]], align 4 298; CHECK-NEXT: br label [[FOR:%.*]] 299; CHECK: for: 300; CHECK-NEXT: [[PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], [[PREHEADER]] ], [ [[D:%.*]], [[FOR]] ] 301; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[FOR]] ] 302; CHECK-NEXT: [[D]] = sdiv i32 [[PRE_PHI]], [[X:%.*]] 303; CHECK-NEXT: [[IDX_1:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 [[IV]] 304; CHECK-NEXT: [[PRE_NEXT:%.*]] = load i32, i32* [[IDX_1]], align 4 305; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[X]], [[PRE_NEXT]] 306; CHECK-NEXT: [[IDX_2:%.*]] = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 [[IV]] 307; CHECK-NEXT: store i32 [[ADD_2]], i32* [[IDX_2]], align 4 308; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 309; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 2000 310; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[FOR]] 311; CHECK: exit: 312; CHECK-NEXT: ret void 313; 314 315 316 317; CHECK-NET: ret void 318entry: 319 br label %preheader 320 321preheader: 322 %idx.phi.trans = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 1 323 %.pre = load i32, i32* %idx.phi.trans, align 4 324 br label %for 325 326for: 327 %pre.phi = phi i32 [ %.pre, %preheader ], [ %d, %for ] 328 %iv = phi i64 [ 1, %preheader ], [ %iv.next, %for ] 329 %d = sdiv i32 %pre.phi, %x 330 %idx.1 = getelementptr inbounds [257 x i32], [257 x i32]* @p, i64 0, i64 %iv 331 %pre.next = load i32, i32* %idx.1, align 4 332 %add.2 = add i32 %x, %pre.next 333 %idx.2 = getelementptr inbounds [257 x i32], [257 x i32]* @q, i64 0, i64 %iv 334 store i32 %add.2, i32* %idx.2, align 4 335 %iv.next = add nuw nsw i64 %iv, 1 336 %exitcond = icmp eq i64 %iv.next, 2000 337 br i1 %exitcond, label %exit, label %for 338 339exit: 340 ret void 341} 342 343; TODO: We should be able to sink %tmp38 after %tmp60. 344define void @instruction_with_2_FOR_operands() { 345; CHECK-LABEL: @instruction_with_2_FOR_operands( 346; CHECK-NEXT: bb: 347; CHECK-NEXT: br label [[BB13:%.*]] 348; CHECK: bb13: 349; CHECK-NEXT: [[TMP37:%.*]] = phi float [ [[TMP60:%.*]], [[BB13]] ], [ undef, [[BB:%.*]] ] 350; CHECK-NEXT: [[TMP27:%.*]] = phi float [ [[TMP49:%.*]], [[BB13]] ], [ undef, [[BB]] ] 351; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BB13]] ], [ 0, [[BB]] ] 352; CHECK-NEXT: [[TMP38:%.*]] = fmul fast float [[TMP37]], [[TMP27]] 353; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 354; CHECK-NEXT: [[TMP49]] = load float, float* undef, align 4 355; CHECK-NEXT: [[TMP60]] = load float, float* undef, align 4 356; CHECK-NEXT: [[TMP12:%.*]] = icmp slt i64 [[INDVARS_IV]], undef 357; CHECK-NEXT: br i1 [[TMP12]], label [[BB13]], label [[BB74:%.*]] 358; CHECK: bb74: 359; CHECK-NEXT: ret void 360; 361 362 363bb: 364 br label %bb13 365 366bb13: ; preds = %bb13, %bb 367 %tmp37 = phi float [ %tmp60, %bb13 ], [ undef, %bb ] 368 %tmp27 = phi float [ %tmp49, %bb13 ], [ undef, %bb ] 369 %indvars.iv = phi i64 [ %indvars.iv.next, %bb13 ], [ 0, %bb ] 370 %tmp38 = fmul fast float %tmp37, %tmp27 371 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 372 %tmp49 = load float, float* undef, align 4 373 %tmp60 = load float, float* undef, align 4 374 %tmp12 = icmp slt i64 %indvars.iv, undef 375 br i1 %tmp12, label %bb13, label %bb74 376 377bb74: ; preds = %bb13 378 ret void 379} 380 381; Users that are phi nodes cannot be sunk. 382define void @cannot_sink_phi(i32* %ptr) { 383; CHECK-LABEL: @cannot_sink_phi( 384; CHECK-NEXT: entry: 385; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] 386; CHECK: loop.header: 387; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] 388; CHECK-NEXT: [[FOR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[FOR_NEXT:%.*]], [[LOOP_LATCH]] ] 389; CHECK-NEXT: [[C_1:%.*]] = icmp ult i64 [[IV]], 500 390; CHECK-NEXT: br i1 [[C_1]], label [[IF_TRUEBB:%.*]], label [[IF_FALSEBB:%.*]] 391; CHECK: if.truebb: 392; CHECK-NEXT: br label [[LOOP_LATCH]] 393; CHECK: if.falsebb: 394; CHECK-NEXT: br label [[LOOP_LATCH]] 395; CHECK: loop.latch: 396; CHECK-NEXT: [[FIRST_TIME_1:%.*]] = phi i32 [ 20, [[IF_TRUEBB]] ], [ [[FOR]], [[IF_FALSEBB]] ] 397; CHECK-NEXT: [[C_2:%.*]] = icmp ult i64 [[IV]], 800 398; CHECK-NEXT: [[FOR_NEXT]] = select i1 [[C_2]], i32 30, i32 [[FIRST_TIME_1]] 399; CHECK-NEXT: [[PTR_IDX:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 [[IV]] 400; CHECK-NEXT: store i32 [[FOR_NEXT]], i32* [[PTR_IDX]], align 4 401; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1 402; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 1000 403; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[EXIT:%.*]], label [[LOOP_HEADER]] 404; CHECK: exit: 405; CHECK-NEXT: ret void 406; 407entry: 408 br label %loop.header 409 410loop.header: ; preds = %if.end128, %for.cond108.preheader 411 %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop.latch ] 412 %for = phi i32 [ 0, %entry ], [ %for.next, %loop.latch ] 413 %c.1 = icmp ult i64 %iv, 500 414 br i1 %c.1, label %if.truebb, label %if.falsebb 415 416if.truebb: ; preds = %for.body114 417 br label %loop.latch 418 419if.falsebb: ; preds = %for.body114 420 br label %loop.latch 421 422loop.latch: ; preds = %if.then122, %for.body114.if.end128_crit_edge 423 %first_time.1 = phi i32 [ 20, %if.truebb ], [ %for, %if.falsebb ] 424 %c.2 = icmp ult i64 %iv, 800 425 %for.next = select i1 %c.2, i32 30, i32 %first_time.1 426 %ptr.idx = getelementptr i32, i32* %ptr, i64 %iv 427 store i32 %for.next, i32* %ptr.idx 428 %iv.next = add nuw nsw i64 %iv, 1 429 %exitcond.not = icmp eq i64 %iv.next, 1000 430 br i1 %exitcond.not, label %exit, label %loop.header 431 432exit: 433 ret void 434} 435 436; A recurrence in a multiple exit loop. 437define i16 @multiple_exit(i16* %p, i32 %n) { 438; CHECK-LABEL: @multiple_exit( 439; CHECK-NEXT: entry: 440; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) 441; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SMAX]], i32 2096) 442; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i32 [[UMIN]], 1 443; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4 444; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 445; CHECK: vector.ph: 446; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4 447; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[N_MOD_VF]], 0 448; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 4, i32 [[N_MOD_VF]] 449; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP2]] 450; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 451; CHECK: vector.body: 452; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 453; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 454; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i16> [ <i16 poison, i16 poison, i16 poison, i16 0>, [[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], [[VECTOR_BODY]] ] 455; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[INDEX]], 0 456; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 1 457; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 2 458; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[INDEX]], 3 459; CHECK-NEXT: [[TMP7:%.*]] = sext i32 [[TMP3]] to i64 460; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[TMP7]] 461; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i16, i16* [[TMP8]], i32 0 462; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16* [[TMP9]] to <4 x i16>* 463; CHECK-NEXT: [[WIDE_LOAD]] = load <4 x i16>, <4 x i16>* [[TMP10]], align 2 464; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x i16> [[VECTOR_RECUR]], <4 x i16> [[WIDE_LOAD]], <4 x i32> <i32 3, i32 4, i32 5, i32 6> 465; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16* [[TMP9]] to <4 x i16>* 466; CHECK-NEXT: store <4 x i16> [[TMP11]], <4 x i16>* [[TMP12]], align 4 467; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 468; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4> 469; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 470; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]] 471; CHECK: middle.block: 472; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]] 473; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 474; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 2 475; CHECK-NEXT: br i1 [[CMP_N]], label [[IF_END:%.*]], label [[SCALAR_PH]] 476; CHECK: scalar.ph: 477; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ 0, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] 478; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 479; CHECK-NEXT: br label [[FOR_COND:%.*]] 480; CHECK: for.cond: 481; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] 482; CHECK-NEXT: [[SCALAR_RECUR:%.*]] = phi i16 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[REC_NEXT:%.*]], [[FOR_BODY]] ] 483; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64 484; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P]], i64 [[IPROM]] 485; CHECK-NEXT: [[REC_NEXT]] = load i16, i16* [[B]], align 2 486; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N]] 487; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END]] 488; CHECK: for.body: 489; CHECK-NEXT: store i16 [[SCALAR_RECUR]], i16* [[B]], align 4 490; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1 491; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096 492; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], [[LOOP7:!llvm.loop !.*]] 493; CHECK: if.end: 494; CHECK-NEXT: [[REC_LCSSA:%.*]] = phi i16 [ [[SCALAR_RECUR]], [[FOR_BODY]] ], [ [[SCALAR_RECUR]], [[FOR_COND]] ], [ [[VECTOR_RECUR_EXTRACT_FOR_PHI]], [[MIDDLE_BLOCK]] ] 495; CHECK-NEXT: ret i16 [[REC_LCSSA]] 496; 497entry: 498 br label %for.cond 499 500for.cond: 501 %i = phi i32 [ 0, %entry ], [ %inc, %for.body ] 502 %rec = phi i16 [0, %entry], [ %rec.next, %for.body ] 503 %iprom = sext i32 %i to i64 504 %b = getelementptr inbounds i16, i16* %p, i64 %iprom 505 %rec.next = load i16, i16* %b 506 %cmp = icmp slt i32 %i, %n 507 br i1 %cmp, label %for.body, label %if.end 508 509for.body: 510 store i16 %rec , i16* %b, align 4 511 %inc = add nsw i32 %i, 1 512 %cmp2 = icmp slt i32 %i, 2096 513 br i1 %cmp2, label %for.cond, label %if.end 514 515if.end: 516 ret i16 %rec 517} 518 519 520; A multiple exit case where one of the exiting edges involves a value 521; from the recurrence and one does not. 522define i16 @multiple_exit2(i16* %p, i32 %n) { 523; CHECK-LABEL: @multiple_exit2( 524; CHECK-NEXT: entry: 525; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) 526; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SMAX]], i32 2096) 527; CHECK-NEXT: [[TMP0:%.*]] = add nuw nsw i32 [[UMIN]], 1 528; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i32 [[TMP0]], 4 529; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 530; CHECK: vector.ph: 531; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4 532; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[N_MOD_VF]], 0 533; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 4, i32 [[N_MOD_VF]] 534; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[TMP2]] 535; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 536; CHECK: vector.body: 537; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 538; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 539; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i16> [ <i16 poison, i16 poison, i16 poison, i16 0>, [[VECTOR_PH]] ], [ [[WIDE_LOAD:%.*]], [[VECTOR_BODY]] ] 540; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[INDEX]], 0 541; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[INDEX]], 1 542; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 2 543; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[INDEX]], 3 544; CHECK-NEXT: [[TMP7:%.*]] = sext i32 [[TMP3]] to i64 545; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[TMP7]] 546; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i16, i16* [[TMP8]], i32 0 547; CHECK-NEXT: [[TMP10:%.*]] = bitcast i16* [[TMP9]] to <4 x i16>* 548; CHECK-NEXT: [[WIDE_LOAD]] = load <4 x i16>, <4 x i16>* [[TMP10]], align 2 549; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <4 x i16> [[VECTOR_RECUR]], <4 x i16> [[WIDE_LOAD]], <4 x i32> <i32 3, i32 4, i32 5, i32 6> 550; CHECK-NEXT: [[TMP12:%.*]] = bitcast i16* [[TMP9]] to <4 x i16>* 551; CHECK-NEXT: store <4 x i16> [[TMP11]], <4 x i16>* [[TMP12]], align 4 552; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 553; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4> 554; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 555; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]] 556; CHECK: middle.block: 557; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]] 558; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 3 559; CHECK-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <4 x i16> [[WIDE_LOAD]], i32 2 560; CHECK-NEXT: br i1 [[CMP_N]], label [[IF_END:%.*]], label [[SCALAR_PH]] 561; CHECK: scalar.ph: 562; CHECK-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i16 [ 0, [[ENTRY:%.*]] ], [ [[VECTOR_RECUR_EXTRACT]], [[MIDDLE_BLOCK]] ] 563; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 564; CHECK-NEXT: br label [[FOR_COND:%.*]] 565; CHECK: for.cond: 566; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] 567; CHECK-NEXT: [[SCALAR_RECUR:%.*]] = phi i16 [ [[SCALAR_RECUR_INIT]], [[SCALAR_PH]] ], [ [[REC_NEXT:%.*]], [[FOR_BODY]] ] 568; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64 569; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P]], i64 [[IPROM]] 570; CHECK-NEXT: [[REC_NEXT]] = load i16, i16* [[B]], align 2 571; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N]] 572; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END]] 573; CHECK: for.body: 574; CHECK-NEXT: store i16 [[SCALAR_RECUR]], i16* [[B]], align 4 575; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1 576; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096 577; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]], [[LOOP9:!llvm.loop !.*]] 578; CHECK: if.end: 579; CHECK-NEXT: [[REC_LCSSA:%.*]] = phi i16 [ [[SCALAR_RECUR]], [[FOR_COND]] ], [ 10, [[FOR_BODY]] ], [ [[VECTOR_RECUR_EXTRACT_FOR_PHI]], [[MIDDLE_BLOCK]] ] 580; CHECK-NEXT: ret i16 [[REC_LCSSA]] 581; 582entry: 583 br label %for.cond 584 585for.cond: 586 %i = phi i32 [ 0, %entry ], [ %inc, %for.body ] 587 %rec = phi i16 [0, %entry], [ %rec.next, %for.body ] 588 %iprom = sext i32 %i to i64 589 %b = getelementptr inbounds i16, i16* %p, i64 %iprom 590 %rec.next = load i16, i16* %b 591 %cmp = icmp slt i32 %i, %n 592 br i1 %cmp, label %for.body, label %if.end 593 594for.body: 595 store i16 %rec , i16* %b, align 4 596 %inc = add nsw i32 %i, 1 597 %cmp2 = icmp slt i32 %i, 2096 598 br i1 %cmp2, label %for.cond, label %if.end 599 600if.end: 601 %rec.lcssa = phi i16 [ %rec, %for.cond ], [ 10, %for.body ] 602 ret i16 %rec.lcssa 603} 604 605; A test where the instructions to sink may not be visited in dominance order. 606define void @sink_dominance(i32* %ptr, i32 %N) { 607; CHECK-LABEL: @sink_dominance( 608; CHECK-NEXT: entry: 609; CHECK-NEXT: br label [[LOOP:%.*]] 610; CHECK: loop: 611; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ] 612; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 613; CHECK-NEXT: [[FOR_TRUNC:%.*]] = trunc i64 [[FOR]] to i32 614; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[FOR_TRUNC]], 213 615; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[FOR_TRUNC]], i32 22 616; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i32 [[IV]] 617; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP]], align 4 618; CHECK-NEXT: [[FOR_NEXT]] = zext i32 [[LV]] to i64 619; CHECK-NEXT: store i32 [[SELECT]], i32* [[GEP]], align 4 620; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 621; CHECK-NEXT: [[CMP73:%.*]] = icmp ugt i32 [[N:%.*]], [[IV_NEXT]] 622; CHECK-NEXT: br i1 [[CMP73]], label [[LOOP]], label [[EXIT:%.*]] 623; CHECK: exit: 624; CHECK-NEXT: ret void 625; 626entry: 627 br label %loop 628 629loop: 630 %for = phi i64 [ 0, %entry ], [ %for.next, %loop ] 631 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] 632 633 %for.trunc = trunc i64 %for to i32 634 %cmp = icmp slt i32 %for.trunc, 213 635 %select = select i1 %cmp, i32 %for.trunc, i32 22 636 637 %gep = getelementptr inbounds i32, i32* %ptr, i32 %iv 638 %lv = load i32, i32* %gep, align 4 639 %for.next = zext i32 %lv to i64 640 store i32 %select, i32* %gep 641 642 %iv.next = add i32 %iv, 1 643 %cmp73 = icmp ugt i32 %N, %iv.next 644 br i1 %cmp73, label %loop, label %exit 645 646exit: 647 ret void 648} 649 650; Similar to @sink_dominance, but with 2 separate chains that merge at %select 651; with a different number of instructions in between. 652define void @sink_dominance_2(i32* %ptr, i32 %N) { 653; CHECK-LABEL: @sink_dominance_2( 654; CHECK-NEXT: entry: 655; CHECK-NEXT: br label [[LOOP:%.*]] 656; CHECK: loop: 657; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ] 658; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 659; CHECK-NEXT: [[FOR_TRUNC:%.*]] = trunc i64 [[FOR]] to i32 660; CHECK-NEXT: [[STEP:%.*]] = add i32 [[FOR_TRUNC]], 2 661; CHECK-NEXT: [[STEP_2:%.*]] = mul i32 [[STEP]], 99 662; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[FOR_TRUNC]], 213 663; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[FOR_TRUNC]], i32 [[STEP_2]] 664; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i32 [[IV]] 665; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP]], align 4 666; CHECK-NEXT: [[FOR_NEXT]] = zext i32 [[LV]] to i64 667; CHECK-NEXT: store i32 [[SELECT]], i32* [[GEP]], align 4 668; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 669; CHECK-NEXT: [[CMP73:%.*]] = icmp ugt i32 [[N:%.*]], [[IV_NEXT]] 670; CHECK-NEXT: br i1 [[CMP73]], label [[LOOP]], label [[EXIT:%.*]] 671; CHECK: exit: 672; CHECK-NEXT: ret void 673; 674entry: 675 br label %loop 676 677loop: 678 %for = phi i64 [ 0, %entry ], [ %for.next, %loop ] 679 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] 680 681 %for.trunc = trunc i64 %for to i32 682 %step = add i32 %for.trunc, 2 683 %step.2 = mul i32 %step, 99 684 685 %cmp = icmp slt i32 %for.trunc, 213 686 %select = select i1 %cmp, i32 %for.trunc, i32 %step.2 687 688 %gep = getelementptr inbounds i32, i32* %ptr, i32 %iv 689 %lv = load i32, i32* %gep, align 4 690 %for.next = zext i32 %lv to i64 691 store i32 %select, i32* %gep 692 693 %iv.next = add i32 %iv, 1 694 %cmp73 = icmp ugt i32 %N, %iv.next 695 br i1 %cmp73, label %loop, label %exit 696 697exit: 698 ret void 699} 700 701define void @cannot_sink_load_past_store(i32* %ptr, i32 %N) { 702; CHECK-LABEL: @cannot_sink_load_past_store( 703; CHECK-NEXT: entry: 704; CHECK-NEXT: br label [[LOOP:%.*]] 705; CHECK: loop: 706; CHECK-NEXT: [[FOR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[FOR_NEXT:%.*]], [[LOOP]] ] 707; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] 708; CHECK-NEXT: [[GEP_FOR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 [[FOR]] 709; CHECK-NEXT: [[LV_FOR:%.*]] = load i32, i32* [[GEP_FOR]], align 4 710; CHECK-NEXT: [[FOR_TRUNC:%.*]] = trunc i64 [[FOR]] to i32 711; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[LV_FOR]], [[FOR_TRUNC]] 712; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[LV_FOR]], i32 22 713; CHECK-NEXT: [[GEP_IV:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i32 [[IV]] 714; CHECK-NEXT: store i32 0, i32* [[GEP_IV]], align 4 715; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 716; CHECK-NEXT: [[FOR_NEXT]] = zext i32 [[IV]] to i64 717; CHECK-NEXT: [[CMP73:%.*]] = icmp ugt i32 [[N:%.*]], [[IV_NEXT]] 718; CHECK-NEXT: br i1 [[CMP73]], label [[LOOP]], label [[EXIT:%.*]] 719; CHECK: exit: 720; CHECK-NEXT: ret void 721; 722entry: 723 br label %loop 724 725loop: 726 %for = phi i64 [ 0, %entry ], [ %for.next, %loop ] 727 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] 728 729 %gep.for = getelementptr inbounds i32, i32* %ptr, i64 %for 730 %lv.for = load i32, i32* %gep.for, align 4 731 %for.trunc = trunc i64 %for to i32 732 %cmp = icmp slt i32 %lv.for, %for.trunc 733 %select = select i1 %cmp, i32 %lv.for, i32 22 734 735 %gep.iv = getelementptr inbounds i32, i32* %ptr, i32 %iv 736 store i32 0, i32* %gep.iv 737 %iv.next = add i32 %iv, 1 738 %for.next = zext i32 %iv to i64 739 740 %cmp73 = icmp ugt i32 %N, %iv.next 741 br i1 %cmp73, label %loop, label %exit 742 743exit: 744 ret void 745} 746