1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -S | FileCheck %s 3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 5 6; Make sure the loop is vectorized under -Os without folding its tail based on 7; its trip-count's lower bits known to be zero. 8 9define dso_local void @alignTC(i32* noalias nocapture %A, i32 %n) optsize { 10; CHECK-LABEL: @alignTC( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: [[ALIGNEDTC:%.*]] = and i32 [[N:%.*]], -8 13; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[ALIGNEDTC]], 4 14; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 15; CHECK: vector.ph: 16; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[ALIGNEDTC]], 4 17; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[ALIGNEDTC]], [[N_MOD_VF]] 18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 19; CHECK: vector.body: 20; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 21; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 22; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[TMP0]] 23; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 24; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 25; CHECK-NEXT: store <4 x i32> <i32 13, i32 13, i32 13, i32 13>, <4 x i32>* [[TMP3]], align 1 26; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 27; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 28; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 29; CHECK: middle.block: 30; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[ALIGNEDTC]], [[N_VEC]] 31; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] 32; CHECK: scalar.ph: 33; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 34; CHECK-NEXT: br label [[LOOP:%.*]] 35; CHECK: loop: 36; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[LOOP]] ] 37; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 38; CHECK-NEXT: store i32 13, i32* [[ARRAYIDX]], align 1 39; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 40; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[ALIGNEDTC]] 41; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], [[LOOP2:!llvm.loop !.*]] 42; CHECK: exit: 43; CHECK-NEXT: ret void 44; 45entry: 46 %alignedTC = and i32 %n, -8 47 br label %loop 48 49loop: 50 %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ] 51 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %riv 52 store i32 13, i32* %arrayidx, align 1 53 %rivPlus1 = add nuw nsw i32 %riv, 1 54 %cond = icmp eq i32 %rivPlus1, %alignedTC 55 br i1 %cond, label %exit, label %loop 56 57exit: 58 ret void 59} 60 61; Make sure the loop is vectorized under -Os without folding its tail based on 62; its trip-count's lower bits assumed to be zero. 63 64define dso_local void @assumeAlignedTC(i32* noalias nocapture %A, i32 %p, i32 %q) optsize { 65; CHECK-LABEL: @assumeAlignedTC( 66; CHECK-NEXT: entry: 67; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3 68; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 0 69; CHECK-NEXT: br i1 [[CMP1]], label [[GUARDED:%.*]], label [[EXIT:%.*]] 70; CHECK: guarded: 71; CHECK-NEXT: [[REM:%.*]] = urem i32 [[Q:%.*]], 8 72; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[REM]], 0 73; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]]) 74; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[P]], [[Q]] 75; CHECK-NEXT: [[N:%.*]] = select i1 [[GT]], i32 [[P]], i32 [[Q]] 76; CHECK-NEXT: [[CMP110:%.*]] = icmp sgt i32 [[N]], 0 77; CHECK-NEXT: br i1 [[CMP110]], label [[LOOP_PREHEADER:%.*]], label [[EXIT]] 78; CHECK: loop.preheader: 79; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4 80; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 81; CHECK: vector.ph: 82; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 4 83; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]] 84; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 85; CHECK: vector.body: 86; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 87; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 88; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[TMP0]] 89; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 90; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* 91; CHECK-NEXT: store <4 x i32> <i32 13, i32 13, i32 13, i32 13>, <4 x i32>* [[TMP3]], align 1 92; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 93; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 94; CHECK-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] 95; CHECK: middle.block: 96; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]] 97; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 98; CHECK: scalar.ph: 99; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 100; CHECK-NEXT: br label [[LOOP:%.*]] 101; CHECK: loop: 102; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 103; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 104; CHECK-NEXT: store i32 13, i32* [[ARRAYIDX]], align 1 105; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 106; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[N]] 107; CHECK-NEXT: br i1 [[COND]], label [[EXIT_LOOPEXIT]], label [[LOOP]], [[LOOP5:!llvm.loop !.*]] 108; CHECK: exit.loopexit: 109; CHECK-NEXT: br label [[EXIT]] 110; CHECK: exit: 111; CHECK-NEXT: ret void 112; 113entry: 114 %and1 = and i32 %p, 3 115 %cmp1 = icmp eq i32 %and1, 0 116 br i1 %cmp1, label %guarded, label %exit 117 118guarded: 119 %rem = urem i32 %q, 8 120 %cmp2 = icmp eq i32 %rem, 0 121 tail call void @llvm.assume(i1 %cmp2) 122 %gt = icmp sgt i32 %p, %q 123 %n = select i1 %gt, i32 %p, i32 %q 124 %cmp110 = icmp sgt i32 %n, 0 125 br i1 %cmp110, label %loop, label %exit 126 127loop: 128 %riv = phi i32 [ 0, %guarded ], [ %rivPlus1, %loop ] 129 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %riv 130 store i32 13, i32* %arrayidx, align 1 131 %rivPlus1 = add nuw nsw i32 %riv, 1 132 %cond = icmp eq i32 %rivPlus1, %n 133 br i1 %cond, label %exit, label %loop 134 135exit: 136 ret void 137} 138 139; Make sure the loop's tail is folded when vectorized under -Os based on its trip-count's 140; not being provably divisible by chosen VF. 141 142define dso_local void @cannotProveAlignedTC(i32* noalias nocapture %A, i32 %p, i32 %q) optsize { 143; CHECK-LABEL: @cannotProveAlignedTC( 144; CHECK-NEXT: entry: 145; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3 146; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 0 147; CHECK-NEXT: br i1 [[CMP1]], label [[GUARDED:%.*]], label [[EXIT:%.*]] 148; CHECK: guarded: 149; CHECK-NEXT: [[REM:%.*]] = urem i32 [[Q:%.*]], 3 150; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[REM]], 0 151; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP2]]) 152; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[P]], [[Q]] 153; CHECK-NEXT: [[N:%.*]] = select i1 [[GT]], i32 [[P]], i32 [[Q]] 154; CHECK-NEXT: [[CMP110:%.*]] = icmp sgt i32 [[N]], 0 155; CHECK-NEXT: br i1 [[CMP110]], label [[LOOP_PREHEADER:%.*]], label [[EXIT]] 156; CHECK: loop.preheader: 157; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 158; CHECK: vector.ph: 159; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[N]], 3 160; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N_RND_UP]], 4 161; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N_RND_UP]], [[N_MOD_VF]] 162; CHECK-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i32 [[N]], 1 163; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TRIP_COUNT_MINUS_1]], i32 0 164; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer 165; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 166; CHECK: vector.body: 167; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] 168; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] 169; CHECK-NEXT: [[TMP0:%.*]] = icmp ule <4 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] 170; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 171; CHECK-NEXT: br i1 [[TMP1]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 172; CHECK: pred.store.if: 173; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[INDEX]], 0 174; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[TMP2]] 175; CHECK-NEXT: store i32 13, i32* [[TMP3]], align 1 176; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 177; CHECK: pred.store.continue: 178; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 179; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 180; CHECK: pred.store.if1: 181; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDEX]], 1 182; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[TMP5]] 183; CHECK-NEXT: store i32 13, i32* [[TMP6]], align 1 184; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 185; CHECK: pred.store.continue2: 186; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 187; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 188; CHECK: pred.store.if3: 189; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[INDEX]], 2 190; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[TMP8]] 191; CHECK-NEXT: store i32 13, i32* [[TMP9]], align 1 192; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] 193; CHECK: pred.store.continue4: 194; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 195; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] 196; CHECK: pred.store.if5: 197; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[INDEX]], 3 198; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[TMP11]] 199; CHECK-NEXT: store i32 13, i32* [[TMP12]], align 1 200; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] 201; CHECK: pred.store.continue6: 202; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 203; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], <i32 4, i32 4, i32 4, i32 4> 204; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 205; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]] 206; CHECK: middle.block: 207; CHECK-NEXT: br i1 true, label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]] 208; CHECK: scalar.ph: 209; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_PREHEADER]] ] 210; CHECK-NEXT: br label [[LOOP:%.*]] 211; CHECK: loop: 212; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 213; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 214; CHECK-NEXT: store i32 13, i32* [[ARRAYIDX]], align 1 215; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 216; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], [[N]] 217; CHECK-NEXT: br i1 [[COND]], label [[EXIT_LOOPEXIT]], label [[LOOP]], [[LOOP7:!llvm.loop !.*]] 218; CHECK: exit.loopexit: 219; CHECK-NEXT: br label [[EXIT]] 220; CHECK: exit: 221; CHECK-NEXT: ret void 222; 223entry: 224 %and1 = and i32 %p, 3 225 %cmp1 = icmp eq i32 %and1, 0 226 br i1 %cmp1, label %guarded, label %exit 227 228guarded: 229 %rem = urem i32 %q, 3 230 %cmp2 = icmp eq i32 %rem, 0 231 tail call void @llvm.assume(i1 %cmp2) 232 %gt = icmp sgt i32 %p, %q 233 %n = select i1 %gt, i32 %p, i32 %q 234 %cmp110 = icmp sgt i32 %n, 0 235 br i1 %cmp110, label %loop, label %exit 236 237loop: 238 %riv = phi i32 [ 0, %guarded ], [ %rivPlus1, %loop ] 239 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %riv 240 store i32 13, i32* %arrayidx, align 1 241 %rivPlus1 = add nuw nsw i32 %riv, 1 242 %cond = icmp eq i32 %rivPlus1, %n 243 br i1 %cond, label %exit, label %loop 244 245exit: 246 ret void 247} 248 249declare void @llvm.assume(i1 noundef) nofree nosync nounwind willreturn 250