1; RUN: opt < %s -loop-vectorize -S | FileCheck %s
2; RUN: opt < %s -loop-vectorize -prefer-predicate-over-epilog -S | FileCheck -check-prefix=PREDFLAG %s
3
4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
5target triple = "x86_64-unknown-linux-gnu"
6
7define dso_local void @tail_folding_enabled(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i32* noalias nocapture readonly %C) local_unnamed_addr #0 {
8; CHECK-LABEL: tail_folding_enabled(
9; CHECK:  vector.body:
10; CHECK:  %wide.masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(
11; CHECK:  %wide.masked.load1 = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(
12; CHECK:  %8 = add nsw <8 x i32> %wide.masked.load1, %wide.masked.load
13; CHECK:  call void @llvm.masked.store.v8i32.p0v8i32(
14; CHECK:  %index.next = add i64 %index, 8
15; CHECK:  %12 = icmp eq i64 %index.next, 432
16; CHECK:  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !0
17; PREDFLAG-LABEL: tail_folding_enabled(
18; PREDFLAG:  vector.body:
19; PREDFLAG:  %wide.masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(
20; PREDFLAG:  %wide.masked.load1 = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(
21; PREDFLAG:  %8 = add nsw <8 x i32> %wide.masked.load1, %wide.masked.load
22; PREDFLAG:  call void @llvm.masked.store.v8i32.p0v8i32(
23; PREDFLAG:  %index.next = add i64 %index, 8
24; PREDFLAG:  %12 = icmp eq i64 %index.next, 432
25; PREDFLAG:  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !0
26entry:
27  br label %for.body
28
29for.cond.cleanup:
30  ret void
31
32for.body:
33  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
34  %arrayidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
35  %0 = load i32, i32* %arrayidx, align 4
36  %arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
37  %1 = load i32, i32* %arrayidx2, align 4
38  %add = add nsw i32 %1, %0
39  %arrayidx4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
40  store i32 %add, i32* %arrayidx4, align 4
41  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
42  %exitcond = icmp eq i64 %indvars.iv.next, 430
43  br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !6
44}
45
46define dso_local void @tail_folding_disabled(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i32* noalias nocapture readonly %C) local_unnamed_addr #0 {
47; CHECK-LABEL: tail_folding_disabled(
48; CHECK:      vector.body:
49; CHECK-NOT:  @llvm.masked.load.v8i32.p0v8i32(
50; CHECK-NOT:  @llvm.masked.store.v8i32.p0v8i32(
51; CHECK:      br i1 %44, label {{.*}}, label %vector.body
52; PREDFLAG-LABEL: tail_folding_disabled(
53; PREDFLAG:  vector.body:
54; PREDFLAG:  %wide.masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(
55; PREDFLAG:  %wide.masked.load1 = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(
56; PREDFLAG:  %8 = add nsw <8 x i32> %wide.masked.load1, %wide.masked.load
57; PREDFLAG:  call void @llvm.masked.store.v8i32.p0v8i32(
58; PREDFLAG:  %index.next = add i64 %index, 8
59; PREDFLAG:  %12 = icmp eq i64 %index.next, 432
60; PREDFLAG:  br i1 %12, label %middle.block, label %vector.body, !llvm.loop !4
61entry:
62  br label %for.body
63
64for.cond.cleanup:
65  ret void
66
67for.body:
68  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
69  %arrayidx = getelementptr inbounds i32, i32* %B, i64 %indvars.iv
70  %0 = load i32, i32* %arrayidx, align 4
71  %arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %indvars.iv
72  %1 = load i32, i32* %arrayidx2, align 4
73  %add = add nsw i32 %1, %0
74  %arrayidx4 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
75  store i32 %add, i32* %arrayidx4, align 4
76  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
77  %exitcond = icmp eq i64 %indvars.iv.next, 430
78  br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !10
79}
80
81; CHECK:      !0 = distinct !{!0, !1}
82; CHECK-NEXT: !1 = !{!"llvm.loop.isvectorized", i32 1}
83; CHECK-NEXT: !2 = distinct !{!2, !3, !1}
84; CHECK-NEXT: !3 = !{!"llvm.loop.unroll.runtime.disable"}
85; CHECK-NEXT: !4 = distinct !{!4, !1}
86; CHECK-NEXT: !5 = distinct !{!5, !3, !1}
87
88attributes #0 = { nounwind optsize uwtable "target-cpu"="core-avx2" "target-features"="+avx,+avx2" }
89
90!6 = distinct !{!6, !7, !8}
91!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
92!8 = !{!"llvm.loop.vectorize.enable", i1 true}
93
94!10 = distinct !{!10, !11, !12}
95!11 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
96!12 = !{!"llvm.loop.vectorize.enable", i1 true}
97