1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -basic-aa -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -loop-vectorize-with-block-frequency -dce -instcombine -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5target triple = "x86_64-apple-macosx10.8.0" 6 7@b = common global [2048 x i32] zeroinitializer, align 16 8@c = common global [2048 x i32] zeroinitializer, align 16 9@a = common global [2048 x i32] zeroinitializer, align 16 10@G = common global [32 x [1024 x i32]] zeroinitializer, align 16 11@ub = common global [1024 x i32] zeroinitializer, align 16 12@uc = common global [1024 x i32] zeroinitializer, align 16 13@d = common global [2048 x i32] zeroinitializer, align 16 14@fa = common global [1024 x float] zeroinitializer, align 16 15@fb = common global [1024 x float] zeroinitializer, align 16 16@ic = common global [1024 x i32] zeroinitializer, align 16 17@da = common global [1024 x float] zeroinitializer, align 16 18@db = common global [1024 x float] zeroinitializer, align 16 19@dc = common global [1024 x float] zeroinitializer, align 16 20@dd = common global [1024 x float] zeroinitializer, align 16 21@dj = common global [1024 x i32] zeroinitializer, align 16 22 23; We can optimize this test without a tail. 24define void @example1() optsize { 25; CHECK-LABEL: @example1( 26; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 27; CHECK: vector.ph: 28; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 29; CHECK: vector.body: 30; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 31; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[INDEX]] 32; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>* 33; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 16 34; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 [[INDEX]] 35; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>* 36; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 16 37; CHECK-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] 38; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 [[INDEX]] 39; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <4 x i32>* 40; CHECK-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 16 41; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 42; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 43; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 44; CHECK: middle.block: 45; CHECK-NEXT: br i1 true, label [[TMP10:%.*]], label [[SCALAR_PH]] 46; CHECK: scalar.ph: 47; CHECK-NEXT: br label [[TMP9:%.*]] 48; CHECK: 9: 49; CHECK-NEXT: br i1 undef, label [[TMP10]], label [[TMP9]], [[LOOP2:!llvm.loop !.*]] 50; CHECK: 10: 51; CHECK-NEXT: ret void 52; 53 br label %1 54 55; <label>:1 ; preds = %1, %0 56 %indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ] 57 %2 = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 %indvars.iv 58 %3 = load i32, i32* %2, align 4 59 %4 = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 %indvars.iv 60 %5 = load i32, i32* %4, align 4 61 %6 = add nsw i32 %5, %3 62 %7 = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 %indvars.iv 63 store i32 %6, i32* %7, align 4 64 %indvars.iv.next = add i64 %indvars.iv, 1 65 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 66 %exitcond = icmp eq i32 %lftr.wideiv, 256 67 br i1 %exitcond, label %8, label %1 68 69; <label>:8 ; preds = %1 70 ret void 71} 72 73; Can vectorize in 'optsize' mode by masking the needed tail. 74define void @example2(i32 %n, i32 %x) optsize { 75; CHECK-LABEL: @example2( 76; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 0 77; CHECK-NEXT: br i1 [[TMP1]], label [[DOTLR_PH5_PREHEADER:%.*]], label [[DOTPREHEADER:%.*]] 78; CHECK: .lr.ph5.preheader: 79; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[N]], -1 80; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 81; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 82; CHECK: vector.ph: 83; CHECK-NEXT: [[N_RND_UP:%.*]] = add nuw nsw i64 [[TMP3]], 4 84; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N_RND_UP]], 8589934588 85; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> undef, i64 [[TMP3]], i32 0 86; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> undef, <4 x i32> zeroinitializer 87; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 88; CHECK: vector.body: 89; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] 90; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] 91; CHECK-NEXT: [[TMP4:%.*]] = icmp ule <4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]] 92; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0 93; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 94; CHECK: pred.store.if: 95; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[INDEX]] 96; CHECK-NEXT: store i32 [[X:%.*]], i32* [[TMP6]], align 16 97; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 98; CHECK: pred.store.continue: 99; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1 100; CHECK-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] 101; CHECK: pred.store.if1: 102; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[INDEX]], 1 103; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[TMP8]] 104; CHECK-NEXT: store i32 [[X]], i32* [[TMP9]], align 4 105; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] 106; CHECK: pred.store.continue2: 107; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2 108; CHECK-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] 109; CHECK: pred.store.if3: 110; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[INDEX]], 2 111; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[TMP11]] 112; CHECK-NEXT: store i32 [[X]], i32* [[TMP12]], align 8 113; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] 114; CHECK: pred.store.continue4: 115; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3 116; CHECK-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] 117; CHECK: pred.store.if5: 118; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[INDEX]], 3 119; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[TMP14]] 120; CHECK-NEXT: store i32 [[X]], i32* [[TMP15]], align 4 121; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] 122; CHECK: pred.store.continue6: 123; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 124; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], <i64 4, i64 4, i64 4, i64 4> 125; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 126; CHECK-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP4:!llvm.loop !.*]] 127; CHECK: middle.block: 128; CHECK-NEXT: br i1 true, label [[DOT_PREHEADER_CRIT_EDGE:%.*]], label [[SCALAR_PH]] 129; CHECK: scalar.ph: 130; CHECK-NEXT: br label [[DOTLR_PH5:%.*]] 131; CHECK: ..preheader_crit_edge: 132; CHECK-NEXT: [[PHITMP:%.*]] = sext i32 [[N]] to i64 133; CHECK-NEXT: br label [[DOTPREHEADER]] 134; CHECK: .preheader: 135; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i64 [ [[PHITMP]], [[DOT_PREHEADER_CRIT_EDGE]] ], [ 0, [[TMP0:%.*]] ] 136; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[N]], 0 137; CHECK-NEXT: br i1 [[TMP17]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH_PREHEADER:%.*]] 138; CHECK: .lr.ph.preheader: 139; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[N]], -1 140; CHECK-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 141; CHECK-NEXT: br i1 false, label [[SCALAR_PH8:%.*]], label [[VECTOR_PH10:%.*]] 142; CHECK: vector.ph10: 143; CHECK-NEXT: [[N_RND_UP11:%.*]] = add nuw nsw i64 [[TMP19]], 4 144; CHECK-NEXT: [[N_VEC13:%.*]] = and i64 [[N_RND_UP11]], 8589934588 145; CHECK-NEXT: [[BROADCAST_SPLATINSERT20:%.*]] = insertelement <4 x i64> undef, i64 [[TMP19]], i32 0 146; CHECK-NEXT: [[BROADCAST_SPLAT21:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT20]], <4 x i64> undef, <4 x i32> zeroinitializer 147; CHECK-NEXT: br label [[VECTOR_BODY9:%.*]] 148; CHECK: vector.body9: 149; CHECK-NEXT: [[INDEX14:%.*]] = phi i64 [ 0, [[VECTOR_PH10]] ], [ [[INDEX_NEXT15:%.*]], [[PRED_STORE_CONTINUE51:%.*]] ] 150; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[I_0_LCSSA]], [[INDEX14]] 151; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[OFFSET_IDX]], 1 152; CHECK-NEXT: [[TMP21:%.*]] = add i64 [[OFFSET_IDX]], 2 153; CHECK-NEXT: [[TMP22:%.*]] = add i64 [[OFFSET_IDX]], 3 154; CHECK-NEXT: [[BROADCAST_SPLATINSERT28:%.*]] = insertelement <4 x i64> undef, i64 [[INDEX14]], i32 0 155; CHECK-NEXT: [[BROADCAST_SPLAT29:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT28]], <4 x i64> undef, <4 x i32> zeroinitializer 156; CHECK-NEXT: [[VEC_IV:%.*]] = or <4 x i64> [[BROADCAST_SPLAT29]], <i64 0, i64 1, i64 2, i64 3> 157; CHECK-NEXT: [[TMP23:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT21]] 158; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP23]], i32 0 159; CHECK-NEXT: br i1 [[TMP24]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] 160; CHECK: pred.load.if: 161; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[OFFSET_IDX]] 162; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 163; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> undef, i32 [[TMP26]], i32 0 164; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] 165; CHECK: pred.load.continue: 166; CHECK-NEXT: [[TMP28:%.*]] = phi <4 x i32> [ undef, [[VECTOR_BODY9]] ], [ [[TMP27]], [[PRED_LOAD_IF]] ] 167; CHECK-NEXT: [[TMP29:%.*]] = extractelement <4 x i1> [[TMP23]], i32 1 168; CHECK-NEXT: br i1 [[TMP29]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] 169; CHECK: pred.load.if30: 170; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[TMP20]] 171; CHECK-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 172; CHECK-NEXT: [[TMP32:%.*]] = insertelement <4 x i32> [[TMP28]], i32 [[TMP31]], i32 1 173; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE31]] 174; CHECK: pred.load.continue31: 175; CHECK-NEXT: [[TMP33:%.*]] = phi <4 x i32> [ [[TMP28]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP32]], [[PRED_LOAD_IF30]] ] 176; CHECK-NEXT: [[TMP34:%.*]] = extractelement <4 x i1> [[TMP23]], i32 2 177; CHECK-NEXT: br i1 [[TMP34]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] 178; CHECK: pred.load.if32: 179; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[TMP21]] 180; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4 181; CHECK-NEXT: [[TMP37:%.*]] = insertelement <4 x i32> [[TMP33]], i32 [[TMP36]], i32 2 182; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE33]] 183; CHECK: pred.load.continue33: 184; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i32> [ [[TMP33]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP37]], [[PRED_LOAD_IF32]] ] 185; CHECK-NEXT: [[TMP39:%.*]] = extractelement <4 x i1> [[TMP23]], i32 3 186; CHECK-NEXT: br i1 [[TMP39]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] 187; CHECK: pred.load.if34: 188; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 [[TMP22]] 189; CHECK-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4 190; CHECK-NEXT: [[TMP42:%.*]] = insertelement <4 x i32> [[TMP38]], i32 [[TMP41]], i32 3 191; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE35]] 192; CHECK: pred.load.continue35: 193; CHECK-NEXT: [[TMP43:%.*]] = phi <4 x i32> [ [[TMP38]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP42]], [[PRED_LOAD_IF34]] ] 194; CHECK-NEXT: [[TMP44:%.*]] = extractelement <4 x i1> [[TMP23]], i32 0 195; CHECK-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF36:%.*]], label [[PRED_LOAD_CONTINUE37:%.*]] 196; CHECK: pred.load.if36: 197; CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 [[OFFSET_IDX]] 198; CHECK-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4 199; CHECK-NEXT: [[TMP47:%.*]] = insertelement <4 x i32> undef, i32 [[TMP46]], i32 0 200; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE37]] 201; CHECK: pred.load.continue37: 202; CHECK-NEXT: [[TMP48:%.*]] = phi <4 x i32> [ undef, [[PRED_LOAD_CONTINUE35]] ], [ [[TMP47]], [[PRED_LOAD_IF36]] ] 203; CHECK-NEXT: [[TMP49:%.*]] = extractelement <4 x i1> [[TMP23]], i32 1 204; CHECK-NEXT: br i1 [[TMP49]], label [[PRED_LOAD_IF38:%.*]], label [[PRED_LOAD_CONTINUE39:%.*]] 205; CHECK: pred.load.if38: 206; CHECK-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 [[TMP20]] 207; CHECK-NEXT: [[TMP51:%.*]] = load i32, i32* [[TMP50]], align 4 208; CHECK-NEXT: [[TMP52:%.*]] = insertelement <4 x i32> [[TMP48]], i32 [[TMP51]], i32 1 209; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE39]] 210; CHECK: pred.load.continue39: 211; CHECK-NEXT: [[TMP53:%.*]] = phi <4 x i32> [ [[TMP48]], [[PRED_LOAD_CONTINUE37]] ], [ [[TMP52]], [[PRED_LOAD_IF38]] ] 212; CHECK-NEXT: [[TMP54:%.*]] = extractelement <4 x i1> [[TMP23]], i32 2 213; CHECK-NEXT: br i1 [[TMP54]], label [[PRED_LOAD_IF40:%.*]], label [[PRED_LOAD_CONTINUE41:%.*]] 214; CHECK: pred.load.if40: 215; CHECK-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 [[TMP21]] 216; CHECK-NEXT: [[TMP56:%.*]] = load i32, i32* [[TMP55]], align 4 217; CHECK-NEXT: [[TMP57:%.*]] = insertelement <4 x i32> [[TMP53]], i32 [[TMP56]], i32 2 218; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE41]] 219; CHECK: pred.load.continue41: 220; CHECK-NEXT: [[TMP58:%.*]] = phi <4 x i32> [ [[TMP53]], [[PRED_LOAD_CONTINUE39]] ], [ [[TMP57]], [[PRED_LOAD_IF40]] ] 221; CHECK-NEXT: [[TMP59:%.*]] = extractelement <4 x i1> [[TMP23]], i32 3 222; CHECK-NEXT: br i1 [[TMP59]], label [[PRED_LOAD_IF42:%.*]], label [[PRED_LOAD_CONTINUE43:%.*]] 223; CHECK: pred.load.if42: 224; CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 [[TMP22]] 225; CHECK-NEXT: [[TMP61:%.*]] = load i32, i32* [[TMP60]], align 4 226; CHECK-NEXT: [[TMP62:%.*]] = insertelement <4 x i32> [[TMP58]], i32 [[TMP61]], i32 3 227; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE43]] 228; CHECK: pred.load.continue43: 229; CHECK-NEXT: [[TMP63:%.*]] = phi <4 x i32> [ [[TMP58]], [[PRED_LOAD_CONTINUE41]] ], [ [[TMP62]], [[PRED_LOAD_IF42]] ] 230; CHECK-NEXT: [[TMP64:%.*]] = and <4 x i32> [[TMP63]], [[TMP43]] 231; CHECK-NEXT: [[TMP65:%.*]] = extractelement <4 x i1> [[TMP23]], i32 0 232; CHECK-NEXT: br i1 [[TMP65]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] 233; CHECK: pred.store.if44: 234; CHECK-NEXT: [[TMP66:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 [[OFFSET_IDX]] 235; CHECK-NEXT: [[TMP67:%.*]] = extractelement <4 x i32> [[TMP64]], i32 0 236; CHECK-NEXT: store i32 [[TMP67]], i32* [[TMP66]], align 4 237; CHECK-NEXT: br label [[PRED_STORE_CONTINUE45]] 238; CHECK: pred.store.continue45: 239; CHECK-NEXT: [[TMP68:%.*]] = extractelement <4 x i1> [[TMP23]], i32 1 240; CHECK-NEXT: br i1 [[TMP68]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] 241; CHECK: pred.store.if46: 242; CHECK-NEXT: [[TMP69:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 [[TMP20]] 243; CHECK-NEXT: [[TMP70:%.*]] = extractelement <4 x i32> [[TMP64]], i32 1 244; CHECK-NEXT: store i32 [[TMP70]], i32* [[TMP69]], align 4 245; CHECK-NEXT: br label [[PRED_STORE_CONTINUE47]] 246; CHECK: pred.store.continue47: 247; CHECK-NEXT: [[TMP71:%.*]] = extractelement <4 x i1> [[TMP23]], i32 2 248; CHECK-NEXT: br i1 [[TMP71]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] 249; CHECK: pred.store.if48: 250; CHECK-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 [[TMP21]] 251; CHECK-NEXT: [[TMP73:%.*]] = extractelement <4 x i32> [[TMP64]], i32 2 252; CHECK-NEXT: store i32 [[TMP73]], i32* [[TMP72]], align 4 253; CHECK-NEXT: br label [[PRED_STORE_CONTINUE49]] 254; CHECK: pred.store.continue49: 255; CHECK-NEXT: [[TMP74:%.*]] = extractelement <4 x i1> [[TMP23]], i32 3 256; CHECK-NEXT: br i1 [[TMP74]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51]] 257; CHECK: pred.store.if50: 258; CHECK-NEXT: [[TMP75:%.*]] = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 [[TMP22]] 259; CHECK-NEXT: [[TMP76:%.*]] = extractelement <4 x i32> [[TMP64]], i32 3 260; CHECK-NEXT: store i32 [[TMP76]], i32* [[TMP75]], align 4 261; CHECK-NEXT: br label [[PRED_STORE_CONTINUE51]] 262; CHECK: pred.store.continue51: 263; CHECK-NEXT: [[INDEX_NEXT15]] = add i64 [[INDEX14]], 4 264; CHECK-NEXT: [[TMP77:%.*]] = icmp eq i64 [[INDEX_NEXT15]], [[N_VEC13]] 265; CHECK-NEXT: br i1 [[TMP77]], label [[MIDDLE_BLOCK7:%.*]], label [[VECTOR_BODY9]], [[LOOP5:!llvm.loop !.*]] 266; CHECK: middle.block7: 267; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE_LOOPEXIT:%.*]], label [[SCALAR_PH8]] 268; CHECK: scalar.ph8: 269; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 270; CHECK: .lr.ph5: 271; CHECK-NEXT: br i1 undef, label [[DOT_PREHEADER_CRIT_EDGE]], label [[DOTLR_PH5]], [[LOOP6:!llvm.loop !.*]] 272; CHECK: .lr.ph: 273; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE_LOOPEXIT]], label [[DOTLR_PH]], [[LOOP7:!llvm.loop !.*]] 274; CHECK: ._crit_edge.loopexit: 275; CHECK-NEXT: br label [[DOT_CRIT_EDGE]] 276; CHECK: ._crit_edge: 277; CHECK-NEXT: ret void 278; 279 %1 = icmp sgt i32 %n, 0 280 br i1 %1, label %.lr.ph5, label %.preheader 281 282..preheader_crit_edge: ; preds = %.lr.ph5 283 %phitmp = sext i32 %n to i64 284 br label %.preheader 285 286.preheader: ; preds = %..preheader_crit_edge, %0 287 %i.0.lcssa = phi i64 [ %phitmp, %..preheader_crit_edge ], [ 0, %0 ] 288 %2 = icmp eq i32 %n, 0 289 br i1 %2, label %._crit_edge, label %.lr.ph 290 291.lr.ph5: ; preds = %0, %.lr.ph5 292 %indvars.iv6 = phi i64 [ %indvars.iv.next7, %.lr.ph5 ], [ 0, %0 ] 293 %3 = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 %indvars.iv6 294 store i32 %x, i32* %3, align 4 295 %indvars.iv.next7 = add i64 %indvars.iv6, 1 296 %lftr.wideiv = trunc i64 %indvars.iv.next7 to i32 297 %exitcond = icmp eq i32 %lftr.wideiv, %n 298 br i1 %exitcond, label %..preheader_crit_edge, label %.lr.ph5 299 300.lr.ph: ; preds = %.preheader, %.lr.ph 301 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %i.0.lcssa, %.preheader ] 302 %.02 = phi i32 [ %4, %.lr.ph ], [ %n, %.preheader ] 303 %4 = add nsw i32 %.02, -1 304 %5 = getelementptr inbounds [2048 x i32], [2048 x i32]* @b, i64 0, i64 %indvars.iv 305 %6 = load i32, i32* %5, align 4 306 %7 = getelementptr inbounds [2048 x i32], [2048 x i32]* @c, i64 0, i64 %indvars.iv 307 %8 = load i32, i32* %7, align 4 308 %9 = and i32 %8, %6 309 %10 = getelementptr inbounds [2048 x i32], [2048 x i32]* @a, i64 0, i64 %indvars.iv 310 store i32 %9, i32* %10, align 4 311 %indvars.iv.next = add i64 %indvars.iv, 1 312 %11 = icmp eq i32 %4, 0 313 br i1 %11, label %._crit_edge, label %.lr.ph 314 315._crit_edge: ; preds = %.lr.ph, %.preheader 316 ret void 317} 318 319; Loop has no primary induction as its integer IV has step -1 starting at 320; unknown N, but can still be vectorized. 321define void @example3(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture %q) optsize { 322; CHECK-LABEL: @example3( 323; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[N:%.*]], 0 324; CHECK-NEXT: br i1 [[TMP1]], label [[DOT_CRIT_EDGE:%.*]], label [[DOTLR_PH_PREHEADER:%.*]] 325; CHECK: .lr.ph.preheader: 326; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[N]], -1 327; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 328; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 329; CHECK: vector.ph: 330; CHECK-NEXT: [[N_RND_UP:%.*]] = add nuw nsw i64 [[TMP3]], 4 331; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N_RND_UP]], 8589934588 332; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> undef, i64 [[TMP3]], i32 0 333; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> undef, <4 x i32> zeroinitializer 334; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 335; CHECK: vector.body: 336; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE27:%.*]] ] 337; CHECK-NEXT: [[BROADCAST_SPLATINSERT14:%.*]] = insertelement <4 x i64> undef, i64 [[INDEX]], i32 0 338; CHECK-NEXT: [[BROADCAST_SPLAT15:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT14]], <4 x i64> undef, <4 x i32> zeroinitializer 339; CHECK-NEXT: [[VEC_IV:%.*]] = or <4 x i64> [[BROADCAST_SPLAT15]], <i64 0, i64 1, i64 2, i64 3> 340; CHECK-NEXT: [[TMP4:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT]] 341; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0 342; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] 343; CHECK: pred.load.if: 344; CHECK-NEXT: [[NEXT_GEP10:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]] 345; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[NEXT_GEP10]], align 16 346; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] 347; CHECK: pred.load.continue: 348; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ undef, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] 349; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1 350; CHECK-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] 351; CHECK: pred.load.if16: 352; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[INDEX]], 1 353; CHECK-NEXT: [[NEXT_GEP11:%.*]] = getelementptr i32, i32* [[Q]], i64 [[TMP9]] 354; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[NEXT_GEP11]], align 16 355; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE17]] 356; CHECK: pred.load.continue17: 357; CHECK-NEXT: [[TMP11:%.*]] = phi i32 [ undef, [[PRED_LOAD_CONTINUE]] ], [ [[TMP10]], [[PRED_LOAD_IF16]] ] 358; CHECK-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2 359; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] 360; CHECK: pred.load.if18: 361; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[INDEX]], 2 362; CHECK-NEXT: [[NEXT_GEP12:%.*]] = getelementptr i32, i32* [[Q]], i64 [[TMP13]] 363; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[NEXT_GEP12]], align 16 364; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE19]] 365; CHECK: pred.load.continue19: 366; CHECK-NEXT: [[TMP15:%.*]] = phi i32 [ undef, [[PRED_LOAD_CONTINUE17]] ], [ [[TMP14]], [[PRED_LOAD_IF18]] ] 367; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3 368; CHECK-NEXT: br i1 [[TMP16]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] 369; CHECK: pred.load.if20: 370; CHECK-NEXT: [[TMP17:%.*]] = or i64 [[INDEX]], 3 371; CHECK-NEXT: [[NEXT_GEP13:%.*]] = getelementptr i32, i32* [[Q]], i64 [[TMP17]] 372; CHECK-NEXT: [[TMP18:%.*]] = load i32, i32* [[NEXT_GEP13]], align 16 373; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE21]] 374; CHECK: pred.load.continue21: 375; CHECK-NEXT: [[TMP19:%.*]] = phi i32 [ undef, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP18]], [[PRED_LOAD_IF20]] ] 376; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP4]], i32 0 377; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 378; CHECK: pred.store.if: 379; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]] 380; CHECK-NEXT: store i32 [[TMP7]], i32* [[NEXT_GEP]], align 16 381; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 382; CHECK: pred.store.continue: 383; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP4]], i32 1 384; CHECK-NEXT: br i1 [[TMP21]], label [[PRED_STORE_IF22:%.*]], label [[PRED_STORE_CONTINUE23:%.*]] 385; CHECK: pred.store.if22: 386; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[INDEX]], 1 387; CHECK-NEXT: [[NEXT_GEP7:%.*]] = getelementptr i32, i32* [[P]], i64 [[TMP22]] 388; CHECK-NEXT: store i32 [[TMP11]], i32* [[NEXT_GEP7]], align 16 389; CHECK-NEXT: br label [[PRED_STORE_CONTINUE23]] 390; CHECK: pred.store.continue23: 391; CHECK-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP4]], i32 2 392; CHECK-NEXT: br i1 [[TMP23]], label [[PRED_STORE_IF24:%.*]], label [[PRED_STORE_CONTINUE25:%.*]] 393; CHECK: pred.store.if24: 394; CHECK-NEXT: [[TMP24:%.*]] = or i64 [[INDEX]], 2 395; CHECK-NEXT: [[NEXT_GEP8:%.*]] = getelementptr i32, i32* [[P]], i64 [[TMP24]] 396; CHECK-NEXT: store i32 [[TMP15]], i32* [[NEXT_GEP8]], align 16 397; CHECK-NEXT: br label [[PRED_STORE_CONTINUE25]] 398; CHECK: pred.store.continue25: 399; CHECK-NEXT: [[TMP25:%.*]] = extractelement <4 x i1> [[TMP4]], i32 3 400; CHECK-NEXT: br i1 [[TMP25]], label [[PRED_STORE_IF26:%.*]], label [[PRED_STORE_CONTINUE27]] 401; CHECK: pred.store.if26: 402; CHECK-NEXT: [[TMP26:%.*]] = or i64 [[INDEX]], 3 403; CHECK-NEXT: [[NEXT_GEP9:%.*]] = getelementptr i32, i32* [[P]], i64 [[TMP26]] 404; CHECK-NEXT: store i32 [[TMP19]], i32* [[NEXT_GEP9]], align 16 405; CHECK-NEXT: br label [[PRED_STORE_CONTINUE27]] 406; CHECK: pred.store.continue27: 407; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 408; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 409; CHECK-NEXT: br i1 [[TMP27]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]] 410; CHECK: middle.block: 411; CHECK-NEXT: br i1 true, label [[DOT_CRIT_EDGE_LOOPEXIT:%.*]], label [[SCALAR_PH]] 412; CHECK: scalar.ph: 413; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 414; CHECK: .lr.ph: 415; CHECK-NEXT: br i1 undef, label [[DOT_CRIT_EDGE_LOOPEXIT]], label [[DOTLR_PH]], [[LOOP9:!llvm.loop !.*]] 416; CHECK: ._crit_edge.loopexit: 417; CHECK-NEXT: br label [[DOT_CRIT_EDGE]] 418; CHECK: ._crit_edge: 419; CHECK-NEXT: ret void 420; 421 %1 = icmp eq i32 %n, 0 422 br i1 %1, label %._crit_edge, label %.lr.ph 423 424.lr.ph: ; preds = %0, %.lr.ph 425 %.05 = phi i32 [ %2, %.lr.ph ], [ %n, %0 ] 426 %.014 = phi i32* [ %5, %.lr.ph ], [ %p, %0 ] 427 %.023 = phi i32* [ %3, %.lr.ph ], [ %q, %0 ] 428 %2 = add nsw i32 %.05, -1 429 %3 = getelementptr inbounds i32, i32* %.023, i64 1 430 %4 = load i32, i32* %.023, align 16 431 %5 = getelementptr inbounds i32, i32* %.014, i64 1 432 store i32 %4, i32* %.014, align 16 433 %6 = icmp eq i32 %2, 0 434 br i1 %6, label %._crit_edge, label %.lr.ph 435 436._crit_edge: ; preds = %.lr.ph, %0 437 ret void 438} 439 440; We can't vectorize this one because we need a runtime ptr check. 441define void @example23(i16* nocapture %src, i32* nocapture %dst) optsize { 442; CHECK-LABEL: @example23( 443; CHECK-NEXT: br label [[TMP1:%.*]] 444; CHECK: 1: 445; CHECK-NEXT: [[DOT04:%.*]] = phi i16* [ [[SRC:%.*]], [[TMP0:%.*]] ], [ [[TMP2:%.*]], [[TMP1]] ] 446; CHECK-NEXT: [[DOT013:%.*]] = phi i32* [ [[DST:%.*]], [[TMP0]] ], [ [[TMP6:%.*]], [[TMP1]] ] 447; CHECK-NEXT: [[I_02:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7:%.*]], [[TMP1]] ] 448; CHECK-NEXT: [[TMP2]] = getelementptr inbounds i16, i16* [[DOT04]], i64 1 449; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* [[DOT04]], align 2 450; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP3]] to i32 451; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i32 [[TMP4]], 7 452; CHECK-NEXT: [[TMP6]] = getelementptr inbounds i32, i32* [[DOT013]], i64 1 453; CHECK-NEXT: store i32 [[TMP5]], i32* [[DOT013]], align 4 454; CHECK-NEXT: [[TMP7]] = add nuw nsw i32 [[I_02]], 1 455; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[TMP7]], 256 456; CHECK-NEXT: br i1 [[EXITCOND]], label [[TMP8:%.*]], label [[TMP1]] 457; CHECK: 8: 458; CHECK-NEXT: ret void 459; 460 br label %1 461 462; <label>:1 ; preds = %1, %0 463 %.04 = phi i16* [ %src, %0 ], [ %2, %1 ] 464 %.013 = phi i32* [ %dst, %0 ], [ %6, %1 ] 465 %i.02 = phi i32 [ 0, %0 ], [ %7, %1 ] 466 %2 = getelementptr inbounds i16, i16* %.04, i64 1 467 %3 = load i16, i16* %.04, align 2 468 %4 = zext i16 %3 to i32 469 %5 = shl nuw nsw i32 %4, 7 470 %6 = getelementptr inbounds i32, i32* %.013, i64 1 471 store i32 %5, i32* %.013, align 4 472 %7 = add nsw i32 %i.02, 1 473 %exitcond = icmp eq i32 %7, 256 474 br i1 %exitcond, label %8, label %1 475 476; <label>:8 ; preds = %1 477 ret void 478} 479 480 481; We CAN vectorize this example because the pointers are marked as noalias. 482define void @example23b(i16* noalias nocapture %src, i32* noalias nocapture %dst) optsize { 483; CHECK-LABEL: @example23b( 484; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 485; CHECK: vector.ph: 486; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 487; CHECK: vector.body: 488; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 489; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i16, i16* [[SRC:%.*]], i64 [[INDEX]] 490; CHECK-NEXT: [[NEXT_GEP4:%.*]] = getelementptr i32, i32* [[DST:%.*]], i64 [[INDEX]] 491; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[NEXT_GEP]] to <4 x i16>* 492; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i16>, <4 x i16>* [[TMP1]], align 2 493; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i16> [[WIDE_LOAD]] to <4 x i32> 494; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw <4 x i32> [[TMP2]], <i32 7, i32 7, i32 7, i32 7> 495; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[NEXT_GEP4]] to <4 x i32>* 496; CHECK-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[TMP4]], align 4 497; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 498; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 499; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP10:!llvm.loop !.*]] 500; CHECK: middle.block: 501; CHECK-NEXT: br i1 true, label [[TMP7:%.*]], label [[SCALAR_PH]] 502; CHECK: scalar.ph: 503; CHECK-NEXT: br label [[TMP6:%.*]] 504; CHECK: 6: 505; CHECK-NEXT: br i1 undef, label [[TMP7]], label [[TMP6]], [[LOOP11:!llvm.loop !.*]] 506; CHECK: 7: 507; CHECK-NEXT: ret void 508; 509 br label %1 510 511; <label>:1 ; preds = %1, %0 512 %.04 = phi i16* [ %src, %0 ], [ %2, %1 ] 513 %.013 = phi i32* [ %dst, %0 ], [ %6, %1 ] 514 %i.02 = phi i32 [ 0, %0 ], [ %7, %1 ] 515 %2 = getelementptr inbounds i16, i16* %.04, i64 1 516 %3 = load i16, i16* %.04, align 2 517 %4 = zext i16 %3 to i32 518 %5 = shl nuw nsw i32 %4, 7 519 %6 = getelementptr inbounds i32, i32* %.013, i64 1 520 store i32 %5, i32* %.013, align 4 521 %7 = add nsw i32 %i.02, 1 522 %exitcond = icmp eq i32 %7, 256 523 br i1 %exitcond, label %8, label %1 524 525; <label>:8 ; preds = %1 526 ret void 527} 528 529; We CAN vectorize this example by folding the tail it entails. 530define void @example23c(i16* noalias nocapture %src, i32* noalias nocapture %dst) optsize { 531; CHECK-LABEL: @example23c( 532; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 533; CHECK: vector.ph: 534; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 535; CHECK: vector.body: 536; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE22:%.*]] ] 537; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> undef, i64 [[INDEX]], i32 0 538; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> undef, <4 x i32> zeroinitializer 539; CHECK-NEXT: [[INDUCTION:%.*]] = or <4 x i64> [[BROADCAST_SPLAT]], <i64 0, i64 1, i64 2, i64 3> 540; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i64> [[INDUCTION]], <i64 257, i64 257, i64 257, i64 257> 541; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0 542; CHECK-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] 543; CHECK: pred.load.if: 544; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i16, i16* [[SRC:%.*]], i64 [[INDEX]] 545; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* [[NEXT_GEP]], align 2 546; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]] 547; CHECK: pred.load.continue: 548; CHECK-NEXT: [[TMP4:%.*]] = phi i16 [ undef, [[VECTOR_BODY]] ], [ [[TMP3]], [[PRED_LOAD_IF]] ] 549; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1 550; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] 551; CHECK: pred.load.if11: 552; CHECK-NEXT: [[TMP6:%.*]] = or i64 [[INDEX]], 1 553; CHECK-NEXT: [[NEXT_GEP4:%.*]] = getelementptr i16, i16* [[SRC]], i64 [[TMP6]] 554; CHECK-NEXT: [[TMP7:%.*]] = load i16, i16* [[NEXT_GEP4]], align 2 555; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE12]] 556; CHECK: pred.load.continue12: 557; CHECK-NEXT: [[TMP8:%.*]] = phi i16 [ undef, [[PRED_LOAD_CONTINUE]] ], [ [[TMP7]], [[PRED_LOAD_IF11]] ] 558; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2 559; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] 560; CHECK: pred.load.if13: 561; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[INDEX]], 2 562; CHECK-NEXT: [[NEXT_GEP5:%.*]] = getelementptr i16, i16* [[SRC]], i64 [[TMP10]] 563; CHECK-NEXT: [[TMP11:%.*]] = load i16, i16* [[NEXT_GEP5]], align 2 564; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE14]] 565; CHECK: pred.load.continue14: 566; CHECK-NEXT: [[TMP12:%.*]] = phi i16 [ undef, [[PRED_LOAD_CONTINUE12]] ], [ [[TMP11]], [[PRED_LOAD_IF13]] ] 567; CHECK-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3 568; CHECK-NEXT: br i1 [[TMP13]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] 569; CHECK: pred.load.if15: 570; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[INDEX]], 3 571; CHECK-NEXT: [[NEXT_GEP6:%.*]] = getelementptr i16, i16* [[SRC]], i64 [[TMP14]] 572; CHECK-NEXT: [[TMP15:%.*]] = load i16, i16* [[NEXT_GEP6]], align 2 573; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE16]] 574; CHECK: pred.load.continue16: 575; CHECK-NEXT: [[TMP16:%.*]] = phi i16 [ undef, [[PRED_LOAD_CONTINUE14]] ], [ [[TMP15]], [[PRED_LOAD_IF15]] ] 576; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0 577; CHECK-NEXT: br i1 [[TMP17]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] 578; CHECK: pred.store.if: 579; CHECK-NEXT: [[TMP18:%.*]] = zext i16 [[TMP4]] to i32 580; CHECK-NEXT: [[TMP19:%.*]] = shl nuw nsw i32 [[TMP18]], 7 581; CHECK-NEXT: [[NEXT_GEP7:%.*]] = getelementptr i32, i32* [[DST:%.*]], i64 [[INDEX]] 582; CHECK-NEXT: store i32 [[TMP19]], i32* [[NEXT_GEP7]], align 4 583; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] 584; CHECK: pred.store.continue: 585; CHECK-NEXT: [[TMP20:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1 586; CHECK-NEXT: br i1 [[TMP20]], label [[PRED_STORE_IF17:%.*]], label [[PRED_STORE_CONTINUE18:%.*]] 587; CHECK: pred.store.if17: 588; CHECK-NEXT: [[TMP21:%.*]] = zext i16 [[TMP8]] to i32 589; CHECK-NEXT: [[TMP22:%.*]] = shl nuw nsw i32 [[TMP21]], 7 590; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[INDEX]], 1 591; CHECK-NEXT: [[NEXT_GEP8:%.*]] = getelementptr i32, i32* [[DST]], i64 [[TMP23]] 592; CHECK-NEXT: store i32 [[TMP22]], i32* [[NEXT_GEP8]], align 4 593; CHECK-NEXT: br label [[PRED_STORE_CONTINUE18]] 594; CHECK: pred.store.continue18: 595; CHECK-NEXT: [[TMP24:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2 596; CHECK-NEXT: br i1 [[TMP24]], label [[PRED_STORE_IF19:%.*]], label [[PRED_STORE_CONTINUE20:%.*]] 597; CHECK: pred.store.if19: 598; CHECK-NEXT: [[TMP25:%.*]] = zext i16 [[TMP12]] to i32 599; CHECK-NEXT: [[TMP26:%.*]] = shl nuw nsw i32 [[TMP25]], 7 600; CHECK-NEXT: [[TMP27:%.*]] = or i64 [[INDEX]], 2 601; CHECK-NEXT: [[NEXT_GEP9:%.*]] = getelementptr i32, i32* [[DST]], i64 [[TMP27]] 602; CHECK-NEXT: store i32 [[TMP26]], i32* [[NEXT_GEP9]], align 4 603; CHECK-NEXT: br label [[PRED_STORE_CONTINUE20]] 604; CHECK: pred.store.continue20: 605; CHECK-NEXT: [[TMP28:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3 606; CHECK-NEXT: br i1 [[TMP28]], label [[PRED_STORE_IF21:%.*]], label [[PRED_STORE_CONTINUE22]] 607; CHECK: pred.store.if21: 608; CHECK-NEXT: [[TMP29:%.*]] = zext i16 [[TMP16]] to i32 609; CHECK-NEXT: [[TMP30:%.*]] = shl nuw nsw i32 [[TMP29]], 7 610; CHECK-NEXT: [[TMP31:%.*]] = or i64 [[INDEX]], 3 611; CHECK-NEXT: [[NEXT_GEP10:%.*]] = getelementptr i32, i32* [[DST]], i64 [[TMP31]] 612; CHECK-NEXT: store i32 [[TMP30]], i32* [[NEXT_GEP10]], align 4 613; CHECK-NEXT: br label [[PRED_STORE_CONTINUE22]] 614; CHECK: pred.store.continue22: 615; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 616; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i64 [[INDEX_NEXT]], 260 617; CHECK-NEXT: br i1 [[TMP32]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP12:!llvm.loop !.*]] 618; CHECK: middle.block: 619; CHECK-NEXT: br i1 true, label [[TMP34:%.*]], label [[SCALAR_PH]] 620; CHECK: scalar.ph: 621; CHECK-NEXT: br label [[TMP33:%.*]] 622; CHECK: 33: 623; CHECK-NEXT: br i1 undef, label [[TMP34]], label [[TMP33]], [[LOOP13:!llvm.loop !.*]] 624; CHECK: 34: 625; CHECK-NEXT: ret void 626; 627 br label %1 628 629; <label>:1 ; preds = %1, %0 630 %.04 = phi i16* [ %src, %0 ], [ %2, %1 ] 631 %.013 = phi i32* [ %dst, %0 ], [ %6, %1 ] 632 %i.02 = phi i64 [ 0, %0 ], [ %7, %1 ] 633 %2 = getelementptr inbounds i16, i16* %.04, i64 1 634 %3 = load i16, i16* %.04, align 2 635 %4 = zext i16 %3 to i32 636 %5 = shl nuw nsw i32 %4, 7 637 %6 = getelementptr inbounds i32, i32* %.013, i64 1 638 store i32 %5, i32* %.013, align 4 639 %7 = add nsw i64 %i.02, 1 640 %exitcond = icmp eq i64 %7, 257 641 br i1 %exitcond, label %8, label %1 642 643; <label>:8 ; preds = %1 644 ret void 645} 646 647; We CAN'T vectorize this example because it would entail a tail and an 648; induction is used outside the loop. 649define i64 @example23d(i16* noalias nocapture %src, i32* noalias nocapture %dst) optsize { 650; CHECK-LABEL: @example23d( 651; CHECK-NEXT: br label [[TMP1:%.*]] 652; CHECK: 1: 653; CHECK-NEXT: [[DOT04:%.*]] = phi i16* [ [[SRC:%.*]], [[TMP0:%.*]] ], [ [[TMP2:%.*]], [[TMP1]] ] 654; CHECK-NEXT: [[DOT013:%.*]] = phi i32* [ [[DST:%.*]], [[TMP0]] ], [ [[TMP6:%.*]], [[TMP1]] ] 655; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[TMP0]] ], [ [[TMP7:%.*]], [[TMP1]] ] 656; CHECK-NEXT: [[TMP2]] = getelementptr inbounds i16, i16* [[DOT04]], i64 1 657; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* [[DOT04]], align 2 658; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP3]] to i32 659; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i32 [[TMP4]], 7 660; CHECK-NEXT: [[TMP6]] = getelementptr inbounds i32, i32* [[DOT013]], i64 1 661; CHECK-NEXT: store i32 [[TMP5]], i32* [[DOT013]], align 4 662; CHECK-NEXT: [[TMP7]] = add nuw nsw i64 [[I_02]], 1 663; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP7]], 257 664; CHECK-NEXT: br i1 [[EXITCOND]], label [[TMP8:%.*]], label [[TMP1]] 665; CHECK: 8: 666; CHECK-NEXT: ret i64 [[TMP7]] 667; 668 br label %1 669 670; <label>:1 ; preds = %1, %0 671 %.04 = phi i16* [ %src, %0 ], [ %2, %1 ] 672 %.013 = phi i32* [ %dst, %0 ], [ %6, %1 ] 673 %i.02 = phi i64 [ 0, %0 ], [ %7, %1 ] 674 %2 = getelementptr inbounds i16, i16* %.04, i64 1 675 %3 = load i16, i16* %.04, align 2 676 %4 = zext i16 %3 to i32 677 %5 = shl nuw nsw i32 %4, 7 678 %6 = getelementptr inbounds i32, i32* %.013, i64 1 679 store i32 %5, i32* %.013, align 4 680 %7 = add nsw i64 %i.02, 1 681 %exitcond = icmp eq i64 %7, 257 682 br i1 %exitcond, label %8, label %1 683 684; <label>:8 ; preds = %1 685 ret i64 %7 686} 687