1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s  -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -dce -S | FileCheck %s
3
4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5target triple = "x86_64-unknown-linux-gnu"
6
7; PR15794
8; incorrect addition of llvm.mem.parallel_loop_access metadata is undefined
9; behaviour. Vectorizer ignores the memory dependency checks and goes ahead and
10; vectorizes this loop with uniform stores which has an output dependency.
11
12; void foo(int *a, int *b, int k, int m) {
13;   for (int i = 0; i < m; i++) {
14;     for (int j = 0; j < m; j++) {
15;       a[i] = a[i + j + k] + 1; <<<
16;     }
17;     b[i] = b[i] + 3;
18;   }
19; }
20
21; Function Attrs: nounwind uwtable
22define void @foo(i32* nocapture %a, i32* nocapture %b, i32 %k, i32 %m) #0 {
23; CHECK-LABEL: @foo(
24; CHECK-NEXT:  entry:
25; CHECK-NEXT:    [[CMP27:%.*]] = icmp sgt i32 [[M:%.*]], 0
26; CHECK-NEXT:    br i1 [[CMP27]], label [[FOR_BODY3_LR_PH_US_PREHEADER:%.*]], label [[FOR_END15:%.*]]
27; CHECK:       for.body3.lr.ph.us.preheader:
28; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[M]], -1
29; CHECK-NEXT:    [[TMP1:%.*]] = zext i32 [[K:%.*]] to i64
30; CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP0]] to i64
31; CHECK-NEXT:    [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
32; CHECK-NEXT:    br label [[FOR_BODY3_LR_PH_US:%.*]]
33; CHECK:       for.end.us:
34; CHECK-NEXT:    [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDVARS_IV33:%.*]]
35; CHECK-NEXT:    [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX9_US]], align 4, !llvm.mem.parallel_loop_access !0
36; CHECK-NEXT:    [[ADD10_US:%.*]] = add nsw i32 [[TMP4]], 3
37; CHECK-NEXT:    store i32 [[ADD10_US]], i32* [[ARRAYIDX9_US]], align 4, !llvm.mem.parallel_loop_access !0
38; CHECK-NEXT:    [[INDVARS_IV_NEXT34:%.*]] = add i64 [[INDVARS_IV33]], 1
39; CHECK-NEXT:    [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV_NEXT34]] to i32
40; CHECK-NEXT:    [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[M]]
41; CHECK-NEXT:    br i1 [[EXITCOND36]], label [[FOR_END15_LOOPEXIT:%.*]], label [[FOR_BODY3_LR_PH_US]], !llvm.loop [[LOOP2:![0-9]+]]
42; CHECK:       for.body3.us:
43; CHECK-NEXT:    [[INDVARS_IV29:%.*]] = phi i64 [ [[BC_RESUME_VAL:%.*]], [[SCALAR_PH:%.*]] ], [ [[INDVARS_IV_NEXT30:%.*]], [[FOR_BODY3_US:%.*]] ]
44; CHECK-NEXT:    [[TMP5:%.*]] = trunc i64 [[INDVARS_IV29]] to i32
45; CHECK-NEXT:    [[ADD4_US:%.*]] = add i32 [[ADD_US:%.*]], [[TMP5]]
46; CHECK-NEXT:    [[IDXPROM_US:%.*]] = sext i32 [[ADD4_US]] to i64
47; CHECK-NEXT:    [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IDXPROM_US]]
48; CHECK-NEXT:    [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_US]], align 4, !llvm.mem.parallel_loop_access !0
49; CHECK-NEXT:    [[ADD5_US:%.*]] = add nsw i32 [[TMP6]], 1
50; CHECK-NEXT:    store i32 [[ADD5_US]], i32* [[ARRAYIDX7_US:%.*]], align 4, !llvm.mem.parallel_loop_access !0
51; CHECK-NEXT:    [[INDVARS_IV_NEXT30]] = add i64 [[INDVARS_IV29]], 1
52; CHECK-NEXT:    [[LFTR_WIDEIV31:%.*]] = trunc i64 [[INDVARS_IV_NEXT30]] to i32
53; CHECK-NEXT:    [[EXITCOND32:%.*]] = icmp eq i32 [[LFTR_WIDEIV31]], [[M]]
54; CHECK-NEXT:    br i1 [[EXITCOND32]], label [[FOR_END_US:%.*]], label [[FOR_BODY3_US]], !llvm.loop [[LOOP3:![0-9]+]]
55; CHECK:       for.body3.lr.ph.us:
56; CHECK-NEXT:    [[INDVARS_IV33]] = phi i64 [ [[INDVARS_IV_NEXT34]], [[FOR_END_US]] ], [ 0, [[FOR_BODY3_LR_PH_US_PREHEADER]] ]
57; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[TMP1]], [[INDVARS_IV33]]
58; CHECK-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP7]] to i32
59; CHECK-NEXT:    [[TMP9:%.*]] = trunc i64 [[INDVARS_IV33]] to i32
60; CHECK-NEXT:    [[ADD_US]] = add i32 [[TMP9]], [[K]]
61; CHECK-NEXT:    [[ARRAYIDX7_US]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV33]]
62; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 4
63; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH]], label [[VECTOR_SCEVCHECK:%.*]]
64; CHECK:       vector.scevcheck:
65; CHECK-NEXT:    [[TMP10:%.*]] = add i32 [[TMP8]], [[TMP0]]
66; CHECK-NEXT:    [[TMP13:%.*]] = icmp slt i32 [[TMP10]], [[TMP8]]
67; CHECK-NEXT:    br i1 [[TMP13]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
68; CHECK:       vector.ph:
69; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 4
70; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
71; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
72; CHECK:       vector.body:
73; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
74; CHECK-NEXT:    [[TMP16:%.*]] = trunc i64 [[INDEX]] to i32
75; CHECK-NEXT:    [[TMP17:%.*]] = add i32 [[TMP16]], 0
76; CHECK-NEXT:    [[TMP18:%.*]] = add i32 [[ADD_US]], [[TMP17]]
77; CHECK-NEXT:    [[TMP19:%.*]] = sext i32 [[TMP18]] to i64
78; CHECK-NEXT:    [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[TMP19]]
79; CHECK-NEXT:    [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 0
80; CHECK-NEXT:    [[TMP22:%.*]] = bitcast i32* [[TMP21]] to <4 x i32>*
81; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP22]], align 4
82; CHECK-NEXT:    [[TMP23:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
83; CHECK-NEXT:    [[TMP24:%.*]] = extractelement <4 x i32> [[TMP23]], i32 0
84; CHECK-NEXT:    store i32 [[TMP24]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0
85; CHECK-NEXT:    [[TMP25:%.*]] = extractelement <4 x i32> [[TMP23]], i32 1
86; CHECK-NEXT:    store i32 [[TMP25]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0
87; CHECK-NEXT:    [[TMP26:%.*]] = extractelement <4 x i32> [[TMP23]], i32 2
88; CHECK-NEXT:    store i32 [[TMP26]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0
89; CHECK-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP23]], i32 3
90; CHECK-NEXT:    store i32 [[TMP27]], i32* [[ARRAYIDX7_US]], align 4, !llvm.mem.parallel_loop_access !0
91; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
92; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
93; CHECK-NEXT:    br i1 [[TMP28]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
94; CHECK:       middle.block:
95; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
96; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_END_US]], label [[SCALAR_PH]]
97; CHECK:       scalar.ph:
98; CHECK-NEXT:    [[BC_RESUME_VAL]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY3_LR_PH_US]] ], [ 0, [[VECTOR_SCEVCHECK]] ]
99; CHECK-NEXT:    br label [[FOR_BODY3_US]]
100; CHECK:       for.end15.loopexit:
101; CHECK-NEXT:    br label [[FOR_END15]]
102; CHECK:       for.end15:
103; CHECK-NEXT:    ret void
104;
105entry:
106  %cmp27 = icmp sgt i32 %m, 0
107  br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15
108
109for.end.us:                                       ; preds = %for.body3.us
110  %arrayidx9.us = getelementptr inbounds i32, i32* %b, i64 %indvars.iv33
111  %0 = load i32, i32* %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3
112  %add10.us = add nsw i32 %0, 3
113  store i32 %add10.us, i32* %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3
114  %indvars.iv.next34 = add i64 %indvars.iv33, 1
115  %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32
116  %exitcond36 = icmp eq i32 %lftr.wideiv35, %m
117  br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop !5
118
119for.body3.us:                                     ; preds = %for.body3.us, %for.body3.lr.ph.us
120  %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ]
121  %1 = trunc i64 %indvars.iv29 to i32
122  %add4.us = add i32 %add.us, %1
123  %idxprom.us = sext i32 %add4.us to i64
124  %arrayidx.us = getelementptr inbounds i32, i32* %a, i64 %idxprom.us
125  %2 = load i32, i32* %arrayidx.us, align 4, !llvm.mem.parallel_loop_access !3
126  %add5.us = add nsw i32 %2, 1
127  store i32 %add5.us, i32* %arrayidx7.us, align 4, !llvm.mem.parallel_loop_access !3
128  %indvars.iv.next30 = add i64 %indvars.iv29, 1
129  %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32
130  %exitcond32 = icmp eq i32 %lftr.wideiv31, %m
131  br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop !4
132
133for.body3.lr.ph.us:                               ; preds = %for.end.us, %entry
134  %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ]
135  %3 = trunc i64 %indvars.iv33 to i32
136  %add.us = add i32 %3, %k
137  %arrayidx7.us = getelementptr inbounds i32, i32* %a, i64 %indvars.iv33
138  br label %for.body3.us
139
140for.end15:                                        ; preds = %for.end.us, %entry
141  ret void
142}
143
144; Same test as above, but without the invalid parallel_loop_access metadata.
145
146; Here we can see the vectorizer does the mem dep checks and decides it is
147; unsafe to vectorize.
148define void @no-par-mem-metadata(i32* nocapture %a, i32* nocapture %b, i32 %k, i32 %m) #0 {
149; CHECK-LABEL: @no-par-mem-metadata(
150; CHECK-NEXT:  entry:
151; CHECK-NEXT:    [[CMP27:%.*]] = icmp sgt i32 [[M:%.*]], 0
152; CHECK-NEXT:    br i1 [[CMP27]], label [[FOR_BODY3_LR_PH_US_PREHEADER:%.*]], label [[FOR_END15:%.*]]
153; CHECK:       for.body3.lr.ph.us.preheader:
154; CHECK-NEXT:    br label [[FOR_BODY3_LR_PH_US:%.*]]
155; CHECK:       for.end.us:
156; CHECK-NEXT:    [[ARRAYIDX9_US:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDVARS_IV33:%.*]]
157; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX9_US]], align 4
158; CHECK-NEXT:    [[ADD10_US:%.*]] = add nsw i32 [[TMP0]], 3
159; CHECK-NEXT:    store i32 [[ADD10_US]], i32* [[ARRAYIDX9_US]], align 4
160; CHECK-NEXT:    [[INDVARS_IV_NEXT34:%.*]] = add i64 [[INDVARS_IV33]], 1
161; CHECK-NEXT:    [[LFTR_WIDEIV35:%.*]] = trunc i64 [[INDVARS_IV_NEXT34]] to i32
162; CHECK-NEXT:    [[EXITCOND36:%.*]] = icmp eq i32 [[LFTR_WIDEIV35]], [[M]]
163; CHECK-NEXT:    br i1 [[EXITCOND36]], label [[FOR_END15_LOOPEXIT:%.*]], label [[FOR_BODY3_LR_PH_US]], !llvm.loop [[LOOP2]]
164; CHECK:       for.body3.us:
165; CHECK-NEXT:    [[INDVARS_IV29:%.*]] = phi i64 [ 0, [[FOR_BODY3_LR_PH_US]] ], [ [[INDVARS_IV_NEXT30:%.*]], [[FOR_BODY3_US:%.*]] ]
166; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[INDVARS_IV29]] to i32
167; CHECK-NEXT:    [[ADD4_US:%.*]] = add i32 [[ADD_US:%.*]], [[TMP1]]
168; CHECK-NEXT:    [[IDXPROM_US:%.*]] = sext i32 [[ADD4_US]] to i64
169; CHECK-NEXT:    [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IDXPROM_US]]
170; CHECK-NEXT:    [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX_US]], align 4
171; CHECK-NEXT:    [[ADD5_US:%.*]] = add nsw i32 [[TMP2]], 1
172; CHECK-NEXT:    store i32 [[ADD5_US]], i32* [[ARRAYIDX7_US:%.*]], align 4
173; CHECK-NEXT:    [[INDVARS_IV_NEXT30]] = add i64 [[INDVARS_IV29]], 1
174; CHECK-NEXT:    [[LFTR_WIDEIV31:%.*]] = trunc i64 [[INDVARS_IV_NEXT30]] to i32
175; CHECK-NEXT:    [[EXITCOND32:%.*]] = icmp eq i32 [[LFTR_WIDEIV31]], [[M]]
176; CHECK-NEXT:    br i1 [[EXITCOND32]], label [[FOR_END_US:%.*]], label [[FOR_BODY3_US]], !llvm.loop [[LOOP1:![0-9]+]]
177; CHECK:       for.body3.lr.ph.us:
178; CHECK-NEXT:    [[INDVARS_IV33]] = phi i64 [ [[INDVARS_IV_NEXT34]], [[FOR_END_US]] ], [ 0, [[FOR_BODY3_LR_PH_US_PREHEADER]] ]
179; CHECK-NEXT:    [[TMP3:%.*]] = trunc i64 [[INDVARS_IV33]] to i32
180; CHECK-NEXT:    [[ADD_US]] = add i32 [[TMP3]], [[K:%.*]]
181; CHECK-NEXT:    [[ARRAYIDX7_US]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV33]]
182; CHECK-NEXT:    br label [[FOR_BODY3_US]]
183; CHECK:       for.end15.loopexit:
184; CHECK-NEXT:    br label [[FOR_END15]]
185; CHECK:       for.end15:
186; CHECK-NEXT:    ret void
187;
188entry:
189  %cmp27 = icmp sgt i32 %m, 0
190  br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15
191
192for.end.us:                                       ; preds = %for.body3.us
193  %arrayidx9.us = getelementptr inbounds i32, i32* %b, i64 %indvars.iv33
194  %0 = load i32, i32* %arrayidx9.us, align 4
195  %add10.us = add nsw i32 %0, 3
196  store i32 %add10.us, i32* %arrayidx9.us, align 4
197  %indvars.iv.next34 = add i64 %indvars.iv33, 1
198  %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32
199  %exitcond36 = icmp eq i32 %lftr.wideiv35, %m
200  br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop !5
201
202for.body3.us:                                     ; preds = %for.body3.us, %for.body3.lr.ph.us
203  %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ]
204  %1 = trunc i64 %indvars.iv29 to i32
205  %add4.us = add i32 %add.us, %1
206  %idxprom.us = sext i32 %add4.us to i64
207  %arrayidx.us = getelementptr inbounds i32, i32* %a, i64 %idxprom.us
208  %2 = load i32, i32* %arrayidx.us, align 4
209  %add5.us = add nsw i32 %2, 1
210  store i32 %add5.us, i32* %arrayidx7.us, align 4
211  %indvars.iv.next30 = add i64 %indvars.iv29, 1
212  %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32
213  %exitcond32 = icmp eq i32 %lftr.wideiv31, %m
214  br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop !4
215
216for.body3.lr.ph.us:                               ; preds = %for.end.us, %entry
217  %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ]
218  %3 = trunc i64 %indvars.iv33 to i32
219  %add.us = add i32 %3, %k
220  %arrayidx7.us = getelementptr inbounds i32, i32* %a, i64 %indvars.iv33
221  br label %for.body3.us
222
223for.end15:                                        ; preds = %for.end.us, %entry
224  ret void
225}
226
227attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
228
229!3 = !{!4, !5}
230!4 = !{!4}
231!5 = !{!5}
232
233