1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 5target triple = "x86_64-apple-macosx10.8.0" 6 7define i32 @conversion_cost1(i32 %n, i8* nocapture %A, float* nocapture %B) nounwind uwtable ssp { 8; CHECK-LABEL: @conversion_cost1( 9; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 3 10; CHECK-NEXT: br i1 [[TMP1]], label [[DOTLR_PH_PREHEADER:%.*]], label [[DOT_CRIT_EDGE:%.*]] 11; CHECK: .lr.ph.preheader: 12; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[N]], -4 13; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 14; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1 15; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 32 16; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 17; CHECK: vector.ph: 18; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 32 19; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]] 20; CHECK-NEXT: [[IND_END:%.*]] = add i64 3, [[N_VEC]] 21; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 22; CHECK: vector.body: 23; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 24; CHECK-NEXT: [[VEC_IND:%.*]] = phi <32 x i64> [ <i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15, i64 16, i64 17, i64 18, i64 19, i64 20, i64 21, i64 22, i64 23, i64 24, i64 25, i64 26, i64 27, i64 28, i64 29, i64 30, i64 31, i64 32, i64 33, i64 34>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 25; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <32 x i8> [ <i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT2:%.*]], [[VECTOR_BODY]] ] 26; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 3, [[INDEX]] 27; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 0 28; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 1 29; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 2 30; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 3 31; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 4 32; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 5 33; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 6 34; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 7 35; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[OFFSET_IDX]], 8 36; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[OFFSET_IDX]], 9 37; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 10 38; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[OFFSET_IDX]], 11 39; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[OFFSET_IDX]], 12 40; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[OFFSET_IDX]], 13 41; CHECK-NEXT: [[TMP19:%.*]] = add i64 [[OFFSET_IDX]], 14 42; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[OFFSET_IDX]], 15 43; CHECK-NEXT: [[TMP21:%.*]] = add i64 [[OFFSET_IDX]], 16 44; CHECK-NEXT: [[TMP22:%.*]] = add i64 [[OFFSET_IDX]], 17 45; CHECK-NEXT: [[TMP23:%.*]] = add i64 [[OFFSET_IDX]], 18 46; CHECK-NEXT: [[TMP24:%.*]] = add i64 [[OFFSET_IDX]], 19 47; CHECK-NEXT: [[TMP25:%.*]] = add i64 [[OFFSET_IDX]], 20 48; CHECK-NEXT: [[TMP26:%.*]] = add i64 [[OFFSET_IDX]], 21 49; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OFFSET_IDX]], 22 50; CHECK-NEXT: [[TMP28:%.*]] = add i64 [[OFFSET_IDX]], 23 51; CHECK-NEXT: [[TMP29:%.*]] = add i64 [[OFFSET_IDX]], 24 52; CHECK-NEXT: [[TMP30:%.*]] = add i64 [[OFFSET_IDX]], 25 53; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[OFFSET_IDX]], 26 54; CHECK-NEXT: [[TMP32:%.*]] = add i64 [[OFFSET_IDX]], 27 55; CHECK-NEXT: [[TMP33:%.*]] = add i64 [[OFFSET_IDX]], 28 56; CHECK-NEXT: [[TMP34:%.*]] = add i64 [[OFFSET_IDX]], 29 57; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[OFFSET_IDX]], 30 58; CHECK-NEXT: [[TMP36:%.*]] = add i64 [[OFFSET_IDX]], 31 59; CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds i8, i8* [[A:%.*]], i64 [[TMP5]] 60; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds i8, i8* [[TMP37]], i32 0 61; CHECK-NEXT: [[TMP39:%.*]] = bitcast i8* [[TMP38]] to <32 x i8>* 62; CHECK-NEXT: store <32 x i8> [[VEC_IND1]], <32 x i8>* [[TMP39]], align 1 63; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32 64; CHECK-NEXT: [[VEC_IND_NEXT]] = add <32 x i64> [[VEC_IND]], <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32> 65; CHECK-NEXT: [[VEC_IND_NEXT2]] = add <32 x i8> [[VEC_IND1]], <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32> 66; CHECK-NEXT: [[TMP40:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 67; CHECK-NEXT: br i1 [[TMP40]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 68; CHECK: middle.block: 69; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]] 70; CHECK-NEXT: br i1 [[CMP_N]], label [[DOT_CRIT_EDGE_LOOPEXIT:%.*]], label [[SCALAR_PH]] 71; CHECK: scalar.ph: 72; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 3, [[DOTLR_PH_PREHEADER]] ] 73; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 74; CHECK: .lr.ph: 75; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[DOTLR_PH]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 76; CHECK-NEXT: [[TMP41:%.*]] = trunc i64 [[INDVARS_IV]] to i8 77; CHECK-NEXT: [[TMP42:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[INDVARS_IV]] 78; CHECK-NEXT: store i8 [[TMP41]], i8* [[TMP42]], align 1 79; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1 80; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 81; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] 82; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE_LOOPEXIT]], label [[DOTLR_PH]], !llvm.loop [[LOOP2:![0-9]+]] 83; CHECK: ._crit_edge.loopexit: 84; CHECK-NEXT: br label [[DOT_CRIT_EDGE]] 85; CHECK: ._crit_edge: 86; CHECK-NEXT: ret i32 undef 87; 88 %1 = icmp sgt i32 %n, 3 89 br i1 %1, label %.lr.ph, label %._crit_edge 90 91.lr.ph: ; preds = %0, %.lr.ph 92 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 3, %0 ] 93 %2 = trunc i64 %indvars.iv to i8 94 %3 = getelementptr inbounds i8, i8* %A, i64 %indvars.iv 95 store i8 %2, i8* %3, align 1 96 %indvars.iv.next = add i64 %indvars.iv, 1 97 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 98 %exitcond = icmp eq i32 %lftr.wideiv, %n 99 br i1 %exitcond, label %._crit_edge, label %.lr.ph 100 101._crit_edge: ; preds = %.lr.ph, %0 102 ret i32 undef 103} 104 105define i32 @conversion_cost2(i32 %n, i8* nocapture %A, float* nocapture %B) nounwind uwtable ssp { 106; CHECK-LABEL: @conversion_cost2( 107; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 9 108; CHECK-NEXT: br i1 [[TMP1]], label [[DOTLR_PH_PREHEADER:%.*]], label [[DOT_CRIT_EDGE:%.*]] 109; CHECK: .lr.ph.preheader: 110; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[N]], -10 111; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 112; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1 113; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP4]], 8 114; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 115; CHECK: vector.ph: 116; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 8 117; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP4]], [[N_MOD_VF]] 118; CHECK-NEXT: [[IND_END:%.*]] = add i64 9, [[N_VEC]] 119; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 120; CHECK: vector.body: 121; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 122; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 9, i64 10>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] 123; CHECK-NEXT: [[STEP_ADD:%.*]] = add <2 x i64> [[VEC_IND]], <i64 2, i64 2> 124; CHECK-NEXT: [[STEP_ADD1:%.*]] = add <2 x i64> [[STEP_ADD]], <i64 2, i64 2> 125; CHECK-NEXT: [[STEP_ADD2:%.*]] = add <2 x i64> [[STEP_ADD1]], <i64 2, i64 2> 126; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 9, [[INDEX]] 127; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[OFFSET_IDX]], 0 128; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[OFFSET_IDX]], 1 129; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 2 130; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 3 131; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[OFFSET_IDX]], 4 132; CHECK-NEXT: [[TMP10:%.*]] = add i64 [[OFFSET_IDX]], 5 133; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 6 134; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 7 135; CHECK-NEXT: [[TMP13:%.*]] = add nsw <2 x i64> [[VEC_IND]], <i64 3, i64 3> 136; CHECK-NEXT: [[TMP14:%.*]] = add nsw <2 x i64> [[STEP_ADD]], <i64 3, i64 3> 137; CHECK-NEXT: [[TMP15:%.*]] = add nsw <2 x i64> [[STEP_ADD1]], <i64 3, i64 3> 138; CHECK-NEXT: [[TMP16:%.*]] = add nsw <2 x i64> [[STEP_ADD2]], <i64 3, i64 3> 139; CHECK-NEXT: [[TMP17:%.*]] = sitofp <2 x i64> [[TMP13]] to <2 x float> 140; CHECK-NEXT: [[TMP18:%.*]] = sitofp <2 x i64> [[TMP14]] to <2 x float> 141; CHECK-NEXT: [[TMP19:%.*]] = sitofp <2 x i64> [[TMP15]] to <2 x float> 142; CHECK-NEXT: [[TMP20:%.*]] = sitofp <2 x i64> [[TMP16]] to <2 x float> 143; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[TMP5]] 144; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP7]] 145; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP9]] 146; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[TMP11]] 147; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds float, float* [[TMP21]], i32 0 148; CHECK-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to <2 x float>* 149; CHECK-NEXT: store <2 x float> [[TMP17]], <2 x float>* [[TMP26]], align 4 150; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds float, float* [[TMP21]], i32 2 151; CHECK-NEXT: [[TMP28:%.*]] = bitcast float* [[TMP27]] to <2 x float>* 152; CHECK-NEXT: store <2 x float> [[TMP18]], <2 x float>* [[TMP28]], align 4 153; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds float, float* [[TMP21]], i32 4 154; CHECK-NEXT: [[TMP30:%.*]] = bitcast float* [[TMP29]] to <2 x float>* 155; CHECK-NEXT: store <2 x float> [[TMP19]], <2 x float>* [[TMP30]], align 4 156; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds float, float* [[TMP21]], i32 6 157; CHECK-NEXT: [[TMP32:%.*]] = bitcast float* [[TMP31]] to <2 x float>* 158; CHECK-NEXT: store <2 x float> [[TMP20]], <2 x float>* [[TMP32]], align 4 159; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 160; CHECK-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[STEP_ADD2]], <i64 2, i64 2> 161; CHECK-NEXT: [[TMP33:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 162; CHECK-NEXT: br i1 [[TMP33]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] 163; CHECK: middle.block: 164; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]] 165; CHECK-NEXT: br i1 [[CMP_N]], label [[DOT_CRIT_EDGE_LOOPEXIT:%.*]], label [[SCALAR_PH]] 166; CHECK: scalar.ph: 167; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 9, [[DOTLR_PH_PREHEADER]] ] 168; CHECK-NEXT: br label [[DOTLR_PH:%.*]] 169; CHECK: .lr.ph: 170; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[DOTLR_PH]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 171; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[INDVARS_IV]], 3 172; CHECK-NEXT: [[TOFP:%.*]] = sitofp i64 [[ADD]] to float 173; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[INDVARS_IV]] 174; CHECK-NEXT: store float [[TOFP]], float* [[GEP]], align 4 175; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1 176; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 177; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[N]] 178; CHECK-NEXT: br i1 [[EXITCOND]], label [[DOT_CRIT_EDGE_LOOPEXIT]], label [[DOTLR_PH]], !llvm.loop [[LOOP5:![0-9]+]] 179; CHECK: ._crit_edge.loopexit: 180; CHECK-NEXT: br label [[DOT_CRIT_EDGE]] 181; CHECK: ._crit_edge: 182; CHECK-NEXT: ret i32 undef 183; 184 %1 = icmp sgt i32 %n, 9 185 br i1 %1, label %.lr.ph, label %._crit_edge 186 187.lr.ph: ; preds = %0, %.lr.ph 188 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 9, %0 ] 189 %add = add nsw i64 %indvars.iv, 3 190 %tofp = sitofp i64 %add to float 191 %gep = getelementptr inbounds float, float* %B, i64 %indvars.iv 192 store float %tofp, float* %gep, align 4 193 %indvars.iv.next = add i64 %indvars.iv, 1 194 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 195 %exitcond = icmp eq i32 %lftr.wideiv, %n 196 br i1 %exitcond, label %._crit_edge, label %.lr.ph 197 198._crit_edge: ; preds = %.lr.ph, %0 199 ret i32 undef 200} 201