1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -loop-vectorize -instcombine -simplifycfg < %s -S -o - | FileCheck %s --check-prefix=CHECK 3; RUN: opt -loop-vectorize -debug-only=loop-vectorize -disable-output < %s 2>&1 | FileCheck %s --check-prefix=CHECK-COST 4; REQUIRES: asserts 5 6target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 7target triple = "thumbv8.1m.main-arm-none-eabi" 8 9; CHECK-COST-LABEL: arm_offset_q15 10; CHECK-COST: Found an estimated cost of 10 for VF 1 For instruction: %1 = tail call i16 @llvm.sadd.sat.i16(i16 %0, i16 %offset) 11; CHECK-COST: Found an estimated cost of 36 for VF 2 For instruction: %1 = tail call i16 @llvm.sadd.sat.i16(i16 %0, i16 %offset) 12; CHECK-COST: Found an estimated cost of 8 for VF 4 For instruction: %1 = tail call i16 @llvm.sadd.sat.i16(i16 %0, i16 %offset) 13; CHECK-COST: Found an estimated cost of 2 for VF 8 For instruction: %1 = tail call i16 @llvm.sadd.sat.i16(i16 %0, i16 %offset) 14 15define void @arm_offset_q15(i16* nocapture readonly %pSrc, i16 signext %offset, i16* nocapture noalias %pDst, i32 %blockSize) #0 { 16; CHECK-LABEL: @arm_offset_q15( 17; CHECK-NEXT: entry: 18; CHECK-NEXT: [[CMP_NOT6:%.*]] = icmp eq i32 [[BLOCKSIZE:%.*]], 0 19; CHECK-NEXT: br i1 [[CMP_NOT6]], label [[WHILE_END:%.*]], label [[VECTOR_PH:%.*]] 20; CHECK: vector.ph: 21; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 [[BLOCKSIZE]], 7 22; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N_RND_UP]], -8 23; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <8 x i16> poison, i16 [[OFFSET:%.*]], i32 0 24; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT8]], <8 x i16> poison, <8 x i32> zeroinitializer 25; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 26; CHECK: vector.body: 27; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 28; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i16, i16* [[PSRC:%.*]], i32 [[INDEX]] 29; CHECK-NEXT: [[NEXT_GEP5:%.*]] = getelementptr i16, i16* [[PDST:%.*]], i32 [[INDEX]] 30; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 [[INDEX]], i32 [[BLOCKSIZE]]) 31; CHECK-NEXT: [[TMP0:%.*]] = bitcast i16* [[NEXT_GEP]] to <8 x i16>* 32; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* [[TMP0]], i32 2, <8 x i1> [[ACTIVE_LANE_MASK]], <8 x i16> poison) 33; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> [[WIDE_MASKED_LOAD]], <8 x i16> [[BROADCAST_SPLAT9]]) 34; CHECK-NEXT: [[TMP2:%.*]] = bitcast i16* [[NEXT_GEP5]] to <8 x i16>* 35; CHECK-NEXT: call void @llvm.masked.store.v8i16.p0v8i16(<8 x i16> [[TMP1]], <8 x i16>* [[TMP2]], i32 2, <8 x i1> [[ACTIVE_LANE_MASK]]) 36; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 37; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] 38; CHECK-NEXT: br i1 [[TMP3]], label [[WHILE_END]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]] 39; CHECK: while.end: 40; CHECK-NEXT: ret void 41; 42entry: 43 %cmp.not6 = icmp eq i32 %blockSize, 0 44 br i1 %cmp.not6, label %while.end, label %while.body 45 46while.body: ; preds = %entry, %while.body 47 %blkCnt.09 = phi i32 [ %dec, %while.body ], [ %blockSize, %entry ] 48 %pSrc.addr.08 = phi i16* [ %incdec.ptr, %while.body ], [ %pSrc, %entry ] 49 %pDst.addr.07 = phi i16* [ %incdec.ptr3, %while.body ], [ %pDst, %entry ] 50 %incdec.ptr = getelementptr inbounds i16, i16* %pSrc.addr.08, i32 1 51 %0 = load i16, i16* %pSrc.addr.08, align 2 52 %1 = tail call i16 @llvm.sadd.sat.i16(i16 %0, i16 %offset) 53 %incdec.ptr3 = getelementptr inbounds i16, i16* %pDst.addr.07, i32 1 54 store i16 %1, i16* %pDst.addr.07, align 2 55 %dec = add i32 %blkCnt.09, -1 56 %cmp.not = icmp eq i32 %dec, 0 57 br i1 %cmp.not, label %while.end, label %while.body 58 59while.end: ; preds = %while.body, %entry 60 ret void 61} 62 63declare i16 @llvm.sadd.sat.i16(i16, i16) 64 65attributes #0 = { "target-features"="+mve" } 66