1*cee313d2SEric Christopher; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=fiji -loop-vectorize < %s | FileCheck %s
2*cee313d2SEric Christopher
3*cee313d2SEric Christopher
4*cee313d2SEric Christopher; For AMDGPU, loop unroll in loop vectorizer is disabled when VF==1.
5*cee313d2SEric Christopher;
6*cee313d2SEric Christopher; CHECK-LABEL: @small_loop(
7*cee313d2SEric Christopher; CHECK: store i32
8*cee313d2SEric Christopher; CHECK-NOT: store i32
9*cee313d2SEric Christopher; CHECK: ret
10*cee313d2SEric Christopherdefine amdgpu_kernel void @small_loop(i32* nocapture %inArray, i32 %size) nounwind {
11*cee313d2SEric Christopherentry:
12*cee313d2SEric Christopher  %0 = icmp sgt i32 %size, 0
13*cee313d2SEric Christopher  br i1 %0, label %loop, label %exit
14*cee313d2SEric Christopher
15*cee313d2SEric Christopherloop:                                          ; preds = %entry, %loop
16*cee313d2SEric Christopher  %iv = phi i32 [ %iv1, %loop ], [ 0, %entry ]
17*cee313d2SEric Christopher  %1 = getelementptr inbounds i32, i32* %inArray, i32 %iv
18*cee313d2SEric Christopher  %2 = load i32, i32* %1, align 4
19*cee313d2SEric Christopher  %3 = add nsw i32 %2, 6
20*cee313d2SEric Christopher  store i32 %3, i32* %1, align 4
21*cee313d2SEric Christopher  %iv1 = add i32 %iv, 1
22*cee313d2SEric Christopher;  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
23*cee313d2SEric Christopher  %cond = icmp eq i32 %iv1, %size
24*cee313d2SEric Christopher  br i1 %cond, label %exit, label %loop
25*cee313d2SEric Christopher
26*cee313d2SEric Christopherexit:                                         ; preds = %loop, %entry
27*cee313d2SEric Christopher  ret void
28*cee313d2SEric Christopher}
29