1; Test VLA for reverse with fixed size vector
2; This is the loop in c++ being vectorize in this file with
3; shuffle reverse
4;  #pragma clang loop vectorize_width(8, fixed)
5;  for (int i = N-1; i >= 0; --i)
6;    a[i] = b[i] + 1.0;
7
8; RUN: opt -loop-vectorize -dce  -mtriple aarch64-linux-gnu -S < %s 2>%t | FileCheck %s
9
10; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
11
12; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.$
13; WARN-NOT: warning
14
15define void @vector_reverse_f64(i64 %N, double* %a, double* %b) #0 {
16; CHECK-LABEL: vector_reverse_f64
17; CHECK-LABEL: vector.body
18; CHECK: %[[GEP:.*]] = getelementptr inbounds double, double* %{{.*}}, i32 0
19; CHECK-NEXT: %[[GEP1:.*]] = getelementptr inbounds double, double* %[[GEP]], i32 -7
20; CHECK-NEXT: %[[CAST:.*]] = bitcast double* %[[GEP1]] to <8 x double>*
21; CHECK-NEXT: %[[WIDE:.*]] = load <8 x double>, <8 x double>* %[[CAST]], align 8
22; CHECK-NEXT: %[[REVERSE:.*]] = shufflevector <8 x double> %[[WIDE]], <8 x double> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
23; CHECK-NEXT: %[[FADD:.*]] = fadd <8 x double> %[[REVERSE]]
24; CHECK-NEXT: %[[GEP2:.*]] = getelementptr inbounds double, double* {{.*}}, i64 {{.*}}
25; CHECK-NEXT: %[[REVERSE6:.*]] = shufflevector <8 x double> %[[FADD]], <8 x double> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
26; CHECK-NEXT: %[[GEP3:.*]] = getelementptr inbounds double, double* %[[GEP2]], i32 0
27; CHECK-NEXT: %[[GEP4:.*]] = getelementptr inbounds double, double* %[[GEP3]], i32 -7
28; CHECK-NEXT: %[[CAST:.*]] = bitcast double* %[[GEP4]] to <8 x double>*
29; CHECK-NEXT:  store <8 x double> %[[REVERSE6]], <8 x double>* %[[CAST]], align 8
30
31entry:
32  %cmp7 = icmp sgt i64 %N, 0
33  br i1 %cmp7, label %for.body, label %for.cond.cleanup
34
35for.cond.cleanup:                                 ; preds = %for.cond.cleanup, %entry
36  ret void
37
38for.body:                                         ; preds = %entry, %for.body
39  %i.08.in = phi i64 [ %i.08, %for.body ], [ %N, %entry ]
40  %i.08 = add nsw i64 %i.08.in, -1
41  %arrayidx = getelementptr inbounds double, double* %b, i64 %i.08
42  %0 = load double, double* %arrayidx, align 8
43  %add = fadd double %0, 1.000000e+00
44  %arrayidx1 = getelementptr inbounds double, double* %a, i64 %i.08
45  store double %add, double* %arrayidx1, align 8
46  %cmp = icmp sgt i64 %i.08.in, 1
47  br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
48}
49
50define void @vector_reverse_i64(i64 %N, i64* %a, i64* %b) #0 {
51; CHECK-LABEL: vector_reverse_i64
52; CHECK-LABEL: vector.body
53; CHECK: %[[GEP:.*]] = getelementptr inbounds i64, i64* %{{.*}}, i32 0
54; CHECK-NEXT: %[[GEP1:.*]] = getelementptr inbounds i64, i64* %[[GEP]], i32 -7
55; CHECK-NEXT: %[[CAST:.*]] = bitcast i64* %[[GEP1]] to <8 x i64>*
56; CHECK-NEXT: %[[WIDE:.*]] = load <8 x i64>, <8 x i64>* %[[CAST]], align 8
57; CHECK-NEXT: %[[REVERSE:.*]] = shufflevector <8 x i64> %[[WIDE]], <8 x i64> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
58; CHECK-NEXT: %[[FADD:.*]] = add <8 x i64> %[[REVERSE]]
59; CHECK-NEXT: %[[GEP2:.*]] = getelementptr inbounds i64, i64* {{.*}}, i64 {{.*}}
60; CHECK-NEXT: %[[REVERSE6:.*]] = shufflevector <8 x i64> %[[FADD]], <8 x i64> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
61; CHECK-NEXT: %[[GEP3:.*]] = getelementptr inbounds i64, i64* %[[GEP2]], i32 0
62; CHECK-NEXT: %[[GEP4:.*]] = getelementptr inbounds i64, i64* %[[GEP3]], i32 -7
63; CHECK-NEXT: %[[CAST1:.*]] = bitcast i64* %[[GEP4]] to <8 x i64>*
64; CHECK-NEXT:  store <8 x i64> %[[REVERSE6]], <8 x i64>* %[[CAST1]], align 8
65
66entry:
67  %cmp8 = icmp sgt i64 %N, 0
68  br i1 %cmp8, label %for.body, label %for.cond.cleanup
69
70for.cond.cleanup:                                 ; preds = %for.cond.cleanup, %entry
71  ret void
72
73for.body:                                         ; preds = %entry, %for.body
74  %i.09.in = phi i64 [ %i.09, %for.body ], [ %N, %entry ]
75  %i.09 = add nsw i64 %i.09.in, -1
76  %arrayidx = getelementptr inbounds i64, i64* %b, i64 %i.09
77  %0 = load i64, i64* %arrayidx, align 8
78  %add = add i64 %0, 1
79  %arrayidx2 = getelementptr inbounds i64, i64* %a, i64 %i.09
80  store i64 %add, i64* %arrayidx2, align 8
81  %cmp = icmp sgt i64 %i.09.in, 1
82  br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
83}
84
85attributes #0 = { "target-cpu"="generic" "target-features"="+neon,+sve" }
86
87!0 = distinct !{!0, !1, !2, !3, !4}
88!1 = !{!"llvm.loop.mustprogress"}
89!2 = !{!"llvm.loop.vectorize.width", i32 8}
90!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
91!4 = !{!"llvm.loop.vectorize.enable", i1 true}
92