1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -mtriple aarch64-linux-gnu -mattr=+sve -loop-vectorize -dce -instcombine -S \ 3; RUN: -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck %s 4 5; Ensure that we can vectorize loops such as: 6; int *ptr = c; 7; for (long long i = 0; i < n; i++) { 8; int X1 = *ptr++; 9; int X2 = *ptr++; 10; a[i] = X1 + 1; 11; b[i] = X2 + 1; 12; } 13; with scalable vectors, including unrolling. The test below makes sure 14; that we can use gather instructions with the correct offsets, taking 15; vscale into account. 16 17define void @widen_ptr_phi_unrolled(i32* noalias nocapture %a, i32* noalias nocapture %b, i32* nocapture readonly %c, i64 %n) #0 { 18; CHECK-LABEL: @widen_ptr_phi_unrolled( 19; CHECK-NEXT: entry: 20; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() 21; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 22; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ugt i64 [[TMP1]], [[N:%.*]] 23; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 24; CHECK: vector.ph: 25; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() 26; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 3 27; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] 28; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] 29; CHECK-NEXT: [[TMP4:%.*]] = shl i64 [[N_VEC]], 1 30; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[C:%.*]], i64 [[TMP4]] 31; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 32; CHECK: vector.body: 33; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi i32* [ [[C]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ] 34; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 35; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() 36; CHECK-NEXT: [[TMP6:%.*]] = shl nuw nsw i64 [[TMP5]], 2 37; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[TMP5]], 4 38; CHECK-NEXT: [[TMP8:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 39; CHECK-NEXT: [[VECTOR_GEP:%.*]] = shl <vscale x 4 x i64> [[TMP8]], shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 1, i32 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer) 40; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i32, i32* [[POINTER_PHI]], <vscale x 4 x i64> [[VECTOR_GEP]] 41; CHECK-NEXT: [[DOTSPLATINSERT2:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP6]], i64 0 42; CHECK-NEXT: [[DOTSPLAT3:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT2]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer 43; CHECK-NEXT: [[TMP10:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 44; CHECK-NEXT: [[TMP11:%.*]] = add <vscale x 4 x i64> [[DOTSPLAT3]], [[TMP10]] 45; CHECK-NEXT: [[VECTOR_GEP4:%.*]] = shl <vscale x 4 x i64> [[TMP11]], shufflevector (<vscale x 4 x i64> insertelement (<vscale x 4 x i64> poison, i64 1, i32 0), <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer) 46; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i32, i32* [[POINTER_PHI]], <vscale x 4 x i64> [[VECTOR_GEP4]] 47; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, <vscale x 4 x i32*> [[TMP9]], i64 1 48; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, <vscale x 4 x i32*> [[TMP12]], i64 1 49; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> [[TMP9]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i32 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32> undef) 50; CHECK-NEXT: [[WIDE_MASKED_GATHER5:%.*]] = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> [[TMP12]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i32 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32> undef) 51; CHECK-NEXT: [[WIDE_MASKED_GATHER6:%.*]] = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> [[TMP13]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i32 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32> undef) 52; CHECK-NEXT: [[WIDE_MASKED_GATHER7:%.*]] = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> [[TMP14]], i32 4, <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i32 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32> undef) 53; CHECK-NEXT: [[TMP15:%.*]] = add nsw <vscale x 4 x i32> [[WIDE_MASKED_GATHER]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer) 54; CHECK-NEXT: [[TMP16:%.*]] = add nsw <vscale x 4 x i32> [[WIDE_MASKED_GATHER5]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer) 55; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDEX]] 56; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32* [[TMP17]] to <vscale x 4 x i32>* 57; CHECK-NEXT: store <vscale x 4 x i32> [[TMP15]], <vscale x 4 x i32>* [[TMP18]], align 4 58; CHECK-NEXT: [[TMP19:%.*]] = call i32 @llvm.vscale.i32() 59; CHECK-NEXT: [[TMP20:%.*]] = shl nuw nsw i32 [[TMP19]], 2 60; CHECK-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64 61; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 [[TMP21]] 62; CHECK-NEXT: [[TMP23:%.*]] = bitcast i32* [[TMP22]] to <vscale x 4 x i32>* 63; CHECK-NEXT: store <vscale x 4 x i32> [[TMP16]], <vscale x 4 x i32>* [[TMP23]], align 4 64; CHECK-NEXT: [[TMP24:%.*]] = add nsw <vscale x 4 x i32> [[WIDE_MASKED_GATHER6]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer) 65; CHECK-NEXT: [[TMP25:%.*]] = add nsw <vscale x 4 x i32> [[WIDE_MASKED_GATHER7]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer) 66; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDEX]] 67; CHECK-NEXT: [[TMP27:%.*]] = bitcast i32* [[TMP26]] to <vscale x 4 x i32>* 68; CHECK-NEXT: store <vscale x 4 x i32> [[TMP24]], <vscale x 4 x i32>* [[TMP27]], align 4 69; CHECK-NEXT: [[TMP28:%.*]] = call i32 @llvm.vscale.i32() 70; CHECK-NEXT: [[TMP29:%.*]] = shl nuw nsw i32 [[TMP28]], 2 71; CHECK-NEXT: [[TMP30:%.*]] = zext i32 [[TMP29]] to i64 72; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[TMP30]] 73; CHECK-NEXT: [[TMP32:%.*]] = bitcast i32* [[TMP31]] to <vscale x 4 x i32>* 74; CHECK-NEXT: store <vscale x 4 x i32> [[TMP25]], <vscale x 4 x i32>* [[TMP32]], align 4 75; CHECK-NEXT: [[TMP33:%.*]] = call i64 @llvm.vscale.i64() 76; CHECK-NEXT: [[TMP34:%.*]] = shl nuw nsw i64 [[TMP33]], 3 77; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP34]] 78; CHECK-NEXT: [[PTR_IND]] = getelementptr i32, i32* [[POINTER_PHI]], i64 [[TMP7]] 79; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 80; CHECK-NEXT: br i1 [[TMP35]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] 81; CHECK: middle.block: 82; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 83; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]] 84; CHECK: scalar.ph: 85; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32* [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[C]], [[ENTRY:%.*]] ] 86; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 87; CHECK-NEXT: br label [[FOR_BODY:%.*]] 88; CHECK: for.body: 89; CHECK-NEXT: [[PTR_014:%.*]] = phi i32* [ [[INCDEC_PTR1:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 90; CHECK-NEXT: [[I_013:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ] 91; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR_014]], i64 1 92; CHECK-NEXT: [[TMP36:%.*]] = load i32, i32* [[PTR_014]], align 4 93; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i32, i32* [[PTR_014]], i64 2 94; CHECK-NEXT: [[TMP37:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4 95; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP36]], 1 96; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I_013]] 97; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX]], align 4 98; CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP37]], 1 99; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 [[I_013]] 100; CHECK-NEXT: store i32 [[ADD2]], i32* [[ARRAYIDX3]], align 4 101; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_013]], 1 102; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]] 103; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_EXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] 104; CHECK: for.exit: 105; CHECK-NEXT: ret void 106; 107entry: 108 br label %for.body 109 110for.body: ; preds = %entry, %for.body 111 %ptr.014 = phi i32* [ %incdec.ptr1, %for.body ], [ %c, %entry ] 112 %i.013 = phi i64 [ %inc, %for.body ], [ 0, %entry ] 113 %incdec.ptr = getelementptr inbounds i32, i32* %ptr.014, i64 1 114 %0 = load i32, i32* %ptr.014, align 4 115 %incdec.ptr1 = getelementptr inbounds i32, i32* %ptr.014, i64 2 116 %1 = load i32, i32* %incdec.ptr, align 4 117 %add = add nsw i32 %0, 1 118 %arrayidx = getelementptr inbounds i32, i32* %a, i64 %i.013 119 store i32 %add, i32* %arrayidx, align 4 120 %add2 = add nsw i32 %1, 1 121 %arrayidx3 = getelementptr inbounds i32, i32* %b, i64 %i.013 122 store i32 %add2, i32* %arrayidx3, align 4 123 %inc = add nuw nsw i64 %i.013, 1 124 %exitcond.not = icmp eq i64 %inc, %n 125 br i1 %exitcond.not, label %for.exit, label %for.body, !llvm.loop !0 126 127for.exit: ; preds = %for.body 128 ret void 129} 130 131 132; Ensure we can vectorise loops without interleaving, e.g.: 133; int *D = dst; 134; int *S = src; 135; for (long long i = 0; i < n; i++) { 136; *D = *S * 2; 137; D++; 138; S++; 139; } 140; This takes us down a different codepath to the test above, where 141; here we treat the PHIs as being uniform. 142 143define void @widen_2ptrs_phi_unrolled(i32* noalias nocapture %dst, i32* noalias nocapture readonly %src, i64 %n) #0 { 144; CHECK-LABEL: @widen_2ptrs_phi_unrolled( 145; CHECK-NEXT: entry: 146; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() 147; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 3 148; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ugt i64 [[TMP1]], [[N:%.*]] 149; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 150; CHECK: vector.ph: 151; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() 152; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 3 153; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] 154; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] 155; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[SRC:%.*]], i64 [[N_VEC]] 156; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i32, i32* [[DST:%.*]], i64 [[N_VEC]] 157; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 158; CHECK: vector.body: 159; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 160; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i32, i32* [[SRC]], i64 [[INDEX]] 161; CHECK-NEXT: [[NEXT_GEP5:%.*]] = getelementptr i32, i32* [[DST]], i64 [[INDEX]] 162; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[NEXT_GEP]] to <vscale x 4 x i32>* 163; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[TMP4]], align 4 164; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.vscale.i32() 165; CHECK-NEXT: [[TMP6:%.*]] = shl nuw nsw i32 [[TMP5]], 2 166; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 167; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i32, i32* [[NEXT_GEP]], i64 [[TMP7]] 168; CHECK-NEXT: [[TMP9:%.*]] = bitcast i32* [[TMP8]] to <vscale x 4 x i32>* 169; CHECK-NEXT: [[WIDE_LOAD7:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[TMP9]], align 4 170; CHECK-NEXT: [[TMP10:%.*]] = shl nsw <vscale x 4 x i32> [[WIDE_LOAD]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer) 171; CHECK-NEXT: [[TMP11:%.*]] = shl nsw <vscale x 4 x i32> [[WIDE_LOAD7]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer) 172; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32* [[NEXT_GEP5]] to <vscale x 4 x i32>* 173; CHECK-NEXT: store <vscale x 4 x i32> [[TMP10]], <vscale x 4 x i32>* [[TMP12]], align 4 174; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.vscale.i32() 175; CHECK-NEXT: [[TMP14:%.*]] = shl nuw nsw i32 [[TMP13]], 2 176; CHECK-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 177; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i32, i32* [[NEXT_GEP5]], i64 [[TMP15]] 178; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32* [[TMP16]] to <vscale x 4 x i32>* 179; CHECK-NEXT: store <vscale x 4 x i32> [[TMP11]], <vscale x 4 x i32>* [[TMP17]], align 4 180; CHECK-NEXT: [[TMP18:%.*]] = call i64 @llvm.vscale.i64() 181; CHECK-NEXT: [[TMP19:%.*]] = shl nuw nsw i64 [[TMP18]], 3 182; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP19]] 183; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 184; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] 185; CHECK: middle.block: 186; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 187; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] 188; CHECK: scalar.ph: 189; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 190; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i32* [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SRC]], [[ENTRY]] ] 191; CHECK-NEXT: [[BC_RESUME_VAL2:%.*]] = phi i32* [ [[IND_END3]], [[MIDDLE_BLOCK]] ], [ [[DST]], [[ENTRY]] ] 192; CHECK-NEXT: br label [[FOR_BODY:%.*]] 193; CHECK: for.body: 194; CHECK-NEXT: [[I_011:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 195; CHECK-NEXT: [[S_010:%.*]] = phi i32* [ [[INCDEC_PTR1:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ] 196; CHECK-NEXT: [[D_09:%.*]] = phi i32* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL2]], [[SCALAR_PH]] ] 197; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[S_010]], align 4 198; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[TMP21]], 1 199; CHECK-NEXT: store i32 [[MUL]], i32* [[D_09]], align 4 200; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, i32* [[D_09]], i64 1 201; CHECK-NEXT: [[INCDEC_PTR1]] = getelementptr inbounds i32, i32* [[S_010]], i64 1 202; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_011]], 1 203; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[N]] 204; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] 205; CHECK: for.cond.cleanup: 206; CHECK-NEXT: ret void 207; 208entry: 209 br label %for.body 210 211for.body: ; preds = %entry, %for.body 212 %i.011 = phi i64 [ %inc, %for.body ], [ 0, %entry ] 213 %S.010 = phi i32* [ %incdec.ptr1, %for.body ], [ %src, %entry ] 214 %D.09 = phi i32* [ %incdec.ptr, %for.body ], [ %dst, %entry ] 215 %0 = load i32, i32* %S.010, align 4 216 %mul = shl nsw i32 %0, 1 217 store i32 %mul, i32* %D.09, align 4 218 %incdec.ptr = getelementptr inbounds i32, i32* %D.09, i64 1 219 %incdec.ptr1 = getelementptr inbounds i32, i32* %S.010, i64 1 220 %inc = add nuw nsw i64 %i.011, 1 221 %exitcond.not = icmp eq i64 %inc, %n 222 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !0 223 224for.cond.cleanup: ; preds = %for.body 225 ret void 226} 227 228 229; 230; Check multiple pointer induction variables where only one is recognized as 231; uniform and remains uniform after vectorization. The other pointer induction 232; variable is not recognized as uniform and is not uniform after vectorization 233; because it is stored to memory. 234; 235 236define i32 @pointer_iv_mixed(i32* noalias %a, i32** noalias %b, i64 %n) #0 { 237; CHECK-LABEL: @pointer_iv_mixed( 238; CHECK-NEXT: entry: 239; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1) 240; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() 241; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 242; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], [[TMP1]] 243; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 244; CHECK: vector.ph: 245; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() 246; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 1 247; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], [[TMP3]] 248; CHECK-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[SMAX]], [[N_MOD_VF]] 249; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i32, i32* [[A:%.*]], i64 [[N_VEC]] 250; CHECK-NEXT: [[IND_END3:%.*]] = getelementptr i32*, i32** [[B:%.*]], i64 [[N_VEC]] 251; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 252; CHECK: vector.body: 253; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi i32* [ [[A]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ] 254; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 255; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 2 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP9:%.*]], [[VECTOR_BODY]] ] 256; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64() 257; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i64 [[TMP4]], 1 258; CHECK-NEXT: [[TMP6:%.*]] = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64() 259; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i32, i32* [[POINTER_PHI]], <vscale x 2 x i64> [[TMP6]] 260; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i32*, i32** [[B]], i64 [[INDEX]] 261; CHECK-NEXT: [[BC:%.*]] = bitcast <vscale x 2 x i32*> [[TMP7]] to <vscale x 2 x <vscale x 2 x i32>*> 262; CHECK-NEXT: [[TMP8:%.*]] = extractelement <vscale x 2 x <vscale x 2 x i32>*> [[BC]], i64 0 263; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 2 x i32>, <vscale x 2 x i32>* [[TMP8]], align 8 264; CHECK-NEXT: [[TMP9]] = add <vscale x 2 x i32> [[WIDE_LOAD]], [[VEC_PHI]] 265; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32** [[NEXT_GEP]] to <vscale x 2 x i32*>* 266; CHECK-NEXT: store <vscale x 2 x i32*> [[TMP7]], <vscale x 2 x i32*>* [[TMP10]], align 8 267; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vscale.i64() 268; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 1 269; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP12]] 270; CHECK-NEXT: [[PTR_IND]] = getelementptr i32, i32* [[POINTER_PHI]], i64 [[TMP5]] 271; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 272; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] 273; CHECK: middle.block: 274; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.add.nxv2i32(<vscale x 2 x i32> [[TMP9]]) 275; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 276; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 277; CHECK: scalar.ph: 278; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 279; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i32* [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[A]], [[ENTRY]] ] 280; CHECK-NEXT: [[BC_RESUME_VAL2:%.*]] = phi i32** [ [[IND_END3]], [[MIDDLE_BLOCK]] ], [ [[B]], [[ENTRY]] ] 281; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP14]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ] 282; CHECK-NEXT: br label [[FOR_BODY:%.*]] 283; CHECK: for.body: 284; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 285; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[VAR3:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ] 286; CHECK-NEXT: [[Q:%.*]] = phi i32** [ [[VAR4:%.*]], [[FOR_BODY]] ], [ [[BC_RESUME_VAL2]], [[SCALAR_PH]] ] 287; CHECK-NEXT: [[VAR0:%.*]] = phi i32 [ [[VAR2:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ] 288; CHECK-NEXT: [[VAR1:%.*]] = load i32, i32* [[P]], align 8 289; CHECK-NEXT: [[VAR2]] = add i32 [[VAR1]], [[VAR0]] 290; CHECK-NEXT: store i32* [[P]], i32** [[Q]], align 8 291; CHECK-NEXT: [[VAR3]] = getelementptr inbounds i32, i32* [[P]], i64 1 292; CHECK-NEXT: [[VAR4]] = getelementptr inbounds i32*, i32** [[Q]], i64 1 293; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1 294; CHECK-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]] 295; CHECK-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP8:![0-9]+]] 296; CHECK: for.end: 297; CHECK-NEXT: [[VAR5:%.*]] = phi i32 [ [[VAR2]], [[FOR_BODY]] ], [ [[TMP14]], [[MIDDLE_BLOCK]] ] 298; CHECK-NEXT: ret i32 [[VAR5]] 299; 300entry: 301 br label %for.body 302 303for.body: 304 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ] 305 %p = phi i32* [ %var3, %for.body ], [ %a, %entry ] 306 %q = phi i32** [ %var4, %for.body ], [ %b, %entry ] 307 %var0 = phi i32 [ %var2, %for.body ], [ 0, %entry ] 308 %var1 = load i32, i32* %p, align 8 309 %var2 = add i32 %var1, %var0 310 store i32* %p, i32** %q, align 8 311 %var3 = getelementptr inbounds i32, i32* %p, i32 1 312 %var4 = getelementptr inbounds i32*, i32** %q, i32 1 313 %i.next = add nuw nsw i64 %i, 1 314 %cond = icmp slt i64 %i.next, %n 315 br i1 %cond, label %for.body, label %for.end, !llvm.loop !6 316 317for.end: 318 %var5 = phi i32 [ %var2, %for.body ] 319 ret i32 %var5 320} 321 322define void @phi_used_in_vector_compare_and_scalar_indvar_update_and_store(i16* %ptr) #0 { 323; CHECK-LABEL: @phi_used_in_vector_compare_and_scalar_indvar_update_and_store( 324; CHECK-NEXT: entry: 325; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] 326; CHECK: vector.ph: 327; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() 328; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1 329; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP1]] 330; CHECK-NEXT: [[N_VEC:%.*]] = sub nuw nsw i64 1024, [[N_MOD_VF]] 331; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i16, i16* [[PTR:%.*]], i64 [[N_VEC]] 332; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] 333; CHECK: vector.body: 334; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi i16* [ [[PTR]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ] 335; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] 336; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() 337; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[TMP2]], 1 338; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64() 339; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i16, i16* [[POINTER_PHI]], <vscale x 2 x i64> [[TMP4]] 340; CHECK-NEXT: [[TMP6:%.*]] = icmp ne <vscale x 2 x i16*> [[TMP5]], zeroinitializer 341; CHECK-NEXT: [[BC:%.*]] = bitcast <vscale x 2 x i16*> [[TMP5]] to <vscale x 2 x <vscale x 2 x i16>*> 342; CHECK-NEXT: [[TMP7:%.*]] = extractelement <vscale x 2 x <vscale x 2 x i16>*> [[BC]], i64 0 343; CHECK-NEXT: call void @llvm.masked.store.nxv2i16.p0nxv2i16(<vscale x 2 x i16> zeroinitializer, <vscale x 2 x i16>* [[TMP7]], i32 2, <vscale x 2 x i1> [[TMP6]]) 344; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.vscale.i64() 345; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 1 346; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP9]] 347; CHECK-NEXT: [[PTR_IND]] = getelementptr i16, i16* [[POINTER_PHI]], i64 [[TMP3]] 348; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] 349; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] 350; CHECK: middle.block: 351; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0 352; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]] 353; CHECK: scalar.ph: 354; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] 355; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i16* [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[PTR]], [[ENTRY]] ] 356; CHECK-NEXT: br label [[FOR_BODY:%.*]] 357; CHECK: for.body: 358; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[INC:%.*]], [[IF_END:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] 359; CHECK-NEXT: [[IV_PTR:%.*]] = phi i16* [ [[INCDEC_IV_PTR:%.*]], [[IF_END]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ] 360; CHECK-NEXT: [[CMP_I_NOT:%.*]] = icmp eq i16* [[IV_PTR]], null 361; CHECK-NEXT: br i1 [[CMP_I_NOT]], label [[IF_END]], label [[IF_END_SINK_SPLIT:%.*]] 362; CHECK: if.end.sink.split: 363; CHECK-NEXT: store i16 0, i16* [[IV_PTR]], align 2 364; CHECK-NEXT: br label [[IF_END]] 365; CHECK: if.end: 366; CHECK-NEXT: [[INCDEC_IV_PTR]] = getelementptr inbounds i16, i16* [[IV_PTR]], i64 1 367; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[IV]], 1 368; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp ult i64 [[IV]], 1023 369; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP10:![0-9]+]] 370; CHECK: for.end: 371; CHECK-NEXT: ret void 372; 373entry: 374 br label %for.body 375 376for.body: ; preds = %if.end, %entry 377 %iv = phi i64 [ %inc, %if.end ], [ 0, %entry ] 378 %iv.ptr = phi i16* [ %incdec.iv.ptr, %if.end ], [ %ptr, %entry ] 379 %cmp.i = icmp ne i16* %iv.ptr, null 380 br i1 %cmp.i, label %if.end.sink.split, label %if.end 381 382if.end.sink.split: ; preds = %for.body 383 store i16 0, i16* %iv.ptr, align 2 384 br label %if.end 385 386if.end: ; preds = %if.end.sink.split, %for.body 387 %incdec.iv.ptr = getelementptr inbounds i16, i16* %iv.ptr, i64 1 388 %inc = add nuw nsw i64 %iv, 1 389 %exitcond.not = icmp ult i64 %inc, 1024 390 br i1 %exitcond.not, label %for.body, label %for.end, !llvm.loop !6 391 392for.end: ; preds = %if.end, %for.end 393 %iv.ptr.1.lcssa = phi i16* [ %incdec.iv.ptr, %if.end ] 394 ret void 395} 396 397attributes #0 = { vscale_range(1, 16) } 398 399!0 = distinct !{!0, !1, !2, !3, !4, !5} 400!1 = !{!"llvm.loop.mustprogress"} 401!2 = !{!"llvm.loop.vectorize.width", i32 4} 402!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true} 403!4 = !{!"llvm.loop.vectorize.enable", i1 true} 404!5 = !{!"llvm.loop.interleave.count", i32 2} 405!6 = distinct !{!6, !1, !7, !3, !4, !8} 406!7 = !{!"llvm.loop.vectorize.width", i32 2} 407!8 = !{!"llvm.loop.interleave.count", i32 1} 408