1; This is the loop in c++ being vectorize in this file with 2;experimental.vector.reverse 3; #pragma clang loop vectorize_width(8, scalable) 4; for (int i = N-1; i >= 0; --i) 5; a[i] = b[i] + 1.0; 6 7; RUN: opt -loop-vectorize -dce -instcombine -mtriple aarch64-linux-gnu -S < %s 2>%t | FileCheck %s 8 9; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 10 11; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 12; WARN-NOT: warning 13 14define void @vector_reverse_f64(i64 %N, double* %a, double* %b) #0{ 15; CHECK-LABEL: @vector_reverse_f64 16; CHECK-LABEL: vector.body: 17; CHECK: %[[ADD:.*]] = add i64 %{{.*}}, %N 18; CHECK-NEXT: %[[GEP:.*]] = getelementptr inbounds double, double* %b, i64 %[[ADD]] 19; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32() 20; CHECK-NEXT: %[[MUL:.*]] = mul i32 %[[VSCALE]], -8 21; CHECK-NEXT: %[[OR:.*]] = or i32 %[[MUL]], 1 22; CHECK-NEXT: %[[SEXT:.*]] = sext i32 %[[OR]] to i64 23; CHECK-NEXT: %[[GEP1:.*]] = getelementptr inbounds double, double* %[[GEP]], i64 %[[SEXT]] 24; CHECK-NEXT: %[[CAST:.*]] = bitcast double* %[[GEP1]] to <vscale x 8 x double>* 25; CHECK-NEXT: %[[WIDE:.*]] = load <vscale x 8 x double>, <vscale x 8 x double>* %[[CAST]], align 8 26; CHECK-NEXT: %[[REVERSE:.*]] = call <vscale x 8 x double> @llvm.experimental.vector.reverse.nxv8f64(<vscale x 8 x double> %[[WIDE]]) 27; CHECK-NEXT: %[[FADD:.*]] = fadd <vscale x 8 x double> %[[REVERSE]], shufflevector 28; CHECK-NEXT: %[[GEP2:.*]] = getelementptr inbounds double, double* %a, i64 %[[ADD]] 29; CHECK-NEXT: %[[REVERSE6:.*]] = call <vscale x 8 x double> @llvm.experimental.vector.reverse.nxv8f64(<vscale x 8 x double> %[[FADD]]) 30; CHECK-NEXT: %[[VSCALE1:.*]] = call i32 @llvm.vscale.i32() 31; CHECK-NEXT: %[[MUL1:.*]] = mul i32 %[[VSCALE1]], -8 32; CHECK-NEXT: %[[OR1:.*]] = or i32 %[[MUL1]], 1 33; CHECK-NEXT: %[[SEXT1:.*]] = sext i32 %[[OR1]] to i64 34; CHECK-NEXT: %[[GEP3:.*]] = getelementptr inbounds double, double* %[[GEP2]], i64 %[[SEXT1]] 35; CHECK-NEXT: %[[CAST1:.*]] = bitcast double* %[[GEP3]] to <vscale x 8 x double>* 36; CHECK-NEXT: store <vscale x 8 x double> %[[REVERSE6]], <vscale x 8 x double>* %[[CAST1]], align 8 37 38entry: 39 %cmp7 = icmp sgt i64 %N, 0 40 br i1 %cmp7, label %for.body, label %for.cond.cleanup 41 42for.cond.cleanup: ; preds = %for.body 43 ret void 44 45for.body: ; preds = %entry, %for.body 46 %i.08.in = phi i64 [ %i.08, %for.body ], [ %N, %entry ] 47 %i.08 = add nsw i64 %i.08.in, -1 48 %arrayidx = getelementptr inbounds double, double* %b, i64 %i.08 49 %0 = load double, double* %arrayidx, align 8 50 %add = fadd double %0, 1.000000e+00 51 %arrayidx1 = getelementptr inbounds double, double* %a, i64 %i.08 52 store double %add, double* %arrayidx1, align 8 53 %cmp = icmp sgt i64 %i.08.in, 1 54 br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0 55} 56 57 58define void @vector_reverse_i64(i64 %N, i64* %a, i64* %b) #0 { 59; CHECK-LABEL: vector_reverse_i64 60; CHECK-LABEL: vector.body: 61; CHECK: %[[ADD:.*]] = add i64 %{{.*}}, %N 62; CHECK-NEXT: %[[GEP:.*]] = getelementptr inbounds i64, i64* %b, i64 %[[ADD]] 63; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32() 64; CHECK-NEXT: %[[MUL:.*]] = mul i32 %[[VSCALE]], -8 65; CHECK-NEXT: %[[OR:.*]] = or i32 %[[MUL]], 1 66; CHECK-NEXT: %[[SEXT:.*]] = sext i32 %[[OR]] to i64 67; CHECK-NEXT: %[[GEP1:.*]] = getelementptr inbounds i64, i64* %[[GEP]], i64 %[[SEXT]] 68; CHECK-NEXT: %[[CAST:.*]] = bitcast i64* %[[GEP1]] to <vscale x 8 x i64>* 69; CHECK-NEXT: %[[WIDE:.*]] = load <vscale x 8 x i64>, <vscale x 8 x i64>* %[[CAST]], align 8 70; CHECK-NEXT: %[[REVERSE:.*]] = call <vscale x 8 x i64> @llvm.experimental.vector.reverse.nxv8i64(<vscale x 8 x i64> %[[WIDE]]) 71; CHECK-NEXT: %[[ADD1:.*]] = add <vscale x 8 x i64> %[[REVERSE]] 72; CHECK-NEXT: %[[GEP2:.*]] = getelementptr inbounds i64, i64* %a, i64 %[[ADD]] 73; CHECK-NEXT: %[[REVERSE6]] = call <vscale x 8 x i64> @llvm.experimental.vector.reverse.nxv8i64(<vscale x 8 x i64> %[[ADD1]]) 74; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32() 75; CHECK-NEXT: %[[MUL1:.*]] = mul i32 %[[VSCALE]], -8 76; CHECK-NEXT: %[[OR1:.*]] = or i32 %[[MUL1]], 1 77; CHECK-NEXT: %[[SEXT1:.*]] = sext i32 %[[OR1]] to i64 78; CHECK-NEXT: %[[GEP3:.*]] = getelementptr inbounds i64, i64* %[[GEP2]], i64 %[[SEXT1]] 79; CHECK-NEXT: %[[CAST1:.*]] = bitcast i64* %[[GEP3]] to <vscale x 8 x i64>* 80; CHECK-NEXT: store <vscale x 8 x i64> %[[REVERSE6]], <vscale x 8 x i64>* %[[CAST1]], align 8 81 82entry: 83 %cmp8 = icmp sgt i64 %N, 0 84 br i1 %cmp8, label %for.body, label %for.cond.cleanup 85 86for.cond.cleanup: ; preds = %for.body 87 ret void 88 89for.body: ; preds = %entry, %for.body 90 %i.09.in = phi i64 [ %i.09, %for.body ], [ %N, %entry ] 91 %i.09 = add nsw i64 %i.09.in, -1 92 %arrayidx = getelementptr inbounds i64, i64* %b, i64 %i.09 93 %0 = load i64, i64* %arrayidx, align 8 94 %add = add i64 %0, 1 95 %arrayidx2 = getelementptr inbounds i64, i64* %a, i64 %i.09 96 store i64 %add, i64* %arrayidx2, align 8 97 %cmp = icmp sgt i64 %i.09.in, 1 98 br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0 99} 100 101attributes #0 = { "target-cpu"="generic" "target-features"="+neon,+sve" } 102 103!0 = distinct !{!0, !1, !2, !3, !4} 104!1 = !{!"llvm.loop.mustprogress"} 105!2 = !{!"llvm.loop.vectorize.width", i32 8} 106!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true} 107!4 = !{!"llvm.loop.vectorize.enable", i1 true} 108 109