1; This is the loop in c++ being vectorize in this file with
2;experimental.vector.reverse
3;  #pragma clang loop vectorize_width(8, scalable)
4;  for (int i = N-1; i >= 0; --i)
5;    a[i] = b[i] + 1.0;
6
7; RUN: opt -loop-vectorize -scalable-vectorization=on -dce -instcombine -mtriple aarch64-linux-gnu -S < %s | FileCheck %s
8
9define void @vector_reverse_f64(i64 %N, double* %a, double* %b) #0{
10; CHECK-LABEL: @vector_reverse_f64
11; CHECK-LABEL: vector.body:
12; CHECK: %[[ADD:.*]] = add i64 %{{.*}}, %N
13; CHECK-NEXT: %[[GEP:.*]] = getelementptr inbounds double, double* %b, i64 %[[ADD]]
14; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32()
15; CHECK-NEXT: %[[MUL:.*]] = mul i32 %[[VSCALE]], -8
16; CHECK-NEXT: %[[OR:.*]] = or i32 %[[MUL]], 1
17; CHECK-NEXT: %[[SEXT:.*]] = sext i32 %[[OR]] to i64
18; CHECK-NEXT: %[[GEP1:.*]] = getelementptr inbounds double, double* %[[GEP]], i64 %[[SEXT]]
19; CHECK-NEXT: %[[CAST:.*]] = bitcast double* %[[GEP1]] to <vscale x 8 x double>*
20; CHECK-NEXT: %[[WIDE:.*]] = load <vscale x 8 x double>, <vscale x 8 x double>* %[[CAST]], align 8
21; CHECK-NEXT: %[[REVERSE:.*]] = call <vscale x 8 x double> @llvm.experimental.vector.reverse.nxv8f64(<vscale x 8 x double> %[[WIDE]])
22; CHECK-NEXT: %[[FADD:.*]] = fadd <vscale x 8 x double> %[[REVERSE]], shufflevector
23; CHECK-NEXT: %[[GEP2:.*]] = getelementptr inbounds double, double* %a, i64 %[[ADD]]
24; CHECK-NEXT: %[[REVERSE6:.*]] = call <vscale x 8 x double> @llvm.experimental.vector.reverse.nxv8f64(<vscale x 8 x double> %[[FADD]])
25; CHECK-NEXT: %[[VSCALE1:.*]] = call i32 @llvm.vscale.i32()
26; CHECK-NEXT: %[[MUL1:.*]] = mul i32 %[[VSCALE1]], -8
27; CHECK-NEXT: %[[OR1:.*]] = or i32 %[[MUL1]], 1
28; CHECK-NEXT: %[[SEXT1:.*]] = sext i32 %[[OR1]] to i64
29; CHECK-NEXT: %[[GEP3:.*]] = getelementptr inbounds double, double* %[[GEP2]], i64 %[[SEXT1]]
30; CHECK-NEXT: %[[CAST1:.*]] = bitcast double* %[[GEP3]] to <vscale x 8 x double>*
31; CHECK-NEXT: store <vscale x 8 x double> %[[REVERSE6]], <vscale x 8 x double>* %[[CAST1]], align 8
32
33entry:
34  %cmp7 = icmp sgt i64 %N, 0
35  br i1 %cmp7, label %for.body, label %for.cond.cleanup
36
37for.cond.cleanup:                                 ; preds = %for.body
38  ret void
39
40for.body:                                         ; preds = %entry, %for.body
41  %i.08.in = phi i64 [ %i.08, %for.body ], [ %N, %entry ]
42  %i.08 = add nsw i64 %i.08.in, -1
43  %arrayidx = getelementptr inbounds double, double* %b, i64 %i.08
44  %0 = load double, double* %arrayidx, align 8
45  %add = fadd double %0, 1.000000e+00
46  %arrayidx1 = getelementptr inbounds double, double* %a, i64 %i.08
47  store double %add, double* %arrayidx1, align 8
48  %cmp = icmp sgt i64 %i.08.in, 1
49  br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
50}
51
52
53define void @vector_reverse_i64(i64 %N, i64* %a, i64* %b) #0 {
54; CHECK-LABEL: vector_reverse_i64
55; CHECK-LABEL: vector.body:
56; CHECK: %[[ADD:.*]] = add i64 %{{.*}}, %N
57; CHECK-NEXT: %[[GEP:.*]] = getelementptr inbounds i64, i64* %b, i64 %[[ADD]]
58; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32()
59; CHECK-NEXT: %[[MUL:.*]] = mul i32 %[[VSCALE]], -8
60; CHECK-NEXT: %[[OR:.*]] = or i32 %[[MUL]], 1
61; CHECK-NEXT: %[[SEXT:.*]] = sext i32 %[[OR]] to i64
62; CHECK-NEXT: %[[GEP1:.*]] = getelementptr inbounds i64, i64* %[[GEP]], i64 %[[SEXT]]
63; CHECK-NEXT: %[[CAST:.*]] = bitcast i64* %[[GEP1]] to <vscale x 8 x i64>*
64; CHECK-NEXT: %[[WIDE:.*]] = load <vscale x 8 x i64>, <vscale x 8 x i64>* %[[CAST]], align 8
65; CHECK-NEXT: %[[REVERSE:.*]] = call <vscale x 8 x i64> @llvm.experimental.vector.reverse.nxv8i64(<vscale x 8 x i64> %[[WIDE]])
66; CHECK-NEXT: %[[ADD1:.*]] = add <vscale x 8 x i64> %[[REVERSE]]
67; CHECK-NEXT: %[[GEP2:.*]] = getelementptr inbounds i64, i64* %a, i64 %[[ADD]]
68; CHECK-NEXT: %[[REVERSE6]] = call <vscale x 8 x i64> @llvm.experimental.vector.reverse.nxv8i64(<vscale x 8 x i64> %[[ADD1]])
69; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32()
70; CHECK-NEXT: %[[MUL1:.*]] = mul i32 %[[VSCALE]], -8
71; CHECK-NEXT: %[[OR1:.*]] = or i32 %[[MUL1]], 1
72; CHECK-NEXT: %[[SEXT1:.*]] = sext i32 %[[OR1]] to i64
73; CHECK-NEXT: %[[GEP3:.*]] = getelementptr inbounds i64, i64* %[[GEP2]], i64 %[[SEXT1]]
74; CHECK-NEXT: %[[CAST1:.*]] = bitcast i64* %[[GEP3]] to <vscale x 8 x i64>*
75; CHECK-NEXT:  store <vscale x 8 x i64> %[[REVERSE6]], <vscale x 8 x i64>* %[[CAST1]], align 8
76
77entry:
78  %cmp8 = icmp sgt i64 %N, 0
79  br i1 %cmp8, label %for.body, label %for.cond.cleanup
80
81for.cond.cleanup:                                 ; preds = %for.body
82  ret void
83
84for.body:                                         ; preds = %entry, %for.body
85  %i.09.in = phi i64 [ %i.09, %for.body ], [ %N, %entry ]
86  %i.09 = add nsw i64 %i.09.in, -1
87  %arrayidx = getelementptr inbounds i64, i64* %b, i64 %i.09
88  %0 = load i64, i64* %arrayidx, align 8
89  %add = add i64 %0, 1
90  %arrayidx2 = getelementptr inbounds i64, i64* %a, i64 %i.09
91  store i64 %add, i64* %arrayidx2, align 8
92  %cmp = icmp sgt i64 %i.09.in, 1
93  br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0
94}
95
96attributes #0 = { "target-cpu"="generic" "target-features"="+neon,+sve" }
97
98!0 = distinct !{!0, !1, !2, !3, !4}
99!1 = !{!"llvm.loop.mustprogress"}
100!2 = !{!"llvm.loop.vectorize.width", i32 8}
101!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
102!4 = !{!"llvm.loop.vectorize.enable", i1 true}
103
104