1; RUN: opt -mtriple aarch64-linux-gnu -mattr=+sve -loop-vectorize -dce -instcombine < %s -S 2>%t | FileCheck %s 2 3; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 4 5; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 6; WARN-NOT: warning 7 8; Test that we can add on the induction variable 9; for (long long i = 0; i < n; i++) { 10; a[i] = b[i] + i; 11; } 12; with an unroll factor (interleave count) of 2. 13 14define void @add_ind64_unrolled(i64* noalias nocapture %a, i64* noalias nocapture readonly %b, i64 %n) { 15; CHECK-LABEL: @add_ind64_unrolled( 16; CHECK-NEXT: entry: 17; CHECK: vector.body: 18; CHECK-NEXT: %[[INDEX:.*]] = phi i64 [ 0, %vector.ph ], [ %{{.*}}, %vector.body ] 19; CHECK-NEXT: %[[STEPVEC:.*]] = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64() 20; CHECK-NEXT: %[[TMP1:.*]] = insertelement <vscale x 2 x i64> poison, i64 %[[INDEX]], i32 0 21; CHECK-NEXT: %[[IDXSPLT:.*]] = shufflevector <vscale x 2 x i64> %[[TMP1]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer 22; CHECK-NEXT: %[[VECIND1:.*]] = add <vscale x 2 x i64> %[[IDXSPLT]], %[[STEPVEC]] 23; CHECK-NEXT: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() 24; CHECK-NEXT: %[[EC:.*]] = shl i64 %[[VSCALE]], 1 25; CHECK-NEXT: %[[TMP2:.*]] = insertelement <vscale x 2 x i64> poison, i64 %[[EC]], i32 0 26; CHECK-NEXT: %[[ECSPLT:.*]] = shufflevector <vscale x 2 x i64> %[[TMP2]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer 27; CHECK-NEXT: %[[TMP3:.*]] = add <vscale x 2 x i64> %[[ECSPLT]], %[[STEPVEC]] 28; CHECK-NEXT: %[[VECIND2:.*]] = add <vscale x 2 x i64> %[[IDXSPLT]], %[[TMP3]] 29; CHECK: %[[LOAD1:.*]] = load <vscale x 2 x i64> 30; CHECK: %[[LOAD2:.*]] = load <vscale x 2 x i64> 31; CHECK: %[[STOREVAL1:.*]] = add nsw <vscale x 2 x i64> %[[LOAD1]], %[[VECIND1]] 32; CHECK: %[[STOREVAL2:.*]] = add nsw <vscale x 2 x i64> %[[LOAD2]], %[[VECIND2]] 33; CHECK: store <vscale x 2 x i64> %[[STOREVAL1]] 34; CHECK: store <vscale x 2 x i64> %[[STOREVAL2]] 35 36entry: 37 br label %for.body 38 39for.body: ; preds = %entry, %for.body 40 %i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ] 41 %arrayidx = getelementptr inbounds i64, i64* %b, i64 %i.08 42 %0 = load i64, i64* %arrayidx, align 8 43 %add = add nsw i64 %0, %i.08 44 %arrayidx1 = getelementptr inbounds i64, i64* %a, i64 %i.08 45 store i64 %add, i64* %arrayidx1, align 8 46 %inc = add nuw nsw i64 %i.08, 1 47 %exitcond.not = icmp eq i64 %inc, %n 48 br i1 %exitcond.not, label %exit, label %for.body, !llvm.loop !0 49 50exit: ; preds = %for.body 51 ret void 52} 53 54 55; Same as above, except we test with a vectorisation factor of (1, scalable) 56 57define void @add_ind64_unrolled_nxv1i64(i64* noalias nocapture %a, i64* noalias nocapture readonly %b, i64 %n) { 58; CHECK-LABEL: @add_ind64_unrolled_nxv1i64( 59; CHECK-NEXT: entry: 60; CHECK: vector.body: 61; CHECK-NEXT: %[[INDEX:.*]] = phi i64 [ 0, %vector.ph ], [ %{{.*}}, %vector.body ] 62; CHECK-NEXT: %[[STEPVEC:.*]] = call <vscale x 1 x i64> @llvm.experimental.stepvector.nxv1i64() 63; CHECK-NEXT: %[[TMP1:.*]] = insertelement <vscale x 1 x i64> poison, i64 %[[INDEX]], i32 0 64; CHECK-NEXT: %[[IDXSPLT:.*]] = shufflevector <vscale x 1 x i64> %[[TMP1]], <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer 65; CHECK-NEXT: %[[VECIND1:.*]] = add <vscale x 1 x i64> %[[IDXSPLT]], %[[STEPVEC]] 66; CHECK-NEXT: %[[EC:.*]] = call i64 @llvm.vscale.i64() 67; CHECK-NEXT: %[[TMP2:.*]] = insertelement <vscale x 1 x i64> poison, i64 %[[EC]], i32 0 68; CHECK-NEXT: %[[ECSPLT:.*]] = shufflevector <vscale x 1 x i64> %[[TMP2]], <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer 69; CHECK-NEXT: %[[TMP3:.*]] = add <vscale x 1 x i64> %[[ECSPLT]], %[[STEPVEC]] 70; CHECK-NEXT: %[[VECIND2:.*]] = add <vscale x 1 x i64> %[[IDXSPLT]], %[[TMP3]] 71; CHECK: %[[LOAD1:.*]] = load <vscale x 1 x i64> 72; CHECK: %[[LOAD2:.*]] = load <vscale x 1 x i64> 73; CHECK: %[[STOREVAL1:.*]] = add nsw <vscale x 1 x i64> %[[LOAD1]], %[[VECIND1]] 74; CHECK: %[[STOREVAL2:.*]] = add nsw <vscale x 1 x i64> %[[LOAD2]], %[[VECIND2]] 75; CHECK: store <vscale x 1 x i64> %[[STOREVAL1]] 76; CHECK: store <vscale x 1 x i64> %[[STOREVAL2]] 77 78entry: 79 br label %for.body 80 81for.body: ; preds = %entry, %for.body 82 %i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ] 83 %arrayidx = getelementptr inbounds i64, i64* %b, i64 %i.08 84 %0 = load i64, i64* %arrayidx, align 8 85 %add = add nsw i64 %0, %i.08 86 %arrayidx1 = getelementptr inbounds i64, i64* %a, i64 %i.08 87 store i64 %add, i64* %arrayidx1, align 8 88 %inc = add nuw nsw i64 %i.08, 1 89 %exitcond.not = icmp eq i64 %inc, %n 90 br i1 %exitcond.not, label %exit, label %for.body, !llvm.loop !9 91 92exit: ; preds = %for.body 93 ret void 94} 95 96 97; Test that we can vectorize a separate induction variable (not used for the branch) 98; int r = 0; 99; for (long long i = 0; i < n; i++) { 100; a[i] = r; 101; r += 2; 102; } 103; with an unroll factor (interleave count) of 1. 104 105 106define void @add_unique_ind32(i32* noalias nocapture %a, i64 %n) { 107; CHECK-LABEL: @add_unique_ind32( 108; CHECK: vector.ph: 109; CHECK: %[[STEPVEC:.*]] = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32() 110; CHECK-NEXT: %[[INDINIT:.*]] = shl <vscale x 4 x i32> %[[STEPVEC]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 1, i32 0), <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer) 111; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32() 112; CHECK-NEXT: %[[INC:.*]] = shl i32 %[[VSCALE]], 3 113; CHECK-NEXT: %[[TMP:.*]] = insertelement <vscale x 4 x i32> poison, i32 %[[INC]], i32 0 114; CHECK-NEXT: %[[VECINC:.*]] = shufflevector <vscale x 4 x i32> %[[TMP]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer 115; CHECK: vector.body: 116; CHECK: %[[VECIND:.*]] = phi <vscale x 4 x i32> [ %[[INDINIT]], %vector.ph ], [ %[[VECINDNXT:.*]], %vector.body ] 117; CHECK: store <vscale x 4 x i32> %[[VECIND]] 118; CHECK: %[[VECINDNXT]] = add <vscale x 4 x i32> %[[VECIND]], %[[VECINC]] 119entry: 120 br label %for.body 121 122for.body: ; preds = %entry, %for.body 123 %i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ] 124 %r.07 = phi i32 [ %add, %for.body ], [ 0, %entry ] 125 %arrayidx = getelementptr inbounds i32, i32* %a, i64 %i.08 126 store i32 %r.07, i32* %arrayidx, align 4 127 %add = add nuw nsw i32 %r.07, 2 128 %inc = add nuw nsw i64 %i.08, 1 129 %exitcond.not = icmp eq i64 %inc, %n 130 br i1 %exitcond.not, label %exit, label %for.body, !llvm.loop !6 131 132exit: ; preds = %for.body 133 ret void 134} 135 136 137; Test that we can vectorize a separate FP induction variable (not used for the branch) 138; float r = 0; 139; for (long long i = 0; i < n; i++) { 140; a[i] = r; 141; r += 2; 142; } 143; with an unroll factor (interleave count) of 1. 144 145define void @add_unique_indf32(float* noalias nocapture %a, i64 %n) { 146; CHECK-LABEL: @add_unique_indf32( 147; CHECK: vector.ph: 148; CHECK: %[[STEPVEC:.*]] = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32() 149; CHECK-NEXT: %[[TMP1:.*]] = uitofp <vscale x 4 x i32> %[[STEPVEC]] to <vscale x 4 x float> 150; CHECK-NEXT: %[[TMP2:.*]] = fmul <vscale x 4 x float> %[[TMP1]], shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 2.000000e+00, i32 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer) 151; CHECK-NEXT: %[[INDINIT:.*]] = fadd <vscale x 4 x float> %[[TMP2]], shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 0.000000e+00, i32 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer) 152; CHECK-NEXT: %[[VSCALE:.*]] = call i32 @llvm.vscale.i32() 153; CHECK-NEXT: %[[TMP3:.*]] = shl i32 %8, 2 154; CHECK-NEXT: %[[TMP4:.*]] = sitofp i32 %[[TMP3]] to float 155; CHECK-NEXT: %[[INC:.*]] = fmul float %[[TMP4]], 2.000000e+00 156; CHECK-NEXT: %[[TMP5:.*]] = insertelement <vscale x 4 x float> poison, float %[[INC]], i32 0 157; CHECK-NEXT: %[[VECINC:.*]] = shufflevector <vscale x 4 x float> %[[TMP5]], <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer 158; CHECK: vector.body: 159; CHECK: %[[VECIND:.*]] = phi <vscale x 4 x float> [ %[[INDINIT]], %vector.ph ], [ %[[VECINDNXT:.*]], %vector.body ] 160; CHECK: store <vscale x 4 x float> %[[VECIND]] 161; CHECK: %[[VECINDNXT]] = fadd <vscale x 4 x float> %[[VECIND]], %[[VECINC]] 162 163entry: 164 br label %for.body 165 166for.body: ; preds = %entry, %for.body 167 %i.08 = phi i64 [ %inc, %for.body ], [ 0, %entry ] 168 %r.07 = phi float [ %add, %for.body ], [ 0.000000e+00, %entry ] 169 %arrayidx = getelementptr inbounds float, float* %a, i64 %i.08 170 store float %r.07, float* %arrayidx, align 4 171 %add = fadd float %r.07, 2.000000e+00 172 %inc = add nuw nsw i64 %i.08, 1 173 %exitcond.not = icmp eq i64 %inc, %n 174 br i1 %exitcond.not, label %exit, label %for.body, !llvm.loop !6 175 176exit: ; preds = %for.body 177 ret void 178} 179 180; Test a case where the vectorised induction variable is used to 181; generate a mask: 182; for (long long i = 0; i < n; i++) { 183; if (i & 0x1) 184; a[i] = b[i]; 185; } 186 187define void @cond_ind64(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i64 %n) { 188; CHECK-LABEL: @cond_ind64( 189; CHECK: vector.body: 190; CHECK-NEXT: %[[INDEX:.*]] = phi i64 [ 0, %vector.ph ], [ %{{.*}}, %vector.body ] 191; CHECK: %[[STEPVEC:.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 192; CHECK-NEXT: %[[TMP1:.*]] = insertelement <vscale x 4 x i64> poison, i64 %[[INDEX]], i32 0 193; CHECK-NEXT: %[[IDXSPLT:.*]] = shufflevector <vscale x 4 x i64> %[[TMP1]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer 194; CHECK-NEXT: %[[VECIND:.*]] = add <vscale x 4 x i64> %[[IDXSPLT]], %[[STEPVEC]] 195; CHECK-NEXT: %[[MASK:.*]] = trunc <vscale x 4 x i64> %[[VECIND]] to <vscale x 4 x i1> 196; CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0nxv4i32(<vscale x 4 x i32>* %{{.*}}, i32 4, <vscale x 4 x i1> %[[MASK]], <vscale x 4 x i32> poison) 197; CHECK: call void @llvm.masked.store.nxv4i32.p0nxv4i32(<vscale x 4 x i32> %[[LOAD]], <vscale x 4 x i32>* %{{.*}}, i32 4, <vscale x 4 x i1> %[[MASK]]) 198entry: 199 br label %for.body 200 201for.body: ; preds = %entry, %for.inc 202 %i.08 = phi i64 [ %inc, %for.inc ], [ 0, %entry ] 203 %and = and i64 %i.08, 1 204 %tobool.not = icmp eq i64 %and, 0 205 br i1 %tobool.not, label %for.inc, label %if.then 206 207if.then: ; preds = %for.body 208 %arrayidx = getelementptr inbounds i32, i32* %b, i64 %i.08 209 %0 = load i32, i32* %arrayidx, align 4 210 %arrayidx1 = getelementptr inbounds i32, i32* %a, i64 %i.08 211 store i32 %0, i32* %arrayidx1, align 4 212 br label %for.inc 213 214for.inc: ; preds = %for.body, %if.then 215 %inc = add nuw nsw i64 %i.08, 1 216 %exitcond.not = icmp eq i64 %inc, %n 217 br i1 %exitcond.not, label %exit, label %for.body, !llvm.loop !6 218 219exit: ; preds = %for.inc 220 ret void 221} 222 223!0 = distinct !{!0, !1, !2, !3, !4, !5} 224!1 = !{!"llvm.loop.mustprogress"} 225!2 = !{!"llvm.loop.vectorize.width", i32 2} 226!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true} 227!4 = !{!"llvm.loop.interleave.count", i32 2} 228!5 = !{!"llvm.loop.vectorize.enable", i1 true} 229!6 = distinct !{!6, !1, !7, !3, !8, !5} 230!7 = !{!"llvm.loop.vectorize.width", i32 4} 231!8 = !{!"llvm.loop.interleave.count", i32 1} 232!9 = distinct !{!9, !1, !10, !3, !4, !5} 233!10 = !{!"llvm.loop.vectorize.width", i32 1} 234