1; RUN: opt -loop-vectorize -dce -instcombine -mtriple aarch64-linux-gnu -mattr=+sve -scalable-vectorization=on < %s -S | FileCheck %s
2
3
4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5target triple = "aarch64-unknown-linux-gnu"
6
7define void @cmpsel_i32(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i64 %n) {
8; CHECK-LABEL: @cmpsel_i32(
9; CHECK-NEXT:  entry:
10; CHECK:       vector.body:
11; CHECK:         [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* {{.*}}, align 4
12; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <vscale x 4 x i32> [[WIDE_LOAD]], shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 0, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer)
13; CHECK-NEXT:    [[TMP2:%.*]] = select <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 2, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 10, i32 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer)
14; CHECK:         store <vscale x 4 x i32> [[TMP2]], <vscale x 4 x i32>* {{.*}}, align 4
15;
16entry:
17  br label %for.body
18
19for.body:                                         ; preds = %entry, %for.body
20  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
21  %arrayidx = getelementptr inbounds i32, i32* %b, i64 %indvars.iv
22  %0 = load i32, i32* %arrayidx, align 4
23  %tobool.not = icmp eq i32 %0, 0
24  %cond = select i1 %tobool.not, i32 2, i32 10
25  %arrayidx2 = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
26  store i32 %cond, i32* %arrayidx2, align 4
27  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
28  %exitcond.not = icmp eq i64 %indvars.iv.next, %n
29  br i1 %exitcond.not, label %for.end.loopexit, label %for.body, !llvm.loop !0
30
31for.end.loopexit:                                 ; preds = %for.body
32  br label %for.end
33
34for.end:                                          ; preds = %for.end.loopexit, %entry
35  ret void
36}
37
38define void @cmpsel_f32(float* noalias nocapture %a, float* noalias nocapture readonly %b, i64 %n) {
39; CHECK-LABEL: @cmpsel_f32(
40; CHECK-NEXT:  entry:
41; CHECK:       vector.body:
42; CHECK:         [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, <vscale x 4 x float>* {{.*}}, align 4
43; CHECK-NEXT:    [[TMP1:%.*]] = fcmp ogt <vscale x 4 x float> [[WIDE_LOAD]], shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 3.000000e+00, i32 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer)
44; CHECK-NEXT:    [[TMP2:%.*]] = select <vscale x 4 x i1> [[TMP1]], <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.000000e+01, i32 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 2.000000e+00, i32 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer)
45; CHECK:         store <vscale x 4 x float> [[TMP2]], <vscale x 4 x float>* {{.*}}, align 4
46
47entry:
48  br label %for.body
49
50for.body:                                         ; preds = %entry, %for.body
51  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
52  %arrayidx = getelementptr inbounds float, float* %b, i64 %indvars.iv
53  %0 = load float, float* %arrayidx, align 4
54  %cmp1 = fcmp ogt float %0, 3.000000e+00
55  %conv = select i1 %cmp1, float 1.000000e+01, float 2.000000e+00
56  %arrayidx3 = getelementptr inbounds float, float* %a, i64 %indvars.iv
57  store float %conv, float* %arrayidx3, align 4
58  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
59  %exitcond.not = icmp eq i64 %indvars.iv.next, %n
60  br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
61
62for.end:                                          ; preds = %for.body, %entry
63  ret void
64}
65
66define void @fneg_f32(float* noalias nocapture %a, float* noalias nocapture readonly %b, i64 %n) {
67; CHECK-LABEL: @fneg_f32(
68; CHECK-NEXT:  entry:
69; CHECK:       vector.body:
70; CHECK:         [[WIDE_LOAD:%.*]] = load <vscale x 4 x float>, <vscale x 4 x float>* {{.*}}, align 4
71; CHECK-NEXT:    [[TMP1:%.*]] = fneg <vscale x 4 x float> [[WIDE_LOAD]]
72; CHECK:         store <vscale x 4 x float> [[TMP1]], <vscale x 4 x float>* {{.*}}, align 4
73
74entry:
75  br label %for.body
76
77for.body:                                         ; preds = %entry, %for.body
78  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
79  %arrayidx = getelementptr inbounds float, float* %b, i64 %indvars.iv
80  %0 = load float, float* %arrayidx, align 4
81  %fneg = fneg float %0
82  %arrayidx3 = getelementptr inbounds float, float* %a, i64 %indvars.iv
83  store float %fneg, float* %arrayidx3, align 4
84  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
85  %exitcond.not = icmp eq i64 %indvars.iv.next, %n
86  br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
87
88for.end:                                          ; preds = %for.body, %entry
89  ret void
90}
91
92!0 = distinct !{!0, !1, !2, !3, !4, !5}
93!1 = !{!"llvm.loop.mustprogress"}
94!2 = !{!"llvm.loop.vectorize.width", i32 4}
95!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
96!4 = !{!"llvm.loop.interleave.count", i32 1}
97!5 = !{!"llvm.loop.vectorize.enable", i1 true}
98