1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -loop-unroll -unroll-runtime -unroll-runtime-multi-exit < %s | FileCheck %s 3 4; This loop has a known trip count on the non-latch exit. When performing 5; runtime unrolling (at least when using a prologue rather than epilogue) we 6; should not fold that exit based on known trip count information prior to 7; prologue insertion, as that may change the trip count for the modified loop. 8 9define void @test(i32 %s, i32 %n) { 10; CHECK-LABEL: @test( 11; CHECK-NEXT: entry: 12; CHECK-NEXT: [[N2:%.*]] = add i32 [[S:%.*]], 123 13; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], 1 14; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], [[S]] 15; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[N]], [[S]] 16; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[TMP1]], 7 17; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 0 18; CHECK-NEXT: br i1 [[LCMP_MOD]], label [[LOOP_PROL_PREHEADER:%.*]], label [[LOOP_PROL_LOOPEXIT:%.*]] 19; CHECK: loop.prol.preheader: 20; CHECK-NEXT: br label [[LOOP_PROL:%.*]] 21; CHECK: loop.prol: 22; CHECK-NEXT: [[I_PROL:%.*]] = phi i32 [ [[S]], [[LOOP_PROL_PREHEADER]] ], [ [[I_INC_PROL:%.*]], [[LATCH_PROL:%.*]] ] 23; CHECK-NEXT: [[PROL_ITER:%.*]] = phi i32 [ [[XTRAITER]], [[LOOP_PROL_PREHEADER]] ], [ [[PROL_ITER_SUB:%.*]], [[LATCH_PROL]] ] 24; CHECK-NEXT: [[C1_PROL:%.*]] = icmp eq i32 [[I_PROL]], [[N2]] 25; CHECK-NEXT: br i1 [[C1_PROL]], label [[EXIT1_LOOPEXIT1:%.*]], label [[LATCH_PROL]] 26; CHECK: latch.prol: 27; CHECK-NEXT: [[C2_PROL:%.*]] = icmp eq i32 [[I_PROL]], [[N]] 28; CHECK-NEXT: [[I_INC_PROL]] = add i32 [[I_PROL]], 1 29; CHECK-NEXT: [[PROL_ITER_SUB]] = sub i32 [[PROL_ITER]], 1 30; CHECK-NEXT: [[PROL_ITER_CMP:%.*]] = icmp ne i32 [[PROL_ITER_SUB]], 0 31; CHECK-NEXT: br i1 [[PROL_ITER_CMP]], label [[LOOP_PROL]], label [[LOOP_PROL_LOOPEXIT_UNR_LCSSA:%.*]], !llvm.loop [[LOOP0:![0-9]+]] 32; CHECK: loop.prol.loopexit.unr-lcssa: 33; CHECK-NEXT: [[I_UNR_PH:%.*]] = phi i32 [ [[I_INC_PROL]], [[LATCH_PROL]] ] 34; CHECK-NEXT: br label [[LOOP_PROL_LOOPEXIT]] 35; CHECK: loop.prol.loopexit: 36; CHECK-NEXT: [[I_UNR:%.*]] = phi i32 [ [[S]], [[ENTRY:%.*]] ], [ [[I_UNR_PH]], [[LOOP_PROL_LOOPEXIT_UNR_LCSSA]] ] 37; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 7 38; CHECK-NEXT: br i1 [[TMP3]], label [[EXIT2:%.*]], label [[ENTRY_NEW:%.*]] 39; CHECK: entry.new: 40; CHECK-NEXT: br label [[LOOP:%.*]] 41; CHECK: loop: 42; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_UNR]], [[ENTRY_NEW]] ], [ [[I_INC_7:%.*]], [[LATCH_7:%.*]] ] 43; CHECK-NEXT: [[C1:%.*]] = icmp eq i32 [[I]], [[N2]] 44; CHECK-NEXT: br i1 [[C1]], label [[EXIT1_LOOPEXIT:%.*]], label [[LATCH:%.*]] 45; CHECK: latch: 46; CHECK-NEXT: [[I_INC:%.*]] = add i32 [[I]], 1 47; CHECK-NEXT: [[C1_1:%.*]] = icmp eq i32 [[I_INC]], [[N2]] 48; CHECK-NEXT: br i1 [[C1_1]], label [[EXIT1_LOOPEXIT]], label [[LATCH_1:%.*]] 49; CHECK: exit1.loopexit: 50; CHECK-NEXT: br label [[EXIT1:%.*]] 51; CHECK: exit1.loopexit1: 52; CHECK-NEXT: br label [[EXIT1]] 53; CHECK: exit1: 54; CHECK-NEXT: ret void 55; CHECK: exit2.unr-lcssa: 56; CHECK-NEXT: br label [[EXIT2]] 57; CHECK: exit2: 58; CHECK-NEXT: ret void 59; CHECK: latch.1: 60; CHECK-NEXT: [[I_INC_1:%.*]] = add i32 [[I_INC]], 1 61; CHECK-NEXT: [[C1_2:%.*]] = icmp eq i32 [[I_INC_1]], [[N2]] 62; CHECK-NEXT: br i1 [[C1_2]], label [[EXIT1_LOOPEXIT]], label [[LATCH_2:%.*]] 63; CHECK: latch.2: 64; CHECK-NEXT: [[I_INC_2:%.*]] = add i32 [[I_INC_1]], 1 65; CHECK-NEXT: [[C1_3:%.*]] = icmp eq i32 [[I_INC_2]], [[N2]] 66; CHECK-NEXT: br i1 [[C1_3]], label [[EXIT1_LOOPEXIT]], label [[LATCH_3:%.*]] 67; CHECK: latch.3: 68; CHECK-NEXT: [[I_INC_3:%.*]] = add i32 [[I_INC_2]], 1 69; CHECK-NEXT: [[C1_4:%.*]] = icmp eq i32 [[I_INC_3]], [[N2]] 70; CHECK-NEXT: br i1 [[C1_4]], label [[EXIT1_LOOPEXIT]], label [[LATCH_4:%.*]] 71; CHECK: latch.4: 72; CHECK-NEXT: [[I_INC_4:%.*]] = add i32 [[I_INC_3]], 1 73; CHECK-NEXT: [[C1_5:%.*]] = icmp eq i32 [[I_INC_4]], [[N2]] 74; CHECK-NEXT: br i1 [[C1_5]], label [[EXIT1_LOOPEXIT]], label [[LATCH_5:%.*]] 75; CHECK: latch.5: 76; CHECK-NEXT: [[I_INC_5:%.*]] = add i32 [[I_INC_4]], 1 77; CHECK-NEXT: [[C1_6:%.*]] = icmp eq i32 [[I_INC_5]], [[N2]] 78; CHECK-NEXT: br i1 [[C1_6]], label [[EXIT1_LOOPEXIT]], label [[LATCH_6:%.*]] 79; CHECK: latch.6: 80; CHECK-NEXT: [[I_INC_6:%.*]] = add i32 [[I_INC_5]], 1 81; CHECK-NEXT: [[C1_7:%.*]] = icmp eq i32 [[I_INC_6]], [[N2]] 82; CHECK-NEXT: br i1 [[C1_7]], label [[EXIT1_LOOPEXIT]], label [[LATCH_7]] 83; CHECK: latch.7: 84; CHECK-NEXT: [[C2_7:%.*]] = icmp eq i32 [[I_INC_6]], [[N]] 85; CHECK-NEXT: [[I_INC_7]] = add i32 [[I_INC_6]], 1 86; CHECK-NEXT: br i1 [[C2_7]], label [[EXIT2_UNR_LCSSA:%.*]], label [[LOOP]] 87; 88entry: 89 %n2 = add i32 %s, 123 90 br label %loop 91 92loop: 93 %i = phi i32 [ %s, %entry], [ %i.inc, %latch ] 94 %c1 = icmp eq i32 %i, %n2 95 br i1 %c1, label %exit1, label %latch 96 97latch: 98 %c2 = icmp eq i32 %i, %n 99 %i.inc = add i32 %i, 1 100 br i1 %c2, label %exit2, label %loop 101 102exit1: 103 ret void 104 105exit2: 106 ret void 107} 108