1; RUN: opt -mtriple=armv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A 2; RUN: opt -mtriple=thumbv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A 3; RUN: opt -mtriple=thumbv8m -mcpu=cortex-m23 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T1 4; RUN: opt -mtriple=thumbv8m.main -mcpu=cortex-m33 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T2 5; RUN: opt -mtriple=thumbv7em -mcpu=cortex-m7 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T2 6 7; CHECK-LABEL: partial 8define arm_aapcs_vfpcc void @partial(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #0 { 9entry: 10 br label %for.body 11 12; CHECK-LABEL: for.body 13for.body: 14 15; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV2:%[a-z.0-9]+]], %for.body ] 16; CHECK-UNROLL-A: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 17; CHECK-UNROLL-A: [[IV2]] = add nuw nsw i32 [[IV1]], 1 18; CHECK-UNROLL-A: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV2]], 1024 19; CHECK-UNROLL-A: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body 20 21; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 22; CHECK-UNROLL-T1: [[IV1]] = add nuw nsw i32 [[IV0]], 1 23; CHECK-UNROLL-T1: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV1]], 1024 24; CHECK-UNROLL-T1: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body 25 26; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV16:%[a-z.0-9]+]], %for.body ] 27; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 28; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1 29; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1 30; CHECK-UNROLL-T2: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1 31; CHECK-UNROLL-T2: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1 32; CHECK-UNROLL-T2: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1 33; CHECK-UNROLL-T2: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1 34; CHECK-UNROLL-T2: [[IV8:%[a-z.0-9]+]] = add nuw nsw i32 [[IV7]], 1 35; CHECK-UNROLL-T2: [[IV9:%[a-z.0-9]+]] = add nuw nsw i32 [[IV8]], 1 36; CHECK-UNROLL-T2: [[IV10:%[a-z.0-9]+]] = add nuw nsw i32 [[IV9]], 1 37; CHECK-UNROLL-T2: [[IV11:%[a-z.0-9]+]] = add nuw nsw i32 [[IV10]], 1 38; CHECK-UNROLL-T2: [[IV12:%[a-z.0-9]+]] = add nuw nsw i32 [[IV11]], 1 39; CHECK-UNROLL-T2: [[IV13:%[a-z.0-9]+]] = add nuw nsw i32 [[IV12]], 1 40; CHECK-UNROLL-T2: [[IV14:%[a-z.0-9]+]] = add nuw nsw i32 [[IV13]], 1 41; CHECK-UNROLL-T2: [[IV15:%[a-z.0-9]+]] = add nuw nsw i32 [[IV14]], 1 42; CHECK-UNROLL-T2: [[IV16]] = add nuw nsw i32 [[IV15]], 1 43; CHECK-UNROLL-T2: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV16]], 1024 44; CHECK-UNROLL-T2: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body 45 46 %i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ] 47 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08 48 %0 = load i32, i32* %arrayidx, align 4 49 %arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08 50 %1 = load i32, i32* %arrayidx1, align 4 51 %mul = mul nsw i32 %1, %0 52 %arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08 53 store i32 %mul, i32* %arrayidx2, align 4 54 %inc = add nuw nsw i32 %i.08, 1 55 %exitcond = icmp eq i32 %inc, 1024 56 br i1 %exitcond, label %for.cond.cleanup, label %for.body 57 58for.cond.cleanup: 59 ret void 60} 61 62; CHECK-LABEL: runtime 63define arm_aapcs_vfpcc void @runtime(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B, i32 %N) local_unnamed_addr #0 { 64entry: 65 %cmp8 = icmp eq i32 %N, 0 66 br i1 %cmp8, label %for.cond.cleanup, label %for.body 67 68; CHECK-LABEL: for.body 69for.body: 70; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV2:%[a-z.0-9]+]], %for.body ] 71; CHECK-UNROLL-A: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 72; CHECK-UNROLL-A: [[IV2]] = add nuw i32 [[IV1]], 1 73; CHECK-UNROLL-A: br 74 75; CHECK-UNROLL-T1: %i.09 = phi i32 [ %inc, %for.body ], [ 0 76; CHECK-UNROLL-T1: %inc = add nuw i32 %i.09, 1 77; CHECK-UNROLL-T1: %exitcond = icmp eq i32 %inc, %N 78; CHECK-UNROLL-T1: br 79 80; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body ] 81; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 82; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1 83; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1 84; CHECK-UNROLL-T2: [[IV4]] = add nuw i32 [[IV3]], 1 85; CHECK-UNROLL-T2: br 86 87; CHECK-UNROLL-T2: for.body.epil: 88; CHECK-UNROLL-T2: for.body.epil.1: 89; CHECK-UNROLL-T2: for.body.epil.2: 90 91 %i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ] 92 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.09 93 %0 = load i32, i32* %arrayidx, align 4 94 %arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.09 95 %1 = load i32, i32* %arrayidx1, align 4 96 %mul = mul nsw i32 %1, %0 97 %arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.09 98 store i32 %mul, i32* %arrayidx2, align 4 99 %inc = add nuw i32 %i.09, 1 100 %exitcond = icmp eq i32 %inc, %N 101 br i1 %exitcond, label %for.cond.cleanup, label %for.body 102 103for.cond.cleanup: 104 ret void 105} 106 107; CHECK-LABEL: nested_runtime 108define arm_aapcs_vfpcc void @nested_runtime(i32* nocapture %C, i16* nocapture readonly %A, i16* nocapture readonly %B, i32 %N) local_unnamed_addr #0 { 109entry: 110 %cmp25 = icmp eq i32 %N, 0 111 br i1 %cmp25, label %for.cond.cleanup, label %for.body4.lr.ph 112 113for.body4.lr.ph: 114 %h.026 = phi i32 [ %inc11, %for.cond.cleanup3 ], [ 0, %entry ] 115 %mul = mul i32 %h.026, %N 116 br label %for.body4 117 118for.cond.cleanup: 119 ret void 120 121for.cond.cleanup3: 122 %inc11 = add nuw i32 %h.026, 1 123 %exitcond27 = icmp eq i32 %inc11, %N 124 br i1 %exitcond27, label %for.cond.cleanup, label %for.body4.lr.ph 125 126; CHECK-LABEL: for.body4 127for.body4: 128; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV1:%[a-z.0-9]+]], %for.body4 ] 129; CHECK-UNROLL-T1: [[IV1]] = add nuw i32 [[IV0]], 1 130; CHECK-UNROLL-T1: br 131 132; CHECK-UNROLL-T2: for.body4.epil: 133; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body4 ] 134; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1 135; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1 136; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1 137; CHECK-UNROLL-T2: [[IV4]] = add nuw i32 [[IV3]], 1 138; CHECK-UNROLL-T2: br 139; CHECK-UNROLL-T2: for.body4.epil.1: 140; CHECK-UNROLL-T2: for.body4.epil.2: 141 142 %w.024 = phi i32 [ 0, %for.body4.lr.ph ], [ %inc, %for.body4 ] 143 %add = add i32 %w.024, %mul 144 %arrayidx = getelementptr inbounds i16, i16* %A, i32 %add 145 %0 = load i16, i16* %arrayidx, align 2 146 %conv = sext i16 %0 to i32 147 %arrayidx5 = getelementptr inbounds i16, i16* %B, i32 %w.024 148 %1 = load i16, i16* %arrayidx5, align 2 149 %conv6 = sext i16 %1 to i32 150 %mul7 = mul nsw i32 %conv6, %conv 151 %arrayidx8 = getelementptr inbounds i32, i32* %C, i32 %w.024 152 %2 = load i32, i32* %arrayidx8, align 4 153 %add9 = add nsw i32 %mul7, %2 154 store i32 %add9, i32* %arrayidx8, align 4 155 %inc = add nuw i32 %w.024, 1 156 %exitcond = icmp eq i32 %inc, %N 157 br i1 %exitcond, label %for.cond.cleanup3, label %for.body4 158} 159 160; CHECK-LABEL: loop_call 161define arm_aapcs_vfpcc void @loop_call(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #1 { 162entry: 163 br label %for.body 164 165for.cond.cleanup: 166 ret void 167 168; CHECK-LABEL: for.body 169for.body: 170; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 171; CHECK-UNROLL-A: [[IV1]] = add nuw nsw i32 [[IV0]], 1 172; CHECK-UNROLL-A: icmp eq i32 [[IV1]], 1024 173; CHECK-UNROLL-A: br 174 175; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 176; CHECK-UNROLL-T1: [[IV1]] = add nuw nsw i32 [[IV0]], 1 177; CHECK-UNROLL-T1: icmp eq i32 [[IV1]], 1024 178; CHECK-UNROLL-T1: br 179 180; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ] 181; CHECK-UNROLL-T2: [[IV1]] = add nuw nsw i32 [[IV0]], 1 182; CHECK-UNROLL-T2: icmp eq i32 [[IV1]], 1024 183; CHECK-UNROLL-T2: br 184 185 %i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ] 186 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08 187 %0 = load i32, i32* %arrayidx, align 4 188 %arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08 189 %1 = load i32, i32* %arrayidx1, align 4 190 %call = tail call arm_aapcs_vfpcc i32 @some_func(i32 %0, i32 %1) #3 191 %arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08 192 store i32 %call, i32* %arrayidx2, align 4 193 %inc = add nuw nsw i32 %i.08, 1 194 %exitcond = icmp eq i32 %inc, 1024 195 br i1 %exitcond, label %for.cond.cleanup, label %for.body 196} 197 198; CHECK-LABEL: iterate_inc 199; CHECK-UNROLL-A: %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ] 200; CHECK-UNROLL-A: %tobool = icmp eq %struct.Node* %1, null 201; CHECK-UNROLL-A: br i1 %tobool 202; CHECK-UNROLL-A-NOT: load 203 204; CHECK-UNROLL-T1: %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ] 205; CHECK-UNROLL-T1: %tobool = icmp eq %struct.Node* %1, null 206; CHECK-UNROLL-T1: br i1 %tobool 207; CHECK-UNROLL-T1-NOT: load 208 209; CHECK-UNROLL-T2: [[CMP0:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR0:%[a-z.0-9]+]], null 210; CHECK-UNROLL-T2: br i1 [[CMP0]], label [[END:%[a-z.0-9]+]] 211; CHECK-UNROLL-T2: [[CMP1:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR1:%[a-z.0-9]+]], null 212; CHECK-UNROLL-T2: br i1 [[CMP1]], label [[END]] 213; CHECK-UNROLL-T2: [[CMP2:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR2:%[a-z.0-9]+]], null 214; CHECK-UNROLL-T2: br i1 [[CMP2]], label [[END]] 215; CHECK-UNROLL-T2: [[CMP3:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR3:%[a-z.0-9]+]], null 216; CHECK-UNROLL-T2: br i1 [[CMP3]], label [[END]] 217; CHECK-UNROLL-T2: [[CMP4:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR4:%[a-z.0-9]+]], null 218; CHECK-UNROLL-T2: br i1 [[CMP4]], label [[END]] 219; CHECK-UNROLL-T2-NOT: load 220 221%struct.Node = type { %struct.Node*, i32 } 222 223define arm_aapcscc void @iterate_inc(%struct.Node* %n) local_unnamed_addr #0 { 224entry: 225 %tobool3 = icmp eq %struct.Node* %n, null 226 br i1 %tobool3, label %while.end, label %while.body.preheader 227 228while.body.preheader: 229 br label %while.body 230 231while.body: 232 %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ] 233 %val = getelementptr inbounds %struct.Node, %struct.Node* %n.addr.04, i32 0, i32 1 234 %0 = load i32, i32* %val, align 4 235 %add = add nsw i32 %0, 1 236 store i32 %add, i32* %val, align 4 237 %next = getelementptr inbounds %struct.Node, %struct.Node* %n.addr.04, i32 0, i32 0 238 %1 = load %struct.Node*, %struct.Node** %next, align 4 239 %tobool = icmp eq %struct.Node* %1, null 240 br i1 %tobool, label %while.end, label %while.body 241 242while.end: 243 ret void 244} 245 246declare arm_aapcs_vfpcc i32 @some_func(i32, i32) local_unnamed_addr #2 247