1*1fb415feSJohannes Doerfert; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2*1fb415feSJohannes Doerfert; RUN: opt -mtriple=amdgcn-amd-amdhsa -basic-aa -load-store-vectorizer -S -o - %s | FileCheck %s
3*1fb415feSJohannes Doerfert
4*1fb415feSJohannes Doerfert; Vectorize and emit valid code (Issue #54896).
5*1fb415feSJohannes Doerfert
6*1fb415feSJohannes Doerfert%S = type { i64, i64 }
7*1fb415feSJohannes Doerfert@S = external global %S
8*1fb415feSJohannes Doerfert
9*1fb415feSJohannes Doerfertdefine i64 @order() {
10*1fb415feSJohannes Doerfert; CHECK-LABEL: @order(
11*1fb415feSJohannes Doerfert; CHECK-NEXT:    [[IDX0:%.*]] = getelementptr inbounds [[S:%.*]], ptr @S, i32 0, i32 0
12*1fb415feSJohannes Doerfert; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i64>, ptr [[IDX0]], align 8
13*1fb415feSJohannes Doerfert; CHECK-NEXT:    [[L01:%.*]] = extractelement <2 x i64> [[TMP1]], i32 0
14*1fb415feSJohannes Doerfert; CHECK-NEXT:    [[L12:%.*]] = extractelement <2 x i64> [[TMP1]], i32 1
15*1fb415feSJohannes Doerfert; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[L01]], [[L12]]
16*1fb415feSJohannes Doerfert; CHECK-NEXT:    ret i64 [[ADD]]
17*1fb415feSJohannes Doerfert;
18*1fb415feSJohannes Doerfert  %idx1 = getelementptr inbounds %S, ptr @S, i32 0, i32 1
19*1fb415feSJohannes Doerfert  %l1 = load i64, i64* %idx1, align 8
20*1fb415feSJohannes Doerfert  %idx0 = getelementptr inbounds %S, ptr @S, i32 0, i32 0
21*1fb415feSJohannes Doerfert  %l0 = load i64, i64* %idx0, align 8
22*1fb415feSJohannes Doerfert  %add = add i64 %l0, %l1
23*1fb415feSJohannes Doerfert  ret i64 %add
24*1fb415feSJohannes Doerfert}
25