1; RUN: opt -mtriple=amdgcn-amd-amdhsa -basicaa -load-store-vectorizer -S -o - %s | FileCheck %s
2
3target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
4
5declare i64 @_Z12get_local_idj(i32)
6
7declare i64 @_Z12get_group_idj(i32)
8
9declare double @llvm.fmuladd.f64(double, double, double)
10
11; CHECK-LABEL: @factorizedVsNonfactorizedAccess(
12; CHECK: load <2 x float>
13; CHECK: store <2 x float>
14define amdgpu_kernel void @factorizedVsNonfactorizedAccess(float addrspace(1)* nocapture %c) {
15entry:
16  %call = tail call i64 @_Z12get_local_idj(i32 0)
17  %call1 = tail call i64 @_Z12get_group_idj(i32 0)
18  %div = lshr i64 %call, 4
19  %div2 = lshr i64 %call1, 3
20  %mul = shl i64 %div2, 7
21  %rem = shl i64 %call, 3
22  %mul3 = and i64 %rem, 120
23  %add = or i64 %mul, %mul3
24  %rem4 = shl i64 %call1, 7
25  %mul5 = and i64 %rem4, 896
26  %mul6 = shl nuw nsw i64 %div, 3
27  %add7 = add nuw i64 %mul5, %mul6
28  %mul9 = shl i64 %add7, 10
29  %add10 = add i64 %mul9, %add
30  %arrayidx = getelementptr inbounds float, float addrspace(1)* %c, i64 %add10
31  %load1 = load float, float addrspace(1)* %arrayidx, align 4
32  %conv = fpext float %load1 to double
33  %mul11 = fmul double %conv, 0x3FEAB481D8F35506
34  %conv12 = fptrunc double %mul11 to float
35  %conv18 = fpext float %conv12 to double
36  %storeval1 = tail call double @llvm.fmuladd.f64(double 0x3FF4FFAFBBEC946A, double 0.000000e+00, double %conv18)
37  %cstoreval1 = fptrunc double %storeval1 to float
38  store float %cstoreval1, float addrspace(1)* %arrayidx, align 4
39
40  %add23 = or i64 %add10, 1
41  %arrayidx24 = getelementptr inbounds float, float addrspace(1)* %c, i64 %add23
42  %load2 = load float, float addrspace(1)* %arrayidx24, align 4
43  %conv25 = fpext float %load2 to double
44  %mul26 = fmul double %conv25, 0x3FEAB481D8F35506
45  %conv27 = fptrunc double %mul26 to float
46  %conv34 = fpext float %conv27 to double
47  %storeval2 = tail call double @llvm.fmuladd.f64(double 0x3FF4FFAFBBEC946A, double 0.000000e+00, double %conv34)
48  %cstoreval2 = fptrunc double %storeval2 to float
49  store float %cstoreval2, float addrspace(1)* %arrayidx24, align 4
50  ret void
51}