1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instsimplify -S | FileCheck %s 3 4define <4 x i32> @const_folding(<4 x i32> %x) { 5; CHECK-LABEL: @const_folding( 6; CHECK-NEXT: ret <4 x i32> zeroinitializer 7; 8 %shuf = shufflevector <4 x i32> %x, <4 x i32> zeroinitializer, <4 x i32> <i32 5, i32 4, i32 5, i32 4> 9 ret <4 x i32> %shuf 10} 11 12define <4 x i32> @const_folding1(<4 x i32> %x) { 13; CHECK-LABEL: @const_folding1( 14; CHECK-NEXT: ret <4 x i32> <i32 5, i32 5, i32 5, i32 5> 15; 16 %shuf = shufflevector <4 x i32> <i32 5, i32 4, i32 5, i32 4>, <4 x i32> %x, <4 x i32> zeroinitializer 17 ret <4 x i32> %shuf 18} 19 20define <4 x i32> @const_folding_negative(<3 x i32> %x) { 21; CHECK-LABEL: @const_folding_negative( 22; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i32> [[X:%.*]], <3 x i32> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 5, i32 4> 23; CHECK-NEXT: ret <4 x i32> [[SHUF]] 24; 25 %shuf = shufflevector <3 x i32> %x, <3 x i32> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 5, i32 4> 26 ret <4 x i32> %shuf 27} 28 29define <4 x i32> @splat_operand(<4 x i32> %x) { 30; CHECK-LABEL: @splat_operand( 31; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer 32; CHECK-NEXT: ret <4 x i32> [[SPLAT]] 33; 34 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer 35 %shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 36 ret <4 x i32> %shuf 37} 38 39define <4 x i32> @splat_operand1(<4 x i32> %x, <4 x i32> %y) { 40; CHECK-LABEL: @splat_operand1( 41; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> zeroinitializer 42; CHECK-NEXT: ret <4 x i32> [[SPLAT]] 43; 44 %splat = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> zeroinitializer 45 %shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 46 ret <4 x i32> %shuf 47} 48 49define <4 x i32> @splat_operand2(<4 x i32> %x, <4 x i32> %y) { 50; CHECK-LABEL: @splat_operand2( 51; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer 52; CHECK-NEXT: ret <4 x i32> [[SPLAT]] 53; 54 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer 55 %shuf = shufflevector <4 x i32> %splat, <4 x i32> %y, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 56 ret <4 x i32> %shuf 57} 58 59define <4 x i32> @splat_operand3(<4 x i32> %x) { 60; CHECK-LABEL: @splat_operand3( 61; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer 62; CHECK-NEXT: ret <4 x i32> [[SPLAT]] 63; 64 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer 65 %shuf = shufflevector <4 x i32> zeroinitializer, <4 x i32> %splat, <4 x i32> <i32 7, i32 6, i32 5, i32 5> 66 ret <4 x i32> %shuf 67} 68 69define <8 x i32> @splat_operand_negative(<4 x i32> %x) { 70; CHECK-LABEL: @splat_operand_negative( 71; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer 72; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[SPLAT]], <4 x i32> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 1, i32 undef, i32 undef, i32 undef, i32 undef> 73; CHECK-NEXT: ret <8 x i32> [[SHUF]] 74; 75 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer 76 %shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <8 x i32> <i32 0, i32 3, i32 2, i32 1, i32 undef, i32 undef, i32 undef, i32 undef> 77 ret <8 x i32> %shuf 78} 79 80define <4 x i32> @splat_operand_negative2(<4 x i32> %x, <4 x i32> %y) { 81; CHECK-LABEL: @splat_operand_negative2( 82; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer 83; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[SPLAT]], <4 x i32> [[Y:%.*]], <4 x i32> <i32 0, i32 3, i32 4, i32 1> 84; CHECK-NEXT: ret <4 x i32> [[SHUF]] 85; 86 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer 87 %shuf = shufflevector <4 x i32> %splat, <4 x i32> %y, <4 x i32> <i32 0, i32 3, i32 4, i32 1> 88 ret <4 x i32> %shuf 89} 90 91define <4 x i32> @splat_operand_negative3(<4 x i32> %x, <4 x i32> %y) { 92; CHECK-LABEL: @splat_operand_negative3( 93; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer 94; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[Y:%.*]], <4 x i32> [[SPLAT]], <4 x i32> <i32 0, i32 3, i32 4, i32 1> 95; CHECK-NEXT: ret <4 x i32> [[SHUF]] 96; 97 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer 98 %shuf = shufflevector <4 x i32> %y, <4 x i32> %splat, <4 x i32> <i32 0, i32 3, i32 4, i32 1> 99 ret <4 x i32> %shuf 100} 101 102define <4 x i32> @splat_operand_negative4(<4 x i32> %x) { 103; CHECK-LABEL: @splat_operand_negative4( 104; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef> 105; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[SPLAT]], <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> 106; CHECK-NEXT: ret <4 x i32> [[SHUF]] 107; 108 %splat = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef> 109 %shuf = shufflevector <4 x i32> %splat, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> 110 ret <4 x i32> %shuf 111} 112 113define <4 x i32> @undef_mask(<4 x i32> %x) { 114; CHECK-LABEL: @undef_mask( 115; CHECK-NEXT: ret <4 x i32> undef 116; 117 %shuf = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> undef 118 ret <4 x i32> %shuf 119} 120 121define <4 x i32> @identity_mask_0(<4 x i32> %x) { 122; CHECK-LABEL: @identity_mask_0( 123; CHECK-NEXT: ret <4 x i32> [[X:%.*]] 124; 125 %shuf = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 126 ret <4 x i32> %shuf 127} 128 129define <4 x i32> @identity_mask_1(<4 x i32> %x) { 130; CHECK-LABEL: @identity_mask_1( 131; CHECK-NEXT: ret <4 x i32> [[X:%.*]] 132; 133 %shuf = shufflevector <4 x i32> undef, <4 x i32> %x, <4 x i32> <i32 4, i32 5, i32 6, i32 7> 134 ret <4 x i32> %shuf 135} 136 137define <4 x i32> @pseudo_identity_mask(<4 x i32> %x) { 138; CHECK-LABEL: @pseudo_identity_mask( 139; CHECK-NEXT: ret <4 x i32> [[X:%.*]] 140; 141 %shuf = shufflevector <4 x i32> %x, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 2, i32 7> 142 ret <4 x i32> %shuf 143} 144 145define <4 x i32> @not_identity_mask(<4 x i32> %x) { 146; CHECK-LABEL: @not_identity_mask( 147; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 2, i32 6> 148; CHECK-NEXT: ret <4 x i32> [[SHUF]] 149; 150 %shuf = shufflevector <4 x i32> %x, <4 x i32> %x, <4 x i32> <i32 0, i32 1, i32 2, i32 6> 151 ret <4 x i32> %shuf 152} 153 154; TODO: Should we simplify if the mask has an undef element? 155 156define <4 x i32> @possible_identity_mask(<4 x i32> %x) { 157; CHECK-LABEL: @possible_identity_mask( 158; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 159; CHECK-NEXT: ret <4 x i32> [[SHUF]] 160; 161 %shuf = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef> 162 ret <4 x i32> %shuf 163} 164 165define <4 x i32> @const_operand(<4 x i32> %x) { 166; CHECK-LABEL: @const_operand( 167; CHECK-NEXT: ret <4 x i32> <i32 42, i32 45, i32 44, i32 43> 168; 169 %shuf = shufflevector <4 x i32> <i32 42, i32 43, i32 44, i32 45>, <4 x i32> %x, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 170 ret <4 x i32> %shuf 171} 172 173define <4 x i32> @merge(<4 x i32> %x) { 174; CHECK-LABEL: @merge( 175; CHECK-NEXT: ret <4 x i32> [[X:%.*]] 176; 177 %lower = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 1, i32 0> 178 %upper = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 2, i32 3> 179 %merged = shufflevector <2 x i32> %upper, <2 x i32> %lower, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 180 ret <4 x i32> %merged 181} 182 183; This crosses lanes from the source op. 184 185define <4 x i32> @not_merge(<4 x i32> %x) { 186; CHECK-LABEL: @not_merge( 187; CHECK-NEXT: [[L:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <2 x i32> <i32 0, i32 1> 188; CHECK-NEXT: [[U:%.*]] = shufflevector <4 x i32> [[X]], <4 x i32> undef, <2 x i32> <i32 2, i32 3> 189; CHECK-NEXT: [[MERGED:%.*]] = shufflevector <2 x i32> [[U]], <2 x i32> [[L]], <4 x i32> <i32 3, i32 2, i32 0, i32 1> 190; CHECK-NEXT: ret <4 x i32> [[MERGED]] 191; 192 %l = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 193 %u = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 2, i32 3> 194 %merged = shufflevector <2 x i32> %u, <2 x i32> %l, <4 x i32> <i32 3, i32 2, i32 0, i32 1> 195 ret <4 x i32> %merged 196} 197 198define <8 x double> @extract_and_concat(<8 x double> %x) { 199; CHECK-LABEL: @extract_and_concat( 200; CHECK-NEXT: ret <8 x double> [[X:%.*]] 201; 202 %s1 = shufflevector <8 x double> %x, <8 x double> undef, <2 x i32> <i32 0, i32 1> 203 %s2 = shufflevector <8 x double> %x, <8 x double> undef, <2 x i32> <i32 2, i32 3> 204 %s3 = shufflevector <8 x double> %x, <8 x double> undef, <2 x i32> <i32 4, i32 5> 205 %s4 = shufflevector <8 x double> %x, <8 x double> undef, <2 x i32> <i32 6, i32 7> 206 %s5 = shufflevector <2 x double> %s1, <2 x double> %s2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 207 %s6 = shufflevector <2 x double> %s3, <2 x double> %s4, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 208 %s7 = shufflevector <4 x double> %s5, <4 x double> %s6, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 209 ret <8 x double> %s7 210} 211 212; This case has intermediate lane crossings. 213 214define <8 x i64> @PR30630(<8 x i64> %x) { 215; CHECK-LABEL: @PR30630( 216; CHECK-NEXT: ret <8 x i64> [[X:%.*]] 217; 218 %s1 = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 0, i32 4> 219 %s2 = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 1, i32 5> 220 %s3 = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 2, i32 6> 221 %s4 = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 3, i32 7> 222 %s5 = shufflevector <2 x i64> %s1, <2 x i64> %s2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 223 %s6 = shufflevector <2 x i64> %s3, <2 x i64> %s4, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 224 %s7 = shufflevector <4 x i64> %s5, <4 x i64> %s6, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 1, i32 3, i32 5, i32 7> 225 ret <8 x i64> %s7 226} 227 228