1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=instcombine -S | FileCheck %s 3 4define i32 @extractelement_in_range(<vscale x 4 x i32> %a) { 5; CHECK-LABEL: @extractelement_in_range( 6; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 1 7; CHECK-NEXT: ret i32 [[R]] 8; 9 %r = extractelement <vscale x 4 x i32> %a, i64 1 10 ret i32 %r 11} 12 13define i32 @extractelement_maybe_out_of_range(<vscale x 4 x i32> %a) { 14; CHECK-LABEL: @extractelement_maybe_out_of_range( 15; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[A:%.*]], i64 4 16; CHECK-NEXT: ret i32 [[R]] 17; 18 %r = extractelement <vscale x 4 x i32> %a, i64 4 19 ret i32 %r 20} 21 22define i32 @extractelement_bitcast(float %f) { 23; CHECK-LABEL: @extractelement_bitcast( 24; CHECK-NEXT: [[R:%.*]] = bitcast float [[F:%.*]] to i32 25; CHECK-NEXT: ret i32 [[R]] 26; 27 %vec_float = insertelement <vscale x 4 x float> undef, float %f, i32 0 28 %vec_int = bitcast <vscale x 4 x float> %vec_float to <vscale x 4 x i32> 29 %r = extractelement <vscale x 4 x i32> %vec_int, i32 0 30 ret i32 %r 31} 32 33define i8 @extractelement_bitcast_to_trunc(<vscale x 2 x i32> %a, i32 %x) { 34; CHECK-LABEL: @extractelement_bitcast_to_trunc( 35; CHECK-NEXT: [[R:%.*]] = trunc i32 [[X:%.*]] to i8 36; CHECK-NEXT: ret i8 [[R]] 37; 38 %vec = insertelement <vscale x 2 x i32> %a, i32 %x, i32 1 39 %vec_cast = bitcast <vscale x 2 x i32> %vec to <vscale x 8 x i8> 40 %r = extractelement <vscale x 8 x i8> %vec_cast, i32 4 41 ret i8 %r 42} 43 44; TODO: Instcombine could remove the insert. 45define i8 @extractelement_bitcast_wrong_insert(<vscale x 2 x i32> %a, i32 %x) { 46; CHECK-LABEL: @extractelement_bitcast_wrong_insert( 47; CHECK-NEXT: [[VEC:%.*]] = insertelement <vscale x 2 x i32> [[A:%.*]], i32 [[X:%.*]], i64 1 48; CHECK-NEXT: [[VEC_CAST:%.*]] = bitcast <vscale x 2 x i32> [[VEC]] to <vscale x 8 x i8> 49; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 8 x i8> [[VEC_CAST]], i64 2 50; CHECK-NEXT: ret i8 [[R]] 51; 52 %vec = insertelement <vscale x 2 x i32> %a, i32 %x, i32 1 ; <- This insert could be removed. 53 %vec_cast = bitcast <vscale x 2 x i32> %vec to <vscale x 8 x i8> 54 %r = extractelement <vscale x 8 x i8> %vec_cast, i32 2 55 ret i8 %r 56} 57 58define i32 @extractelement_shuffle_maybe_out_of_range(i32 %v) { 59; CHECK-LABEL: @extractelement_shuffle_maybe_out_of_range( 60; CHECK-NEXT: [[IN:%.*]] = insertelement <vscale x 4 x i32> undef, i32 [[V:%.*]], i64 0 61; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[IN]], <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer 62; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[SPLAT]], i64 4 63; CHECK-NEXT: ret i32 [[R]] 64; 65 %in = insertelement <vscale x 4 x i32> undef, i32 %v, i32 0 66 %splat = shufflevector <vscale x 4 x i32> %in, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer 67 %r = extractelement <vscale x 4 x i32> %splat, i32 4 68 ret i32 %r 69} 70 71define i32 @extractelement_shuffle_invalid_index(i32 %v) { 72; CHECK-LABEL: @extractelement_shuffle_invalid_index( 73; CHECK-NEXT: [[IN:%.*]] = insertelement <vscale x 4 x i32> undef, i32 [[V:%.*]], i64 0 74; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[IN]], <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer 75; CHECK-NEXT: [[R:%.*]] = extractelement <vscale x 4 x i32> [[SPLAT]], i64 4294967295 76; CHECK-NEXT: ret i32 [[R]] 77; 78 %in = insertelement <vscale x 4 x i32> undef, i32 %v, i32 0 79 %splat = shufflevector <vscale x 4 x i32> %in, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer 80 %r = extractelement <vscale x 4 x i32> %splat, i32 -1 81 ret i32 %r 82} 83 84define <vscale x 4 x i32> @extractelement_insertelement_same_positions(<vscale x 4 x i32> %vec) { 85; CHECK-LABEL: @extractelement_insertelement_same_positions( 86; CHECK-NEXT: ret <vscale x 4 x i32> [[VEC:%.*]] 87; 88 %vec.e0 = extractelement <vscale x 4 x i32> %vec, i32 0 89 %vec.e1 = extractelement <vscale x 4 x i32> %vec, i32 1 90 %vec.e2 = extractelement <vscale x 4 x i32> %vec, i32 2 91 %vec.e3 = extractelement <vscale x 4 x i32> %vec, i32 3 92 %1 = insertelement <vscale x 4 x i32> %vec, i32 %vec.e0, i32 0 93 %2 = insertelement <vscale x 4 x i32> %1, i32 %vec.e1, i32 1 94 %3 = insertelement <vscale x 4 x i32> %2, i32 %vec.e2, i32 2 95 %4 = insertelement <vscale x 4 x i32> %3, i32 %vec.e3, i32 3 96 ret <vscale x 4 x i32> %4 97} 98 99define <vscale x 4 x i32> @extractelement_insertelement_diff_positions(<vscale x 4 x i32> %vec) { 100; CHECK-LABEL: @extractelement_insertelement_diff_positions( 101; CHECK-NEXT: [[VEC_E0:%.*]] = extractelement <vscale x 4 x i32> [[VEC:%.*]], i64 4 102; CHECK-NEXT: [[VEC_E1:%.*]] = extractelement <vscale x 4 x i32> [[VEC]], i64 5 103; CHECK-NEXT: [[VEC_E2:%.*]] = extractelement <vscale x 4 x i32> [[VEC]], i64 6 104; CHECK-NEXT: [[VEC_E3:%.*]] = extractelement <vscale x 4 x i32> [[VEC]], i64 7 105; CHECK-NEXT: [[TMP1:%.*]] = insertelement <vscale x 4 x i32> [[VEC]], i32 [[VEC_E0]], i64 0 106; CHECK-NEXT: [[TMP2:%.*]] = insertelement <vscale x 4 x i32> [[TMP1]], i32 [[VEC_E1]], i64 1 107; CHECK-NEXT: [[TMP3:%.*]] = insertelement <vscale x 4 x i32> [[TMP2]], i32 [[VEC_E2]], i64 2 108; CHECK-NEXT: [[TMP4:%.*]] = insertelement <vscale x 4 x i32> [[TMP3]], i32 [[VEC_E3]], i64 3 109; CHECK-NEXT: ret <vscale x 4 x i32> [[TMP4]] 110; 111 %vec.e0 = extractelement <vscale x 4 x i32> %vec, i32 4 112 %vec.e1 = extractelement <vscale x 4 x i32> %vec, i32 5 113 %vec.e2 = extractelement <vscale x 4 x i32> %vec, i32 6 114 %vec.e3 = extractelement <vscale x 4 x i32> %vec, i32 7 115 %1 = insertelement <vscale x 4 x i32> %vec, i32 %vec.e0, i32 0 116 %2 = insertelement <vscale x 4 x i32> %1, i32 %vec.e1, i32 1 117 %3 = insertelement <vscale x 4 x i32> %2, i32 %vec.e2, i32 2 118 %4 = insertelement <vscale x 4 x i32> %3, i32 %vec.e3, i32 3 119 ret <vscale x 4 x i32> %4 120} 121 122define i32 @bitcast_of_extractelement( <vscale x 2 x float> %d) { 123; CHECK-LABEL: @bitcast_of_extractelement( 124; CHECK-NEXT: [[BC:%.*]] = bitcast <vscale x 2 x float> [[D:%.*]] to <vscale x 2 x i32> 125; CHECK-NEXT: [[CAST:%.*]] = extractelement <vscale x 2 x i32> [[BC]], i64 0 126; CHECK-NEXT: ret i32 [[CAST]] 127; 128 %ext = extractelement <vscale x 2 x float> %d, i32 0 129 %cast = bitcast float %ext to i32 130 ret i32 %cast 131} 132 133define i1 @extractelement_is_zero(<vscale x 2 x i32> %d, i1 %b, i32 %z) { 134; CHECK-LABEL: @extractelement_is_zero( 135; CHECK-NEXT: [[EXT:%.*]] = extractelement <vscale x 2 x i32> [[D:%.*]], i64 0 136; CHECK-NEXT: [[BB:%.*]] = icmp eq i32 [[EXT]], 0 137; CHECK-NEXT: ret i1 [[BB]] 138; 139 %ext = extractelement <vscale x 2 x i32> %d, i32 0 140 %bb = icmp eq i32 %ext, 0 141 ret i1 %bb 142} 143 144; OSS-Fuzz #25272 145; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=25272 146define i32 @ossfuzz_25272(float %f) { 147; CHECK-LABEL: @ossfuzz_25272( 148; CHECK-NEXT: [[VEC_FLOAT:%.*]] = insertelement <vscale x 4 x float> undef, float [[F:%.*]], i64 0 149; CHECK-NEXT: [[VEC_INT:%.*]] = bitcast <vscale x 4 x float> [[VEC_FLOAT]] to <vscale x 4 x i32> 150; CHECK-NEXT: [[E:%.*]] = extractelement <vscale x 4 x i32> [[VEC_INT]], i64 2147483647 151; CHECK-NEXT: ret i32 [[E]] 152; 153 %vec_float = insertelement <vscale x 4 x float> undef, float %f, i32 0 154 %vec_int = bitcast <vscale x 4 x float> %vec_float to <vscale x 4 x i32> 155 %E = extractelement <vscale x 4 x i32> %vec_int, i32 2147483647 156 ret i32 %E 157} 158 159; Step vector optimization 160 161define i64 @ext_lane0_from_stepvec() { 162; CHECK-LABEL: @ext_lane0_from_stepvec( 163; CHECK-NEXT: entry: 164; CHECK-NEXT: ret i64 0 165; 166entry: 167 %0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 168 %1 = extractelement <vscale x 4 x i64> %0, i32 0 169 ret i64 %1 170} 171 172define i32 @ext_lane3_from_stepvec() { 173; CHECK-LABEL: @ext_lane3_from_stepvec( 174; CHECK-NEXT: entry: 175; CHECK-NEXT: ret i32 3 176; 177entry: 178 %0 = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32() 179 %1 = extractelement <vscale x 4 x i32> %0, i64 3 180 ret i32 %1 181} 182 183define i64 @ext_lane_out_of_range_from_stepvec() { 184; CHECK-LABEL: @ext_lane_out_of_range_from_stepvec( 185; CHECK-NEXT: entry: 186; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 187; CHECK-NEXT: [[TMP1:%.*]] = extractelement <vscale x 4 x i64> [[TMP0]], i64 4 188; CHECK-NEXT: ret i64 [[TMP1]] 189; 190entry: 191 %0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 192 %1 = extractelement <vscale x 4 x i64> %0, i32 4 193 ret i64 %1 194} 195 196define i64 @ext_lane_invalid_from_stepvec() { 197; CHECK-LABEL: @ext_lane_invalid_from_stepvec( 198; CHECK-NEXT: entry: 199; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 200; CHECK-NEXT: [[TMP1:%.*]] = extractelement <vscale x 4 x i64> [[TMP0]], i64 4294967295 201; CHECK-NEXT: ret i64 [[TMP1]] 202; 203entry: 204 %0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 205 %1 = extractelement <vscale x 4 x i64> %0, i32 -1 206 ret i64 %1 207} 208 209define i64 @ext_lane_unknown_from_stepvec(i32 %v) { 210; CHECK-LABEL: @ext_lane_unknown_from_stepvec( 211; CHECK-NEXT: entry: 212; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 213; CHECK-NEXT: [[TMP1:%.*]] = extractelement <vscale x 4 x i64> [[TMP0]], i32 [[V:%.*]] 214; CHECK-NEXT: ret i64 [[TMP1]] 215; 216entry: 217 %0 = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 218 %1 = extractelement <vscale x 4 x i64> %0, i32 %v 219 ret i64 %1 220} 221 222; Check that undef is returned when the extracted element has wrapped. 223 224define i8 @ext_lane256_from_stepvec() { 225; CHECK-LABEL: @ext_lane256_from_stepvec( 226; CHECK-NEXT: entry: 227; CHECK-NEXT: ret i8 undef 228; 229entry: 230 %0 = call <vscale x 512 x i8> @llvm.experimental.stepvector.nxv512i8() 231 %1 = extractelement <vscale x 512 x i8> %0, i64 256 232 ret i8 %1 233} 234 235define i8 @ext_lane255_from_stepvec() { 236; CHECK-LABEL: @ext_lane255_from_stepvec( 237; CHECK-NEXT: entry: 238; CHECK-NEXT: ret i8 -1 239; 240entry: 241 %0 = call <vscale x 512 x i8> @llvm.experimental.stepvector.nxv512i8() 242 %1 = extractelement <vscale x 512 x i8> %0, i64 255 243 ret i8 %1 244} 245 246; Check that we can extract more complex cases where the stepvector is 247; involved in a binary operation prior to the lane being extracted. 248 249define i64 @ext_lane0_from_add_with_stepvec(i64 %i) { 250; CHECK-LABEL: @ext_lane0_from_add_with_stepvec( 251; CHECK-NEXT: ret i64 [[I:%.*]] 252; 253 %tmp = insertelement <vscale x 2 x i64> poison, i64 %i, i32 0 254 %splatofi = shufflevector <vscale x 2 x i64> %tmp, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer 255 %stepvec = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64() 256 %add = add <vscale x 2 x i64> %splatofi, %stepvec 257 %res = extractelement <vscale x 2 x i64> %add, i32 0 258 ret i64 %res 259} 260 261define i1 @ext_lane1_from_cmp_with_stepvec(i64 %i) { 262; CHECK-LABEL: @ext_lane1_from_cmp_with_stepvec( 263; CHECK-NEXT: [[RES:%.*]] = icmp eq i64 [[I:%.*]], 1 264; CHECK-NEXT: ret i1 [[RES]] 265; 266 %tmp = insertelement <vscale x 2 x i64> poison, i64 %i, i32 0 267 %splatofi = shufflevector <vscale x 2 x i64> %tmp, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer 268 %stepvec = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64() 269 %cmp = icmp eq <vscale x 2 x i64> %splatofi, %stepvec 270 %res = extractelement <vscale x 2 x i1> %cmp, i32 1 271 ret i1 %res 272} 273 274define i64* @ext_lane_from_bitcast_of_splat(i32* %v) { 275; CHECK-LABEL: @ext_lane_from_bitcast_of_splat( 276; CHECK-NEXT: entry: 277; CHECK-NEXT: [[R:%.*]] = bitcast i32* [[V:%.*]] to i64* 278; CHECK-NEXT: ret i64* [[R]] 279; 280entry: 281 %in = insertelement <vscale x 4 x i32*> poison, i32* %v, i32 0 282 %splat = shufflevector <vscale x 4 x i32*> %in, <vscale x 4 x i32*> poison, <vscale x 4 x i32> zeroinitializer 283 %bc = bitcast <vscale x 4 x i32*> %splat to <vscale x 4 x i64*> 284 %r = extractelement <vscale x 4 x i64*> %bc, i32 3 285 ret i64* %r 286} 287 288declare <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64() 289declare <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64() 290declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32() 291declare <vscale x 512 x i8> @llvm.experimental.stepvector.nxv512i8() 292