1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4; This turns into a&1 != 0 5define <2 x i1> @test1(<2 x i64> %a) { 6; CHECK-LABEL: @test1( 7; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i64> %a, <i64 1, i64 1> 8; CHECK-NEXT: [[T:%.*]] = icmp ne <2 x i64> [[TMP1]], zeroinitializer 9; CHECK-NEXT: ret <2 x i1> [[T]] 10; 11 %t = trunc <2 x i64> %a to <2 x i1> 12 ret <2 x i1> %t 13} 14 15; The ashr turns into an lshr. 16define <2 x i64> @test2(<2 x i64> %a) { 17; CHECK-LABEL: @test2( 18; CHECK-NEXT: [[B:%.*]] = and <2 x i64> %a, <i64 65535, i64 65535> 19; CHECK-NEXT: [[T:%.*]] = lshr <2 x i64> [[B]], <i64 1, i64 1> 20; CHECK-NEXT: ret <2 x i64> [[T]] 21; 22 %b = and <2 x i64> %a, <i64 65535, i64 65535> 23 %t = ashr <2 x i64> %b, <i64 1, i64 1> 24 ret <2 x i64> %t 25} 26 27define <2 x i64> @test3(<4 x float> %a, <4 x float> %b) { 28; CHECK-LABEL: @test3( 29; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord <4 x float> %a, %b 30; CHECK-NEXT: [[AND:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32> 31; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[AND]] to <2 x i64> 32; CHECK-NEXT: ret <2 x i64> [[CONV]] 33; 34 %cmp = fcmp ord <4 x float> %a, zeroinitializer 35 %sext = sext <4 x i1> %cmp to <4 x i32> 36 %cmp4 = fcmp ord <4 x float> %b, zeroinitializer 37 %sext5 = sext <4 x i1> %cmp4 to <4 x i32> 38 %and = and <4 x i32> %sext, %sext5 39 %conv = bitcast <4 x i32> %and to <2 x i64> 40 ret <2 x i64> %conv 41} 42 43define <2 x i64> @test4(<4 x float> %a, <4 x float> %b) { 44; CHECK-LABEL: @test4( 45; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno <4 x float> %a, %b 46; CHECK-NEXT: [[OR:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32> 47; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[OR]] to <2 x i64> 48; CHECK-NEXT: ret <2 x i64> [[CONV]] 49; 50 %cmp = fcmp uno <4 x float> %a, zeroinitializer 51 %sext = sext <4 x i1> %cmp to <4 x i32> 52 %cmp4 = fcmp uno <4 x float> %b, zeroinitializer 53 %sext5 = sext <4 x i1> %cmp4 to <4 x i32> 54 %or = or <4 x i32> %sext, %sext5 55 %conv = bitcast <4 x i32> %or to <2 x i64> 56 ret <2 x i64> %conv 57} 58 59; rdar://7434900 60define <2 x i64> @test5(<4 x float> %a, <4 x float> %b) { 61; CHECK-LABEL: @test5( 62; CHECK-NEXT: [[CMP:%.*]] = fcmp ult <4 x float> %a, zeroinitializer 63; CHECK-NEXT: [[CMP4:%.*]] = fcmp ult <4 x float> %b, zeroinitializer 64; CHECK-NEXT: [[NARROW:%.*]] = and <4 x i1> [[CMP4]], [[CMP]] 65; CHECK-NEXT: [[AND:%.*]] = sext <4 x i1> [[NARROW]] to <4 x i32> 66; CHECK-NEXT: [[CONV:%.*]] = bitcast <4 x i32> [[AND]] to <2 x i64> 67; CHECK-NEXT: ret <2 x i64> [[CONV]] 68; 69 %cmp = fcmp ult <4 x float> %a, zeroinitializer 70 %sext = sext <4 x i1> %cmp to <4 x i32> 71 %cmp4 = fcmp ult <4 x float> %b, zeroinitializer 72 %sext5 = sext <4 x i1> %cmp4 to <4 x i32> 73 %and = and <4 x i32> %sext, %sext5 74 %conv = bitcast <4 x i32> %and to <2 x i64> 75 ret <2 x i64> %conv 76} 77 78define void @convert(<2 x i32>* %dst.addr, <2 x i64> %src) { 79; CHECK-LABEL: @convert( 80; CHECK-NEXT: [[VAL:%.*]] = trunc <2 x i64> %src to <2 x i32> 81; CHECK-NEXT: [[ADD:%.*]] = add <2 x i32> [[VAL]], <i32 1, i32 1> 82; CHECK-NEXT: store <2 x i32> [[ADD]], <2 x i32>* %dst.addr, align 8 83; CHECK-NEXT: ret void 84; 85 %val = trunc <2 x i64> %src to <2 x i32> 86 %add = add <2 x i32> %val, <i32 1, i32 1> 87 store <2 x i32> %add, <2 x i32>* %dst.addr 88 ret void 89} 90 91define <2 x i65> @foo(<2 x i64> %t) { 92; CHECK-LABEL: @foo( 93; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i64> %t, <i64 4294967295, i64 4294967295> 94; CHECK-NEXT: [[B:%.*]] = zext <2 x i64> [[TMP1]] to <2 x i65> 95; CHECK-NEXT: ret <2 x i65> [[B]] 96; 97 %a = trunc <2 x i64> %t to <2 x i32> 98 %b = zext <2 x i32> %a to <2 x i65> 99 ret <2 x i65> %b 100} 101 102define <2 x i64> @bar(<2 x i65> %t) { 103; CHECK-LABEL: @bar( 104; CHECK-NEXT: [[A:%.*]] = trunc <2 x i65> %t to <2 x i64> 105; CHECK-NEXT: [[B:%.*]] = and <2 x i64> [[A]], <i64 4294967295, i64 4294967295> 106; CHECK-NEXT: ret <2 x i64> [[B]] 107; 108 %a = trunc <2 x i65> %t to <2 x i32> 109 %b = zext <2 x i32> %a to <2 x i64> 110 ret <2 x i64> %b 111} 112 113define <2 x i65> @foos(<2 x i64> %t) { 114; CHECK-LABEL: @foos( 115; CHECK-NEXT: [[A:%.*]] = zext <2 x i64> %t to <2 x i65> 116; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i65> [[A]], <i65 33, i65 33> 117; CHECK-NEXT: [[B:%.*]] = ashr <2 x i65> [[SEXT]], <i65 33, i65 33> 118; CHECK-NEXT: ret <2 x i65> [[B]] 119; 120 %a = trunc <2 x i64> %t to <2 x i32> 121 %b = sext <2 x i32> %a to <2 x i65> 122 ret <2 x i65> %b 123} 124 125define <2 x i64> @bars(<2 x i65> %t) { 126; CHECK-LABEL: @bars( 127; CHECK-NEXT: [[A:%.*]] = trunc <2 x i65> %t to <2 x i64> 128; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i64> [[A]], <i64 32, i64 32> 129; CHECK-NEXT: [[B:%.*]] = ashr <2 x i64> [[SEXT]], <i64 32, i64 32> 130; CHECK-NEXT: ret <2 x i64> [[B]] 131; 132 %a = trunc <2 x i65> %t to <2 x i32> 133 %b = sext <2 x i32> %a to <2 x i64> 134 ret <2 x i64> %b 135} 136 137define <2 x i64> @quxs(<2 x i64> %t) { 138; CHECK-LABEL: @quxs( 139; CHECK-NEXT: [[SEXT:%.*]] = shl <2 x i64> %t, <i64 32, i64 32> 140; CHECK-NEXT: [[B:%.*]] = ashr <2 x i64> [[SEXT]], <i64 32, i64 32> 141; CHECK-NEXT: ret <2 x i64> [[B]] 142; 143 %a = trunc <2 x i64> %t to <2 x i32> 144 %b = sext <2 x i32> %a to <2 x i64> 145 ret <2 x i64> %b 146} 147 148define <2 x i64> @quxt(<2 x i64> %t) { 149; CHECK-LABEL: @quxt( 150; CHECK-NEXT: [[A:%.*]] = shl <2 x i64> %t, <i64 32, i64 32> 151; CHECK-NEXT: [[B:%.*]] = ashr <2 x i64> [[A]], <i64 32, i64 32> 152; CHECK-NEXT: ret <2 x i64> [[B]] 153; 154 %a = shl <2 x i64> %t, <i64 32, i64 32> 155 %b = ashr <2 x i64> %a, <i64 32, i64 32> 156 ret <2 x i64> %b 157} 158 159define <2 x double> @fa(<2 x double> %t) { 160; CHECK-LABEL: @fa( 161; CHECK-NEXT: [[A:%.*]] = fptrunc <2 x double> %t to <2 x float> 162; CHECK-NEXT: [[B:%.*]] = fpext <2 x float> [[A]] to <2 x double> 163; CHECK-NEXT: ret <2 x double> [[B]] 164; 165 %a = fptrunc <2 x double> %t to <2 x float> 166 %b = fpext <2 x float> %a to <2 x double> 167 ret <2 x double> %b 168} 169 170define <2 x double> @fb(<2 x double> %t) { 171; CHECK-LABEL: @fb( 172; CHECK-NEXT: [[A:%.*]] = fptoui <2 x double> %t to <2 x i64> 173; CHECK-NEXT: [[B:%.*]] = uitofp <2 x i64> [[A]] to <2 x double> 174; CHECK-NEXT: ret <2 x double> [[B]] 175; 176 %a = fptoui <2 x double> %t to <2 x i64> 177 %b = uitofp <2 x i64> %a to <2 x double> 178 ret <2 x double> %b 179} 180 181define <2 x double> @fc(<2 x double> %t) { 182; CHECK-LABEL: @fc( 183; CHECK-NEXT: [[A:%.*]] = fptosi <2 x double> %t to <2 x i64> 184; CHECK-NEXT: [[B:%.*]] = sitofp <2 x i64> [[A]] to <2 x double> 185; CHECK-NEXT: ret <2 x double> [[B]] 186; 187 %a = fptosi <2 x double> %t to <2 x i64> 188 %b = sitofp <2 x i64> %a to <2 x double> 189 ret <2 x double> %b 190} 191 192; PR9228 193define <4 x float> @f(i32 %a) { 194; CHECK-LABEL: @f( 195; CHECK-NEXT: ret <4 x float> undef 196; 197 %dim = insertelement <4 x i32> undef, i32 %a, i32 0 198 %dim30 = insertelement <4 x i32> %dim, i32 %a, i32 1 199 %dim31 = insertelement <4 x i32> %dim30, i32 %a, i32 2 200 %dim32 = insertelement <4 x i32> %dim31, i32 %a, i32 3 201 202 %offset_ptr = getelementptr <4 x float>, <4 x float>* null, i32 1 203 %offset_int = ptrtoint <4 x float>* %offset_ptr to i64 204 %sizeof32 = trunc i64 %offset_int to i32 205 206 %smearinsert33 = insertelement <4 x i32> undef, i32 %sizeof32, i32 0 207 %smearinsert34 = insertelement <4 x i32> %smearinsert33, i32 %sizeof32, i32 1 208 %smearinsert35 = insertelement <4 x i32> %smearinsert34, i32 %sizeof32, i32 2 209 %smearinsert36 = insertelement <4 x i32> %smearinsert35, i32 %sizeof32, i32 3 210 211 %delta_scale = mul <4 x i32> %dim32, %smearinsert36 212 %offset_delta = add <4 x i32> zeroinitializer, %delta_scale 213 214 %offset_varying_delta = add <4 x i32> %offset_delta, undef 215 216 ret <4 x float> undef 217} 218 219define <8 x i32> @pr24458(<8 x float> %n) { 220; CHECK-LABEL: @pr24458( 221; CHECK-NEXT: ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 222; 223 %notequal_b_load_.i = fcmp une <8 x float> %n, zeroinitializer 224 %equal_a_load72_.i = fcmp ueq <8 x float> %n, zeroinitializer 225 %notequal_b_load__to_boolvec.i = sext <8 x i1> %notequal_b_load_.i to <8 x i32> 226 %equal_a_load72__to_boolvec.i = sext <8 x i1> %equal_a_load72_.i to <8 x i32> 227 %wrong = or <8 x i32> %notequal_b_load__to_boolvec.i, %equal_a_load72__to_boolvec.i 228 ret <8 x i32> %wrong 229} 230 231