1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4define <4 x i32> @psignd_3(<4 x i32> %a, <4 x i32> %b) {
5; CHECK-LABEL: @psignd_3(
6; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, %a
7; CHECK-NEXT:    [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
8; CHECK-NEXT:    [[T1:%.*]] = xor <4 x i32> [[B_LOBIT]], <i32 -1, i32 -1, i32 -1, i32 -1>
9; CHECK-NEXT:    [[T2:%.*]] = and <4 x i32> %a, [[T1]]
10; CHECK-NEXT:    [[T3:%.*]] = and <4 x i32> [[B_LOBIT]], [[SUB]]
11; CHECK-NEXT:    [[COND:%.*]] = or <4 x i32> [[T2]], [[T3]]
12; CHECK-NEXT:    ret <4 x i32> [[COND]]
13;
14  %cmp = icmp slt <4 x i32> %b, zeroinitializer
15  %sext = sext <4 x i1> %cmp to <4 x i32>
16  %sub = sub nsw <4 x i32> zeroinitializer, %a
17  %t0 = icmp slt <4 x i32> %sext, zeroinitializer
18  %sext3 = sext <4 x i1> %t0 to <4 x i32>
19  %t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
20  %t2 = and <4 x i32> %a, %t1
21  %t3 = and <4 x i32> %sext3, %sub
22  %cond = or <4 x i32> %t2, %t3
23  ret <4 x i32> %cond
24}
25
26define <4 x i32> @test1(<4 x i32> %a, <4 x i32> %b) {
27; CHECK-LABEL: @test1(
28; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, %a
29; CHECK-NEXT:    [[B_LOBIT:%.*]] = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
30; CHECK-NEXT:    [[B_LOBIT_NOT:%.*]] = xor <4 x i32> [[B_LOBIT]], <i32 -1, i32 -1, i32 -1, i32 -1>
31; CHECK-NEXT:    [[T2:%.*]] = and <4 x i32> [[B_LOBIT]], %a
32; CHECK-NEXT:    [[T3:%.*]] = and <4 x i32> [[B_LOBIT_NOT]], [[SUB]]
33; CHECK-NEXT:    [[COND:%.*]] = or <4 x i32> [[T2]], [[T3]]
34; CHECK-NEXT:    ret <4 x i32> [[COND]]
35;
36  %cmp = icmp sgt <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
37  %sext = sext <4 x i1> %cmp to <4 x i32>
38  %sub = sub nsw <4 x i32> zeroinitializer, %a
39  %t0 = icmp slt <4 x i32> %sext, zeroinitializer
40  %sext3 = sext <4 x i1> %t0 to <4 x i32>
41  %t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
42  %t2 = and <4 x i32> %a, %t1
43  %t3 = and <4 x i32> %sext3, %sub
44  %cond = or <4 x i32> %t2, %t3
45  ret <4 x i32> %cond
46}
47
48