1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4define i8 @shl_and(i8 %x, i8 %y) { 5; CHECK-LABEL: @shl_and( 6; CHECK-NEXT: [[SH0:%.*]] = shl i8 [[X:%.*]], 3 7; CHECK-NEXT: [[R:%.*]] = and i8 [[SH0]], [[Y:%.*]] 8; CHECK-NEXT: [[SH1:%.*]] = shl i8 [[R]], 2 9; CHECK-NEXT: ret i8 [[SH1]] 10; 11 %sh0 = shl i8 %x, 3 12 %r = and i8 %sh0, %y 13 %sh1 = shl i8 %r, 2 14 ret i8 %sh1 15} 16 17define i16 @shl_or(i16 %x, i16 %py) { 18; CHECK-LABEL: @shl_or( 19; CHECK-NEXT: [[Y:%.*]] = srem i16 [[PY:%.*]], 42 20; CHECK-NEXT: [[SH0:%.*]] = shl i16 [[X:%.*]], 5 21; CHECK-NEXT: [[R:%.*]] = or i16 [[Y]], [[SH0]] 22; CHECK-NEXT: [[SH1:%.*]] = shl i16 [[R]], 7 23; CHECK-NEXT: ret i16 [[SH1]] 24; 25 %y = srem i16 %py, 42 ; thwart complexity-based canonicalization 26 %sh0 = shl i16 %x, 5 27 %r = or i16 %y, %sh0 28 %sh1 = shl i16 %r, 7 29 ret i16 %sh1 30} 31 32define i32 @shl_xor(i32 %x, i32 %y) { 33; CHECK-LABEL: @shl_xor( 34; CHECK-NEXT: [[SH0:%.*]] = shl i32 [[X:%.*]], 5 35; CHECK-NEXT: [[R:%.*]] = xor i32 [[SH0]], [[Y:%.*]] 36; CHECK-NEXT: [[SH1:%.*]] = shl i32 [[R]], 7 37; CHECK-NEXT: ret i32 [[SH1]] 38; 39 %sh0 = shl i32 %x, 5 40 %r = xor i32 %sh0, %y 41 %sh1 = shl i32 %r, 7 42 ret i32 %sh1 43} 44 45define i64 @lshr_and(i64 %x, i64 %py) { 46; CHECK-LABEL: @lshr_and( 47; CHECK-NEXT: [[Y:%.*]] = srem i64 [[PY:%.*]], 42 48; CHECK-NEXT: [[SH0:%.*]] = lshr i64 [[X:%.*]], 5 49; CHECK-NEXT: [[R:%.*]] = and i64 [[Y]], [[SH0]] 50; CHECK-NEXT: [[SH1:%.*]] = lshr i64 [[R]], 7 51; CHECK-NEXT: ret i64 [[SH1]] 52; 53 %y = srem i64 %py, 42 ; thwart complexity-based canonicalization 54 %sh0 = lshr i64 %x, 5 55 %r = and i64 %y, %sh0 56 %sh1 = lshr i64 %r, 7 57 ret i64 %sh1 58} 59 60define <4 x i32> @lshr_or(<4 x i32> %x, <4 x i32> %y) { 61; CHECK-LABEL: @lshr_or( 62; CHECK-NEXT: [[SH0:%.*]] = lshr <4 x i32> [[X:%.*]], <i32 5, i32 5, i32 5, i32 5> 63; CHECK-NEXT: [[R:%.*]] = or <4 x i32> [[SH0]], [[Y:%.*]] 64; CHECK-NEXT: [[SH1:%.*]] = lshr <4 x i32> [[R]], <i32 7, i32 7, i32 7, i32 7> 65; CHECK-NEXT: ret <4 x i32> [[SH1]] 66; 67 %sh0 = lshr <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5> 68 %r = or <4 x i32> %sh0, %y 69 %sh1 = lshr <4 x i32> %r, <i32 7, i32 7, i32 7, i32 7> 70 ret <4 x i32> %sh1 71} 72 73define <8 x i16> @lshr_xor(<8 x i16> %x, <8 x i16> %py) { 74; CHECK-LABEL: @lshr_xor( 75; CHECK-NEXT: [[Y:%.*]] = srem <8 x i16> [[PY:%.*]], <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42> 76; CHECK-NEXT: [[SH0:%.*]] = lshr <8 x i16> [[X:%.*]], <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5> 77; CHECK-NEXT: [[R:%.*]] = xor <8 x i16> [[Y]], [[SH0]] 78; CHECK-NEXT: [[SH1:%.*]] = lshr <8 x i16> [[R]], <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> 79; CHECK-NEXT: ret <8 x i16> [[SH1]] 80; 81 %y = srem <8 x i16> %py, <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 -42> ; thwart complexity-based canonicalization 82 %sh0 = lshr <8 x i16> %x, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5> 83 %r = xor <8 x i16> %y, %sh0 84 %sh1 = lshr <8 x i16> %r, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> 85 ret <8 x i16> %sh1 86} 87 88 89define <16 x i8> @ashr_and(<16 x i8> %x, <16 x i8> %py, <16 x i8> %pz) { 90; CHECK-LABEL: @ashr_and( 91; CHECK-NEXT: [[Y:%.*]] = srem <16 x i8> [[PY:%.*]], [[PZ:%.*]] 92; CHECK-NEXT: [[SH0:%.*]] = ashr <16 x i8> [[X:%.*]], <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> 93; CHECK-NEXT: [[R:%.*]] = and <16 x i8> [[Y]], [[SH0]] 94; CHECK-NEXT: [[SH1:%.*]] = ashr <16 x i8> [[R]], <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2> 95; CHECK-NEXT: ret <16 x i8> [[SH1]] 96; 97 %y = srem <16 x i8> %py, %pz ; thwart complexity-based canonicalization 98 %sh0 = ashr <16 x i8> %x, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> 99 %r = and <16 x i8> %y, %sh0 100 %sh1 = ashr <16 x i8> %r, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2> 101 ret <16 x i8> %sh1 102} 103 104define <2 x i64> @ashr_or(<2 x i64> %x, <2 x i64> %y) { 105; CHECK-LABEL: @ashr_or( 106; CHECK-NEXT: [[SH0:%.*]] = ashr <2 x i64> [[X:%.*]], <i64 5, i64 5> 107; CHECK-NEXT: [[R:%.*]] = or <2 x i64> [[SH0]], [[Y:%.*]] 108; CHECK-NEXT: [[SH1:%.*]] = ashr <2 x i64> [[R]], <i64 7, i64 7> 109; CHECK-NEXT: ret <2 x i64> [[SH1]] 110; 111 %sh0 = ashr <2 x i64> %x, <i64 5, i64 5> 112 %r = or <2 x i64> %sh0, %y 113 %sh1 = ashr <2 x i64> %r, <i64 7, i64 7> 114 ret <2 x i64> %sh1 115} 116 117define i32 @ashr_xor(i32 %x, i32 %py) { 118; CHECK-LABEL: @ashr_xor( 119; CHECK-NEXT: [[Y:%.*]] = srem i32 [[PY:%.*]], 42 120; CHECK-NEXT: [[SH0:%.*]] = ashr i32 [[X:%.*]], 5 121; CHECK-NEXT: [[R:%.*]] = xor i32 [[Y]], [[SH0]] 122; CHECK-NEXT: [[SH1:%.*]] = ashr i32 [[R]], 7 123; CHECK-NEXT: ret i32 [[SH1]] 124; 125 %y = srem i32 %py, 42 ; thwart complexity-based canonicalization 126 %sh0 = ashr i32 %x, 5 127 %r = xor i32 %y, %sh0 128 %sh1 = ashr i32 %r, 7 129 ret i32 %sh1 130} 131 132define i32 @shr_mismatch_xor(i32 %x, i32 %y) { 133; CHECK-LABEL: @shr_mismatch_xor( 134; CHECK-NEXT: [[SH0:%.*]] = ashr i32 [[X:%.*]], 5 135; CHECK-NEXT: [[R:%.*]] = xor i32 [[SH0]], [[Y:%.*]] 136; CHECK-NEXT: [[SH1:%.*]] = lshr i32 [[R]], 7 137; CHECK-NEXT: ret i32 [[SH1]] 138; 139 %sh0 = ashr i32 %x, 5 140 %r = xor i32 %y, %sh0 141 %sh1 = lshr i32 %r, 7 142 ret i32 %sh1 143} 144 145define i32 @ashr_overshift_xor(i32 %x, i32 %y) { 146; CHECK-LABEL: @ashr_overshift_xor( 147; CHECK-NEXT: [[SH0:%.*]] = ashr i32 [[X:%.*]], 15 148; CHECK-NEXT: [[R:%.*]] = xor i32 [[SH0]], [[Y:%.*]] 149; CHECK-NEXT: [[SH1:%.*]] = ashr i32 [[R]], 17 150; CHECK-NEXT: ret i32 [[SH1]] 151; 152 %sh0 = ashr i32 %x, 15 153 %r = xor i32 %y, %sh0 154 %sh1 = ashr i32 %r, 17 155 ret i32 %sh1 156} 157 158define i32 @lshr_or_extra_use(i32 %x, i32 %y, i32* %p) { 159; CHECK-LABEL: @lshr_or_extra_use( 160; CHECK-NEXT: [[SH0:%.*]] = lshr i32 [[X:%.*]], 5 161; CHECK-NEXT: [[R:%.*]] = or i32 [[SH0]], [[Y:%.*]] 162; CHECK-NEXT: store i32 [[R]], i32* [[P:%.*]], align 4 163; CHECK-NEXT: [[SH1:%.*]] = lshr i32 [[R]], 7 164; CHECK-NEXT: ret i32 [[SH1]] 165; 166 %sh0 = lshr i32 %x, 5 167 %r = or i32 %sh0, %y 168 store i32 %r, i32* %p 169 %sh1 = lshr i32 %r, 7 170 ret i32 %sh1 171} 172