1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; This test makes sure that all icmp instructions are eliminated.
3; RUN: opt < %s -passes=instcombine -S | FileCheck %s
4
5@X = external global i32
6
7define i1 @test1(i32 %A) {
8; CHECK-LABEL: @test1(
9; CHECK-NEXT:    ret i1 false
10;
11  %B = icmp eq i32 %A, %A
12  ; Never true
13  %C = icmp eq i32* @X, null
14  %D = and i1 %B, %C
15  ret i1 %D
16}
17
18define i1 @test1_logical(i32 %A) {
19; CHECK-LABEL: @test1_logical(
20; CHECK-NEXT:    ret i1 false
21;
22  %B = icmp eq i32 %A, %A
23  ; Never true
24  %C = icmp eq i32* @X, null
25  %D = select i1 %B, i1 %C, i1 false
26  ret i1 %D
27}
28
29define i1 @test2(i32 %A) {
30; CHECK-LABEL: @test2(
31; CHECK-NEXT:    ret i1 true
32;
33  %B = icmp ne i32 %A, %A
34  ; Never false
35  %C = icmp ne i32* @X, null
36  %D = or i1 %B, %C
37  ret i1 %D
38}
39
40define i1 @test2_logical(i32 %A) {
41; CHECK-LABEL: @test2_logical(
42; CHECK-NEXT:    ret i1 true
43;
44  %B = icmp ne i32 %A, %A
45  ; Never false
46  %C = icmp ne i32* @X, null
47  %D = select i1 %B, i1 true, i1 %C
48  ret i1 %D
49}
50
51define i1 @test3(i32 %A) {
52; CHECK-LABEL: @test3(
53; CHECK-NEXT:    ret i1 false
54;
55  %B = icmp slt i32 %A, %A
56  ret i1 %B
57}
58
59
60define i1 @test4(i32 %A) {
61; CHECK-LABEL: @test4(
62; CHECK-NEXT:    ret i1 false
63;
64  %B = icmp sgt i32 %A, %A
65  ret i1 %B
66}
67
68define i1 @test5(i32 %A) {
69; CHECK-LABEL: @test5(
70; CHECK-NEXT:    ret i1 true
71;
72  %B = icmp sle i32 %A, %A
73  ret i1 %B
74}
75
76define i1 @test6(i32 %A) {
77; CHECK-LABEL: @test6(
78; CHECK-NEXT:    ret i1 true
79;
80  %B = icmp sge i32 %A, %A
81  ret i1 %B
82}
83
84define i1 @test7(i32 %A) {
85; CHECK-LABEL: @test7(
86; CHECK-NEXT:    ret i1 true
87;
88  %B = icmp uge i32 %A, 0
89  ret i1 %B
90}
91
92define i1 @test8(i32 %A) {
93; CHECK-LABEL: @test8(
94; CHECK-NEXT:    ret i1 false
95;
96  %B = icmp ult i32 %A, 0
97  ret i1 %B
98}
99
100;; test operations on boolean values these should all be eliminated$a
101define i1 @test9(i1 %A) {
102; CHECK-LABEL: @test9(
103; CHECK-NEXT:    ret i1 false
104;
105  %B = icmp ult i1 %A, false
106  ret i1 %B
107}
108
109define i1 @test10(i1 %A) {
110; CHECK-LABEL: @test10(
111; CHECK-NEXT:    ret i1 false
112;
113  %B = icmp ugt i1 %A, true
114  ret i1 %B
115}
116
117define i1 @test11(i1 %A) {
118; CHECK-LABEL: @test11(
119; CHECK-NEXT:    ret i1 true
120;
121  %B = icmp ule i1 %A, true
122  ret i1 %B
123}
124
125define i1 @test12(i1 %A) {
126; CHECK-LABEL: @test12(
127; CHECK-NEXT:    ret i1 true
128;
129  %B = icmp uge i1 %A, false
130  ret i1 %B
131}
132
133define i1 @test13(i1 %A, i1 %B) {
134; CHECK-LABEL: @test13(
135; CHECK-NEXT:    [[TMP1:%.*]] = xor i1 [[B:%.*]], true
136; CHECK-NEXT:    [[C:%.*]] = or i1 [[TMP1]], [[A:%.*]]
137; CHECK-NEXT:    ret i1 [[C]]
138;
139  %C = icmp uge i1 %A, %B
140  ret i1 %C
141}
142
143define <2 x i1> @test13vec(<2 x i1> %A, <2 x i1> %B) {
144; CHECK-LABEL: @test13vec(
145; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i1> [[B:%.*]], <i1 true, i1 true>
146; CHECK-NEXT:    [[C:%.*]] = or <2 x i1> [[TMP1]], [[A:%.*]]
147; CHECK-NEXT:    ret <2 x i1> [[C]]
148;
149  %C = icmp uge <2 x i1> %A, %B
150  ret <2 x i1> %C
151}
152
153define i1 @test14(i1 %A, i1 %B) {
154; CHECK-LABEL: @test14(
155; CHECK-NEXT:    [[TMP1:%.*]] = xor i1 [[A:%.*]], [[B:%.*]]
156; CHECK-NEXT:    [[C:%.*]] = xor i1 [[TMP1]], true
157; CHECK-NEXT:    ret i1 [[C]]
158;
159  %C = icmp eq i1 %A, %B
160  ret i1 %C
161}
162
163define <3 x i1> @test14vec(<3 x i1> %A, <3 x i1> %B) {
164; CHECK-LABEL: @test14vec(
165; CHECK-NEXT:    [[TMP1:%.*]] = xor <3 x i1> [[A:%.*]], [[B:%.*]]
166; CHECK-NEXT:    [[C:%.*]] = xor <3 x i1> [[TMP1]], <i1 true, i1 true, i1 true>
167; CHECK-NEXT:    ret <3 x i1> [[C]]
168;
169  %C = icmp eq <3 x i1> %A, %B
170  ret <3 x i1> %C
171}
172
173define i1 @bool_eq0(i64 %a) {
174; CHECK-LABEL: @bool_eq0(
175; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
176; CHECK-NEXT:    ret i1 [[TMP1]]
177;
178  %b = icmp sgt i64 %a, 0
179  %c = icmp eq i64 %a, 1
180  %notc = icmp eq i1 %c, false
181  %and = and i1 %b, %notc
182  ret i1 %and
183}
184
185define i1 @bool_eq0_logical(i64 %a) {
186; CHECK-LABEL: @bool_eq0_logical(
187; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
188; CHECK-NEXT:    ret i1 [[TMP1]]
189;
190  %b = icmp sgt i64 %a, 0
191  %c = icmp eq i64 %a, 1
192  %notc = icmp eq i1 %c, false
193  %and = select i1 %b, i1 %notc, i1 false
194  ret i1 %and
195}
196
197; This is equivalent to the previous test.
198
199define i1 @xor_of_icmps(i64 %a) {
200; CHECK-LABEL: @xor_of_icmps(
201; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
202; CHECK-NEXT:    ret i1 [[TMP1]]
203;
204  %b = icmp sgt i64 %a, 0
205  %c = icmp eq i64 %a, 1
206  %xor = xor i1 %c, %b
207  ret i1 %xor
208}
209
210; This is also equivalent to the previous test.
211
212define i1 @xor_of_icmps_commute(i64 %a) {
213; CHECK-LABEL: @xor_of_icmps_commute(
214; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[A:%.*]], 1
215; CHECK-NEXT:    ret i1 [[TMP1]]
216;
217  %b = icmp sgt i64 %a, 0
218  %c = icmp eq i64 %a, 1
219  %xor = xor i1 %b, %c
220  ret i1 %xor
221}
222
223; FIXME: This is (a != 5).
224
225define i1 @xor_of_icmps_to_ne(i64 %a) {
226; CHECK-LABEL: @xor_of_icmps_to_ne(
227; CHECK-NEXT:    [[B:%.*]] = icmp sgt i64 [[A:%.*]], 4
228; CHECK-NEXT:    [[C:%.*]] = icmp slt i64 [[A]], 6
229; CHECK-NEXT:    [[XOR:%.*]] = xor i1 [[B]], [[C]]
230; CHECK-NEXT:    ret i1 [[XOR]]
231;
232  %b = icmp sgt i64 %a, 4
233  %c = icmp slt i64 %a, 6
234  %xor = xor i1 %b, %c
235  ret i1 %xor
236}
237
238define i1 @xor_of_icmps_to_ne_commute(i64 %a) {
239; CHECK-LABEL: @xor_of_icmps_to_ne_commute(
240; CHECK-NEXT:    [[C:%.*]] = icmp sgt i64 [[A:%.*]], 4
241; CHECK-NEXT:    [[B:%.*]] = icmp slt i64 [[A]], 6
242; CHECK-NEXT:    [[XOR:%.*]] = xor i1 [[B]], [[C]]
243; CHECK-NEXT:    ret i1 [[XOR]]
244;
245  %c = icmp sgt i64 %a, 4
246  %b = icmp slt i64 %a, 6
247  %xor = xor i1 %b, %c
248  ret i1 %xor
249}
250
251define i1 @xor_of_icmps_neg_to_ne(i64 %a) {
252; CHECK-LABEL: @xor_of_icmps_neg_to_ne(
253; CHECK-NEXT:    [[B:%.*]] = icmp sgt i64 [[A:%.*]], -6
254; CHECK-NEXT:    [[C:%.*]] = icmp slt i64 [[A]], -4
255; CHECK-NEXT:    [[XOR:%.*]] = xor i1 [[B]], [[C]]
256; CHECK-NEXT:    ret i1 [[XOR]]
257;
258  %b = icmp sgt i64 %a, -6
259  %c = icmp slt i64 %a, -4
260  %xor = xor i1 %b, %c
261  ret i1 %xor
262}
263
264define i1 @xor_of_icmps_to_eq(i8 %a) {
265; CHECK-LABEL: @xor_of_icmps_to_eq(
266; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[A:%.*]], 127
267; CHECK-NEXT:    ret i1 [[C]]
268;
269  %c = icmp sgt i8 %a, 126
270  %b = icmp slt i8 %a, 128
271  %xor = xor i1 %b, %c
272  ret i1 %xor
273}
274
275; https://bugs.llvm.org/show_bug.cgi?id=2844
276
277define i32 @PR2844(i32 %x) {
278; CHECK-LABEL: @PR2844(
279; CHECK-NEXT:    [[A:%.*]] = icmp ne i32 [[X:%.*]], 0
280; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], -638208502
281; CHECK-NEXT:    [[NOT_OR:%.*]] = and i1 [[A]], [[B]]
282; CHECK-NEXT:    [[SEL:%.*]] = zext i1 [[NOT_OR]] to i32
283; CHECK-NEXT:    ret i32 [[SEL]]
284;
285  %A = icmp eq i32 %x, 0
286  %B = icmp slt i32 %x, -638208501
287  %or = or i1 %A, %B
288  %sel = select i1 %or, i32 0, i32 1
289  ret i32 %sel
290}
291
292define i32 @PR2844_logical(i32 %x) {
293; CHECK-LABEL: @PR2844_logical(
294; CHECK-NEXT:    [[A:%.*]] = icmp ne i32 [[X:%.*]], 0
295; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], -638208502
296; CHECK-NEXT:    [[NOT_OR:%.*]] = and i1 [[A]], [[B]]
297; CHECK-NEXT:    [[SEL:%.*]] = zext i1 [[NOT_OR]] to i32
298; CHECK-NEXT:    ret i32 [[SEL]]
299;
300  %A = icmp eq i32 %x, 0
301  %B = icmp slt i32 %x, -638208501
302  %or = select i1 %A, i1 true, i1 %B
303  %sel = select i1 %or, i32 0, i32 1
304  ret i32 %sel
305}
306
307define i1 @test16(i32 %A) {
308; CHECK-LABEL: @test16(
309; CHECK-NEXT:    ret i1 false
310;
311  %B = and i32 %A, 5
312  ; Is never true
313  %C = icmp eq i32 %B, 8
314  ret i1 %C
315}
316
317define i1 @test17(i8 %A) {
318; CHECK-LABEL: @test17(
319; CHECK-NEXT:    ret i1 false
320;
321  %B = or i8 %A, 1
322  ; Always false
323  %C = icmp eq i8 %B, 2
324  ret i1 %C
325}
326
327define i1 @test18(i1 %C, i32 %a) {
328; CHECK-LABEL: @test18(
329; CHECK-NEXT:  entry:
330; CHECK-NEXT:    br i1 [[C:%.*]], label [[ENDIF:%.*]], label [[ELSE:%.*]]
331; CHECK:       else:
332; CHECK-NEXT:    br label [[ENDIF]]
333; CHECK:       endif:
334; CHECK-NEXT:    ret i1 true
335;
336entry:
337  br i1 %C, label %endif, label %else
338
339else:
340  br label %endif
341
342endif:
343  %b.0 = phi i32 [ 0, %entry ], [ 1, %else ]
344  %tmp.4 = icmp slt i32 %b.0, 123
345  ret i1 %tmp.4
346}
347
348define i1 @test19(i1 %A, i1 %B) {
349; CHECK-LABEL: @test19(
350; CHECK-NEXT:    [[TMP1:%.*]] = xor i1 [[A:%.*]], [[B:%.*]]
351; CHECK-NEXT:    [[C:%.*]] = xor i1 [[TMP1]], true
352; CHECK-NEXT:    ret i1 [[C]]
353;
354  %a = zext i1 %A to i32
355  %b = zext i1 %B to i32
356  %C = icmp eq i32 %a, %b
357  ret i1 %C
358}
359
360define i32 @test20(i32 %A) {
361; CHECK-LABEL: @test20(
362; CHECK-NEXT:    [[B:%.*]] = and i32 [[A:%.*]], 1
363; CHECK-NEXT:    ret i32 [[B]]
364;
365  %B = and i32 %A, 1
366  %C = icmp ne i32 %B, 0
367  %D = zext i1 %C to i32
368  ret i32 %D
369}
370
371define <2 x i32> @test20vec(<2 x i32> %A) {
372; CHECK-LABEL: @test20vec(
373; CHECK-NEXT:    [[D:%.*]] = and <2 x i32> [[A:%.*]], <i32 1, i32 1>
374; CHECK-NEXT:    ret <2 x i32> [[D]]
375;
376  %B = and <2 x i32> %A, <i32 1, i32 1>
377  %C = icmp ne <2 x i32> %B, zeroinitializer
378  %D = zext <2 x i1> %C to <2 x i32>
379  ret <2 x i32> %D
380}
381
382define i32 @test21(i32 %a) {
383; CHECK-LABEL: @test21(
384; CHECK-NEXT:    [[TMP_6:%.*]] = lshr i32 [[A:%.*]], 2
385; CHECK-NEXT:    [[TMP_6_LOBIT:%.*]] = and i32 [[TMP_6]], 1
386; CHECK-NEXT:    ret i32 [[TMP_6_LOBIT]]
387;
388  %tmp.6 = and i32 %a, 4
389  %not.tmp.7 = icmp ne i32 %tmp.6, 0
390  %retval = zext i1 %not.tmp.7 to i32
391  ret i32 %retval
392}
393
394define <2 x i32> @test21vec(<2 x i32> %a) {
395; CHECK-LABEL: @test21vec(
396; CHECK-NEXT:    [[TMP_6:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 2, i32 2>
397; CHECK-NEXT:    [[TMP_6_LOBIT:%.*]] = and <2 x i32> [[TMP_6]], <i32 1, i32 1>
398; CHECK-NEXT:    ret <2 x i32> [[TMP_6_LOBIT]]
399;
400  %tmp.6 = and <2 x i32> %a, <i32 4, i32 4>
401  %not.tmp.7 = icmp ne <2 x i32> %tmp.6, zeroinitializer
402  %retval = zext <2 x i1> %not.tmp.7 to <2 x i32>
403  ret <2 x i32> %retval
404}
405
406define i1 @test22(i32 %A, i32 %X) {
407; CHECK-LABEL: @test22(
408; CHECK-NEXT:    ret i1 true
409;
410  %B = and i32 %A, 100663295
411  %C = icmp ult i32 %B, 268435456
412  %Y = and i32 %X, 7
413  %Z = icmp sgt i32 %Y, -1
414  %R = or i1 %C, %Z
415  ret i1 %R
416}
417
418define i1 @test22_logical(i32 %A, i32 %X) {
419; CHECK-LABEL: @test22_logical(
420; CHECK-NEXT:    ret i1 true
421;
422  %B = and i32 %A, 100663295
423  %C = icmp ult i32 %B, 268435456
424  %Y = and i32 %X, 7
425  %Z = icmp sgt i32 %Y, -1
426  %R = select i1 %C, i1 true, i1 %Z
427  ret i1 %R
428}
429
430define i32 @test23(i32 %a) {
431; CHECK-LABEL: @test23(
432; CHECK-NEXT:    [[TMP_1:%.*]] = and i32 [[A:%.*]], 1
433; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 [[TMP_1]], 1
434; CHECK-NEXT:    ret i32 [[TMP1]]
435;
436  %tmp.1 = and i32 %a, 1
437  %tmp.2 = icmp eq i32 %tmp.1, 0
438  %tmp.3 = zext i1 %tmp.2 to i32
439  ret i32 %tmp.3
440}
441
442define <2 x i32> @test23vec(<2 x i32> %a) {
443; CHECK-LABEL: @test23vec(
444; CHECK-NEXT:    [[TMP_1:%.*]] = and <2 x i32> [[A:%.*]], <i32 1, i32 1>
445; CHECK-NEXT:    [[TMP1:%.*]] = xor <2 x i32> [[TMP_1]], <i32 1, i32 1>
446; CHECK-NEXT:    ret <2 x i32> [[TMP1]]
447;
448  %tmp.1 = and <2 x i32> %a, <i32 1, i32 1>
449  %tmp.2 = icmp eq <2 x i32> %tmp.1, zeroinitializer
450  %tmp.3 = zext <2 x i1> %tmp.2 to <2 x i32>
451  ret <2 x i32> %tmp.3
452}
453
454define i32 @test24(i32 %a) {
455; CHECK-LABEL: @test24(
456; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[A:%.*]], 2
457; CHECK-NEXT:    [[DOTLOBIT:%.*]] = and i32 [[TMP1]], 1
458; CHECK-NEXT:    [[TMP2:%.*]] = xor i32 [[DOTLOBIT]], 1
459; CHECK-NEXT:    ret i32 [[TMP2]]
460;
461  %tmp1 = and i32 %a, 4
462  %tmp.1 = lshr i32 %tmp1, 2
463  %tmp.2 = icmp eq i32 %tmp.1, 0
464  %tmp.3 = zext i1 %tmp.2 to i32
465  ret i32 %tmp.3
466}
467
468define <2 x i32> @test24vec(<2 x i32> %a) {
469; CHECK-LABEL: @test24vec(
470; CHECK-NEXT:    [[TMP1:%.*]] = lshr <2 x i32> [[A:%.*]], <i32 2, i32 2>
471; CHECK-NEXT:    [[DOTLOBIT:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
472; CHECK-NEXT:    [[TMP2:%.*]] = xor <2 x i32> [[DOTLOBIT]], <i32 1, i32 1>
473; CHECK-NEXT:    ret <2 x i32> [[TMP2]]
474;
475  %tmp1 = and <2 x i32> %a, <i32 4, i32 4>
476  %tmp.1 = lshr <2 x i32> %tmp1, <i32 2, i32 2>
477  %tmp.2 = icmp eq <2 x i32> %tmp.1, zeroinitializer
478  %tmp.3 = zext <2 x i1> %tmp.2 to <2 x i32>
479  ret <2 x i32> %tmp.3
480}
481
482define i1 @test25(i32 %A) {
483; CHECK-LABEL: @test25(
484; CHECK-NEXT:    ret i1 false
485;
486  %B = and i32 %A, 2
487  %C = icmp ugt i32 %B, 2
488  ret i1 %C
489}
490
491