1; RUN: opt < %s -instcombine -S | FileCheck %s 2 3; PR1822 4 5target datalayout = "e-p:64:64-p1:16:16-p2:32:32:32-p3:64:64:64" 6 7define i32 @test1(i32 %A, i32 %B) { 8 %C = select i1 false, i32 %A, i32 %B 9 ret i32 %C 10; CHECK-LABEL: @test1( 11; CHECK: ret i32 %B 12} 13 14define i32 @test2(i32 %A, i32 %B) { 15 %C = select i1 true, i32 %A, i32 %B 16 ret i32 %C 17; CHECK-LABEL: @test2( 18; CHECK: ret i32 %A 19} 20 21 22define i32 @test3(i1 %C, i32 %I) { 23 ; V = I 24 %V = select i1 %C, i32 %I, i32 %I 25 ret i32 %V 26; CHECK-LABEL: @test3( 27; CHECK: ret i32 %I 28} 29 30define i1 @test4(i1 %C) { 31 ; V = C 32 %V = select i1 %C, i1 true, i1 false 33 ret i1 %V 34; CHECK-LABEL: @test4( 35; CHECK: ret i1 %C 36} 37 38define i1 @test5(i1 %C) { 39 ; V = !C 40 %V = select i1 %C, i1 false, i1 true 41 ret i1 %V 42; CHECK-LABEL: @test5( 43; CHECK: xor i1 %C, true 44; CHECK: ret i1 45} 46 47define i32 @test6(i1 %C) { 48 ; V = cast C to int 49 %V = select i1 %C, i32 1, i32 0 50 ret i32 %V 51; CHECK-LABEL: @test6( 52; CHECK: %V = zext i1 %C to i32 53; CHECK: ret i32 %V 54} 55 56define i1 @test7(i1 %C, i1 %X) { 57; CHECK-LABEL: @test7( 58; CHECK-NEXT: [[R:%.*]] = or i1 %C, %X 59; CHECK-NEXT: ret i1 [[R]] 60; 61 %R = select i1 %C, i1 true, i1 %X 62 ret i1 %R 63} 64 65define <2 x i1> @test7vec(<2 x i1> %C, <2 x i1> %X) { 66; CHECK-LABEL: @test7vec( 67; CHECK-NEXT: [[R:%.*]] = or <2 x i1> %C, %X 68; CHECK-NEXT: ret <2 x i1> [[R]] 69; 70 %R = select <2 x i1> %C, <2 x i1> <i1 true, i1 true>, <2 x i1> %X 71 ret <2 x i1> %R 72} 73 74define i1 @test8(i1 %C, i1 %X) { 75; CHECK-LABEL: @test8( 76; CHECK-NEXT: [[R:%.*]] = and i1 %C, %X 77; CHECK-NEXT: ret i1 [[R]] 78; 79 %R = select i1 %C, i1 %X, i1 false 80 ret i1 %R 81} 82 83define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) { 84; CHECK-LABEL: @test8vec( 85; CHECK-NEXT: [[R:%.*]] = and <2 x i1> %C, %X 86; CHECK-NEXT: ret <2 x i1> [[R]] 87; 88 %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 false, i1 false> 89 ret <2 x i1> %R 90} 91 92define i1 @test9(i1 %C, i1 %X) { 93; CHECK-LABEL: @test9( 94; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 %C, true 95; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_C]], %X 96; CHECK-NEXT: ret i1 [[R]] 97; 98 %R = select i1 %C, i1 false, i1 %X 99 ret i1 %R 100} 101 102define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) { 103; CHECK-LABEL: @test9vec( 104; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> %C, <i1 true, i1 true> 105; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[NOT_C]], %X 106; CHECK-NEXT: ret <2 x i1> [[R]] 107; 108 %R = select <2 x i1> %C, <2 x i1> <i1 false, i1 false>, <2 x i1> %X 109 ret <2 x i1> %R 110} 111 112define i1 @test10(i1 %C, i1 %X) { 113; CHECK-LABEL: @test10( 114; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 %C, true 115; CHECK-NEXT: [[R:%.*]] = or i1 [[NOT_C]], %X 116; CHECK-NEXT: ret i1 [[R]] 117; 118 %R = select i1 %C, i1 %X, i1 true 119 ret i1 %R 120} 121 122define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) { 123; CHECK-LABEL: @test10vec( 124; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> %C, <i1 true, i1 true> 125; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[NOT_C]], %X 126; CHECK-NEXT: ret <2 x i1> [[R]] 127; 128 %R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 true, i1 true> 129 ret <2 x i1> %R 130} 131 132define i1 @test23(i1 %a, i1 %b) { 133; CHECK-LABEL: @test23( 134; CHECK-NEXT: [[C:%.*]] = and i1 %a, %b 135; CHECK-NEXT: ret i1 [[C]] 136; 137 %c = select i1 %a, i1 %b, i1 %a 138 ret i1 %c 139} 140 141define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) { 142; CHECK-LABEL: @test23vec( 143; CHECK-NEXT: [[C:%.*]] = and <2 x i1> %a, %b 144; CHECK-NEXT: ret <2 x i1> [[C]] 145; 146 %c = select <2 x i1> %a, <2 x i1> %b, <2 x i1> %a 147 ret <2 x i1> %c 148} 149 150define i1 @test24(i1 %a, i1 %b) { 151; CHECK-LABEL: @test24( 152; CHECK-NEXT: [[C:%.*]] = or i1 %a, %b 153; CHECK-NEXT: ret i1 [[C]] 154; 155 %c = select i1 %a, i1 %a, i1 %b 156 ret i1 %c 157} 158 159define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) { 160; CHECK-LABEL: @test24vec( 161; CHECK-NEXT: [[C:%.*]] = or <2 x i1> %a, %b 162; CHECK-NEXT: ret <2 x i1> [[C]] 163; 164 %c = select <2 x i1> %a, <2 x i1> %a, <2 x i1> %b 165 ret <2 x i1> %c 166} 167 168define i1 @test62(i1 %A, i1 %B) { 169; CHECK-LABEL: @test62( 170; CHECK-NEXT: [[NOT:%.*]] = xor i1 %A, true 171; CHECK-NEXT: [[C:%.*]] = and i1 [[NOT]], %B 172; CHECK-NEXT: ret i1 [[C]] 173; 174 %not = xor i1 %A, true 175 %C = select i1 %A, i1 %not, i1 %B 176 ret i1 %C 177} 178 179define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) { 180; CHECK-LABEL: @test62vec( 181; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> %A, <i1 true, i1 true> 182; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[NOT]], %B 183; CHECK-NEXT: ret <2 x i1> [[C]] 184; 185 %not = xor <2 x i1> %A, <i1 true, i1 true> 186 %C = select <2 x i1> %A, <2 x i1> %not, <2 x i1> %B 187 ret <2 x i1> %C 188} 189 190define i1 @test63(i1 %A, i1 %B) { 191; CHECK-LABEL: @test63( 192; CHECK-NEXT: [[NOT:%.*]] = xor i1 %A, true 193; CHECK-NEXT: [[C:%.*]] = or i1 %B, [[NOT]] 194; CHECK-NEXT: ret i1 [[C]] 195; 196 %not = xor i1 %A, true 197 %C = select i1 %A, i1 %B, i1 %not 198 ret i1 %C 199} 200 201define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) { 202; CHECK-LABEL: @test63vec( 203; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> %A, <i1 true, i1 true> 204; CHECK-NEXT: [[C:%.*]] = or <2 x i1> %B, [[NOT]] 205; CHECK-NEXT: ret <2 x i1> [[C]] 206; 207 %not = xor <2 x i1> %A, <i1 true, i1 true> 208 %C = select <2 x i1> %A, <2 x i1> %B, <2 x i1> %not 209 ret <2 x i1> %C 210} 211 212define i32 @test11(i32 %a) { 213 %C = icmp eq i32 %a, 0 214 %R = select i1 %C, i32 0, i32 1 215 ret i32 %R 216; CHECK-LABEL: @test11( 217; CHECK: icmp ne i32 %a, 0 218; CHECK: %R = zext i1 219; CHECK: ret i32 %R 220} 221 222define i32 @test12(i1 %cond, i32 %a) { 223 %b = or i32 %a, 1 224 %c = select i1 %cond, i32 %b, i32 %a 225 ret i32 %c 226; CHECK-LABEL: @test12( 227; CHECK: %b = zext i1 %cond to i32 228; CHECK: %c = or i32 %b, %a 229; CHECK: ret i32 %c 230} 231 232define i32 @test12a(i1 %cond, i32 %a) { 233 %b = ashr i32 %a, 1 234 %c = select i1 %cond, i32 %b, i32 %a 235 ret i32 %c 236; CHECK-LABEL: @test12a( 237; CHECK: %b = zext i1 %cond to i32 238; CHECK: %c = ashr i32 %a, %b 239; CHECK: ret i32 %c 240} 241 242define i32 @test12b(i1 %cond, i32 %a) { 243; CHECK-LABEL: @test12b( 244; CHECK-NEXT: [[NOT_COND:%.*]] = xor i1 %cond, true 245; CHECK-NEXT: [[B:%.*]] = zext i1 [[NOT_COND]] to i32 246; CHECK-NEXT: [[D:%.*]] = ashr i32 %a, [[B]] 247; CHECK-NEXT: ret i32 [[D]] 248; 249 %b = ashr i32 %a, 1 250 %d = select i1 %cond, i32 %a, i32 %b 251 ret i32 %d 252} 253 254define i32 @test13(i32 %a, i32 %b) { 255 %C = icmp eq i32 %a, %b 256 %V = select i1 %C, i32 %a, i32 %b 257 ret i32 %V 258; CHECK-LABEL: @test13( 259; CHECK: ret i32 %b 260} 261 262define i32 @test13a(i32 %a, i32 %b) { 263 %C = icmp ne i32 %a, %b 264 %V = select i1 %C, i32 %a, i32 %b 265 ret i32 %V 266; CHECK-LABEL: @test13a( 267; CHECK: ret i32 %a 268} 269 270define i32 @test13b(i32 %a, i32 %b) { 271 %C = icmp eq i32 %a, %b 272 %V = select i1 %C, i32 %b, i32 %a 273 ret i32 %V 274; CHECK-LABEL: @test13b( 275; CHECK: ret i32 %a 276} 277 278define i1 @test14a(i1 %C, i32 %X) { 279 %V = select i1 %C, i32 %X, i32 0 280 ; (X < 1) | !C 281 %R = icmp slt i32 %V, 1 282 ret i1 %R 283; CHECK-LABEL: @test14a( 284; CHECK: icmp slt i32 %X, 1 285; CHECK: xor i1 %C, true 286; CHECK: or i1 287; CHECK: ret i1 %R 288} 289 290define i1 @test14b(i1 %C, i32 %X) { 291 %V = select i1 %C, i32 0, i32 %X 292 ; (X < 1) | C 293 %R = icmp slt i32 %V, 1 294 ret i1 %R 295; CHECK-LABEL: @test14b( 296; CHECK: icmp slt i32 %X, 1 297; CHECK: or i1 298; CHECK: ret i1 %R 299} 300 301;; Code sequence for (X & 16) ? 16 : 0 302define i32 @test15a(i32 %X) { 303 %t1 = and i32 %X, 16 304 %t2 = icmp eq i32 %t1, 0 305 %t3 = select i1 %t2, i32 0, i32 16 306 ret i32 %t3 307; CHECK-LABEL: @test15a( 308; CHECK: %t1 = and i32 %X, 16 309; CHECK: ret i32 %t1 310} 311 312;; Code sequence for (X & 32) ? 0 : 24 313define i32 @test15b(i32 %X) { 314 %t1 = and i32 %X, 32 315 %t2 = icmp eq i32 %t1, 0 316 %t3 = select i1 %t2, i32 32, i32 0 317 ret i32 %t3 318; CHECK-LABEL: @test15b( 319; CHECK: %t1 = and i32 %X, 32 320; CHECK: xor i32 %t1, 32 321; CHECK: ret i32 322} 323 324;; Alternate code sequence for (X & 16) ? 16 : 0 325define i32 @test15c(i32 %X) { 326 %t1 = and i32 %X, 16 327 %t2 = icmp eq i32 %t1, 16 328 %t3 = select i1 %t2, i32 16, i32 0 329 ret i32 %t3 330; CHECK-LABEL: @test15c( 331; CHECK: %t1 = and i32 %X, 16 332; CHECK: ret i32 %t1 333} 334 335;; Alternate code sequence for (X & 16) ? 16 : 0 336define i32 @test15d(i32 %X) { 337 %t1 = and i32 %X, 16 338 %t2 = icmp ne i32 %t1, 0 339 %t3 = select i1 %t2, i32 16, i32 0 340 ret i32 %t3 341; CHECK-LABEL: @test15d( 342; CHECK: %t1 = and i32 %X, 16 343; CHECK: ret i32 %t1 344} 345 346;; (a & 128) ? 256 : 0 347define i32 @test15e(i32 %X) { 348 %t1 = and i32 %X, 128 349 %t2 = icmp ne i32 %t1, 0 350 %t3 = select i1 %t2, i32 256, i32 0 351 ret i32 %t3 352; CHECK-LABEL: @test15e( 353; CHECK: %t1 = shl i32 %X, 1 354; CHECK: and i32 %t1, 256 355; CHECK: ret i32 356} 357 358;; (a & 128) ? 0 : 256 359define i32 @test15f(i32 %X) { 360 %t1 = and i32 %X, 128 361 %t2 = icmp ne i32 %t1, 0 362 %t3 = select i1 %t2, i32 0, i32 256 363 ret i32 %t3 364; CHECK-LABEL: @test15f( 365; CHECK: %t1 = shl i32 %X, 1 366; CHECK: and i32 %t1, 256 367; CHECK: xor i32 %{{.*}}, 256 368; CHECK: ret i32 369} 370 371;; (a & 8) ? -1 : -9 372define i32 @test15g(i32 %X) { 373 %t1 = and i32 %X, 8 374 %t2 = icmp ne i32 %t1, 0 375 %t3 = select i1 %t2, i32 -1, i32 -9 376 ret i32 %t3 377; CHECK-LABEL: @test15g( 378; CHECK-NEXT: %1 = or i32 %X, -9 379; CHECK-NEXT: ret i32 %1 380} 381 382;; (a & 8) ? -9 : -1 383define i32 @test15h(i32 %X) { 384 %t1 = and i32 %X, 8 385 %t2 = icmp ne i32 %t1, 0 386 %t3 = select i1 %t2, i32 -9, i32 -1 387 ret i32 %t3 388; CHECK-LABEL: @test15h( 389; CHECK-NEXT: %1 = or i32 %X, -9 390; CHECK-NEXT: %2 = xor i32 %1, 8 391; CHECK-NEXT: ret i32 %2 392} 393 394;; (a & 2) ? 577 : 1089 395define i32 @test15i(i32 %X) { 396 %t1 = and i32 %X, 2 397 %t2 = icmp ne i32 %t1, 0 398 %t3 = select i1 %t2, i32 577, i32 1089 399 ret i32 %t3 400; CHECK-LABEL: @test15i( 401; CHECK-NEXT: %t1 = shl i32 %X, 8 402; CHECK-NEXT: %1 = and i32 %t1, 512 403; CHECK-NEXT: %2 = xor i32 %1, 512 404; CHECK-NEXT: %3 = add nuw nsw i32 %2, 577 405; CHECK-NEXT: ret i32 %3 406} 407 408;; (a & 2) ? 1089 : 577 409define i32 @test15j(i32 %X) { 410 %t1 = and i32 %X, 2 411 %t2 = icmp ne i32 %t1, 0 412 %t3 = select i1 %t2, i32 1089, i32 577 413 ret i32 %t3 414; CHECK-LABEL: @test15j( 415; CHECK-NEXT: %t1 = shl i32 %X, 8 416; CHECK-NEXT: %1 = and i32 %t1, 512 417; CHECK-NEXT: %2 = add nuw nsw i32 %1, 577 418; CHECK-NEXT: ret i32 %2 419} 420 421define i32 @test16(i1 %C, i32* %P) { 422 %P2 = select i1 %C, i32* %P, i32* null 423 %V = load i32, i32* %P2 424 ret i32 %V 425; CHECK-LABEL: @test16( 426; CHECK-NEXT: %V = load i32, i32* %P 427; CHECK: ret i32 %V 428} 429 430;; It may be legal to load from a null address in a non-zero address space 431define i32 @test16_neg(i1 %C, i32 addrspace(1)* %P) { 432 %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null 433 %V = load i32, i32 addrspace(1)* %P2 434 ret i32 %V 435; CHECK-LABEL: @test16_neg 436; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null 437; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2 438; CHECK: ret i32 %V 439} 440define i32 @test16_neg2(i1 %C, i32 addrspace(1)* %P) { 441 %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P 442 %V = load i32, i32 addrspace(1)* %P2 443 ret i32 %V 444; CHECK-LABEL: @test16_neg2 445; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P 446; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2 447; CHECK: ret i32 %V 448} 449 450define i1 @test17(i32* %X, i1 %C) { 451 %R = select i1 %C, i32* %X, i32* null 452 %RV = icmp eq i32* %R, null 453 ret i1 %RV 454; CHECK-LABEL: @test17( 455; CHECK: icmp eq i32* %X, null 456; CHECK: xor i1 %C, true 457; CHECK: %RV = or i1 458; CHECK: ret i1 %RV 459} 460 461define i32 @test18(i32 %X, i32 %Y, i1 %C) { 462 %R = select i1 %C, i32 %X, i32 0 463 %V = sdiv i32 %Y, %R 464 ret i32 %V 465; CHECK-LABEL: @test18( 466; CHECK: %V = sdiv i32 %Y, %X 467; CHECK: ret i32 %V 468} 469 470define i32 @test19(i32 %x) { 471 %tmp = icmp ugt i32 %x, 2147483647 472 %retval = select i1 %tmp, i32 -1, i32 0 473 ret i32 %retval 474; CHECK-LABEL: @test19( 475; CHECK-NEXT: ashr i32 %x, 31 476; CHECK-NEXT: ret i32 477} 478 479define i32 @test20(i32 %x) { 480 %tmp = icmp slt i32 %x, 0 481 %retval = select i1 %tmp, i32 -1, i32 0 482 ret i32 %retval 483; CHECK-LABEL: @test20( 484; CHECK-NEXT: ashr i32 %x, 31 485; CHECK-NEXT: ret i32 486} 487 488define i64 @test21(i32 %x) { 489 %tmp = icmp slt i32 %x, 0 490 %retval = select i1 %tmp, i64 -1, i64 0 491 ret i64 %retval 492; CHECK-LABEL: @test21( 493; CHECK-NEXT: ashr i32 %x, 31 494; CHECK-NEXT: sext i32 495; CHECK-NEXT: ret i64 496} 497 498define i16 @test22(i32 %x) { 499 %tmp = icmp slt i32 %x, 0 500 %retval = select i1 %tmp, i16 -1, i16 0 501 ret i16 %retval 502; CHECK-LABEL: @test22( 503; CHECK-NEXT: ashr i32 %x, 31 504; CHECK-NEXT: trunc i32 505; CHECK-NEXT: ret i16 506} 507 508define i32 @test25(i1 %c) { 509entry: 510 br i1 %c, label %jump, label %ret 511jump: 512 br label %ret 513ret: 514 %a = phi i1 [true, %jump], [false, %entry] 515 %b = select i1 %a, i32 10, i32 20 516 ret i32 %b 517; CHECK-LABEL: @test25( 518; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ] 519; CHECK-NEXT: ret i32 %a 520} 521 522define i32 @test26(i1 %cond) { 523entry: 524 br i1 %cond, label %jump, label %ret 525jump: 526 %c = or i1 false, false 527 br label %ret 528ret: 529 %a = phi i1 [true, %entry], [%c, %jump] 530 %b = select i1 %a, i32 20, i32 10 531 ret i32 %b 532; CHECK-LABEL: @test26( 533; CHECK: %a = phi i32 [ 20, %entry ], [ 10, %jump ] 534; CHECK-NEXT: ret i32 %a 535} 536 537define i32 @test27(i1 %c, i32 %A, i32 %B) { 538entry: 539 br i1 %c, label %jump, label %ret 540jump: 541 br label %ret 542ret: 543 %a = phi i1 [true, %jump], [false, %entry] 544 %b = select i1 %a, i32 %A, i32 %B 545 ret i32 %b 546; CHECK-LABEL: @test27( 547; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 548; CHECK-NEXT: ret i32 %a 549} 550 551define i32 @test28(i1 %cond, i32 %A, i32 %B) { 552entry: 553 br i1 %cond, label %jump, label %ret 554jump: 555 br label %ret 556ret: 557 %c = phi i32 [%A, %jump], [%B, %entry] 558 %a = phi i1 [true, %jump], [false, %entry] 559 %b = select i1 %a, i32 %A, i32 %c 560 ret i32 %b 561; CHECK-LABEL: @test28( 562; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 563; CHECK-NEXT: ret i32 %a 564} 565 566define i32 @test29(i1 %cond, i32 %A, i32 %B) { 567entry: 568 br i1 %cond, label %jump, label %ret 569jump: 570 br label %ret 571ret: 572 %c = phi i32 [%A, %jump], [%B, %entry] 573 %a = phi i1 [true, %jump], [false, %entry] 574 br label %next 575 576next: 577 %b = select i1 %a, i32 %A, i32 %c 578 ret i32 %b 579; CHECK-LABEL: @test29( 580; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ] 581; CHECK: ret i32 %a 582} 583 584 585; SMAX(SMAX(x, y), x) -> SMAX(x, y) 586define i32 @test30(i32 %x, i32 %y) { 587 %cmp = icmp sgt i32 %x, %y 588 %cond = select i1 %cmp, i32 %x, i32 %y 589 590 %cmp5 = icmp sgt i32 %cond, %x 591 %retval = select i1 %cmp5, i32 %cond, i32 %x 592 ret i32 %retval 593; CHECK-LABEL: @test30( 594; CHECK: ret i32 %cond 595} 596 597; UMAX(UMAX(x, y), x) -> UMAX(x, y) 598define i32 @test31(i32 %x, i32 %y) { 599 %cmp = icmp ugt i32 %x, %y 600 %cond = select i1 %cmp, i32 %x, i32 %y 601 %cmp5 = icmp ugt i32 %cond, %x 602 %retval = select i1 %cmp5, i32 %cond, i32 %x 603 ret i32 %retval 604; CHECK-LABEL: @test31( 605; CHECK: ret i32 %cond 606} 607 608; SMIN(SMIN(x, y), x) -> SMIN(x, y) 609define i32 @test32(i32 %x, i32 %y) { 610 %cmp = icmp sgt i32 %x, %y 611 %cond = select i1 %cmp, i32 %y, i32 %x 612 %cmp5 = icmp sgt i32 %cond, %x 613 %retval = select i1 %cmp5, i32 %x, i32 %cond 614 ret i32 %retval 615; CHECK-LABEL: @test32( 616; CHECK: ret i32 %cond 617} 618 619; MAX(MIN(x, y), x) -> x 620define i32 @test33(i32 %x, i32 %y) { 621 %cmp = icmp sgt i32 %x, %y 622 %cond = select i1 %cmp, i32 %y, i32 %x 623 %cmp5 = icmp sgt i32 %cond, %x 624 %retval = select i1 %cmp5, i32 %cond, i32 %x 625 ret i32 %retval 626; CHECK-LABEL: @test33( 627; CHECK: ret i32 %x 628} 629 630; MIN(MAX(x, y), x) -> x 631define i32 @test34(i32 %x, i32 %y) { 632 %cmp = icmp sgt i32 %x, %y 633 %cond = select i1 %cmp, i32 %x, i32 %y 634 %cmp5 = icmp sgt i32 %cond, %x 635 %retval = select i1 %cmp5, i32 %x, i32 %cond 636 ret i32 %retval 637; CHECK-LABEL: @test34( 638; CHECK: ret i32 %x 639} 640 641define i32 @test35(i32 %x) { 642 %cmp = icmp sge i32 %x, 0 643 %cond = select i1 %cmp, i32 60, i32 100 644 ret i32 %cond 645; CHECK-LABEL: @test35( 646; CHECK: ashr i32 %x, 31 647; CHECK: and i32 {{.*}}, 40 648; CHECK: add nuw nsw i32 {{.*}}, 60 649; CHECK: ret 650} 651 652define i32 @test36(i32 %x) { 653 %cmp = icmp slt i32 %x, 0 654 %cond = select i1 %cmp, i32 60, i32 100 655 ret i32 %cond 656; CHECK-LABEL: @test36( 657; CHECK: ashr i32 %x, 31 658; CHECK: and i32 {{.*}}, -40 659; CHECK: add nsw i32 {{.*}}, 100 660; CHECK: ret 661} 662 663define i32 @test37(i32 %x) { 664 %cmp = icmp sgt i32 %x, -1 665 %cond = select i1 %cmp, i32 1, i32 -1 666 ret i32 %cond 667; CHECK-LABEL: @test37( 668; CHECK: ashr i32 %x, 31 669; CHECK: or i32 {{.*}}, 1 670; CHECK: ret 671} 672 673define i1 @test38(i1 %cond) { 674 %zero = alloca i32 675 %one = alloca i32 676 %ptr = select i1 %cond, i32* %zero, i32* %one 677 %isnull = icmp eq i32* %ptr, null 678 ret i1 %isnull 679; CHECK-LABEL: @test38( 680; CHECK: ret i1 false 681} 682 683define i1 @test39(i1 %cond, double %x) { 684 %s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty 685 %cmp = fcmp ule double %x, %s 686 ret i1 %cmp 687; CHECK-LABEL: @test39( 688; CHECK: ret i1 true 689} 690 691define i1 @test40(i1 %cond) { 692 %a = alloca i32 693 %b = alloca i32 694 %c = alloca i32 695 %s = select i1 %cond, i32* %a, i32* %b 696 %r = icmp eq i32* %s, %c 697 ret i1 %r 698; CHECK-LABEL: @test40( 699; CHECK: ret i1 false 700} 701 702define i32 @test41(i1 %cond, i32 %x, i32 %y) { 703 %z = and i32 %x, %y 704 %s = select i1 %cond, i32 %y, i32 %z 705 %r = and i32 %x, %s 706 ret i32 %r 707; CHECK-LABEL: @test41( 708; CHECK-NEXT: and i32 %x, %y 709; CHECK-NEXT: ret i32 710} 711 712define i32 @test42(i32 %x, i32 %y) { 713 %b = add i32 %y, -1 714 %cond = icmp eq i32 %x, 0 715 %c = select i1 %cond, i32 %b, i32 %y 716 ret i32 %c 717; CHECK-LABEL: @test42( 718; CHECK-NEXT: %cond = icmp eq i32 %x, 0 719; CHECK-NEXT: %b = sext i1 %cond to i32 720; CHECK-NEXT: %c = add i32 %b, %y 721; CHECK-NEXT: ret i32 %c 722} 723 724; PR8994 725 726; This select instruction can't be eliminated because trying to do so would 727; change the number of vector elements. This used to assert. 728define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) { 729; CHECK-LABEL: @test51( 730 %select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp 731; CHECK: select <3 x i1> 732 %tmp2 = bitcast <3 x i16> %select to i48 733 ret i48 %tmp2 734} 735 736; Allow select promotion even if there are multiple uses of bitcasted ops. 737; Hoisting the selects allows later pattern matching to see that these are min/max ops. 738 739define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) { 740; CHECK-LABEL: @min_max_bitcast( 741; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %a, %b 742; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %a, <4 x float> %b 743; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %b, <4 x float> %a 744; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* %ptr1 to <4 x float>* 745; CHECK-NEXT: store <4 x float> [[SEL1_V]], <4 x float>* [[TMP1]], align 16 746; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* %ptr2 to <4 x float>* 747; CHECK-NEXT: store <4 x float> [[SEL2_V]], <4 x float>* [[TMP2]], align 16 748; CHECK-NEXT: ret void 749; 750 %cmp = fcmp olt <4 x float> %a, %b 751 %bc1 = bitcast <4 x float> %a to <4 x i32> 752 %bc2 = bitcast <4 x float> %b to <4 x i32> 753 %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2 754 %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1 755 store <4 x i32> %sel1, <4 x i32>* %ptr1 756 store <4 x i32> %sel2, <4 x i32>* %ptr2 757 ret void 758} 759 760; To avoid potential backend problems, we don't do the same transform for other casts. 761 762define void @truncs_before_selects(<4 x float> %f1, <4 x float> %f2, <4 x i64> %a, <4 x i64> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) { 763; CHECK-LABEL: @truncs_before_selects( 764; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %f1, %f2 765; CHECK-NEXT: [[BC1:%.*]] = trunc <4 x i64> %a to <4 x i32> 766; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> %b to <4 x i32> 767; CHECK-NEXT: [[SEL1:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC1]], <4 x i32> [[BC2]] 768; CHECK-NEXT: [[SEL2:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC2]], <4 x i32> [[BC1]] 769; CHECK-NEXT: store <4 x i32> [[SEL1]], <4 x i32>* %ptr1, align 16 770; CHECK-NEXT: store <4 x i32> [[SEL2]], <4 x i32>* %ptr2, align 16 771; CHECK-NEXT: ret void 772; 773 %cmp = fcmp olt <4 x float> %f1, %f2 774 %bc1 = trunc <4 x i64> %a to <4 x i32> 775 %bc2 = trunc <4 x i64> %b to <4 x i32> 776 %sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2 777 %sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1 778 store <4 x i32> %sel1, <4 x i32>* %ptr1, align 16 779 store <4 x i32> %sel2, <4 x i32>* %ptr2, align 16 780 ret void 781} 782 783; PR8575 784 785define i32 @test52(i32 %n, i32 %m) nounwind { 786; CHECK-LABEL: @test52( 787 %cmp = icmp sgt i32 %n, %m 788 %. = select i1 %cmp, i32 1, i32 3 789 %add = add nsw i32 %., 3 790 %storemerge = select i1 %cmp, i32 %., i32 %add 791; CHECK: select i1 %cmp, i32 1, i32 6 792 ret i32 %storemerge 793} 794 795; PR9454 796define i32 @test53(i32 %x) nounwind { 797 %and = and i32 %x, 2 798 %cmp = icmp eq i32 %and, %x 799 %sel = select i1 %cmp, i32 2, i32 1 800 ret i32 %sel 801; CHECK-LABEL: @test53( 802; CHECK: select i1 %cmp 803; CHECK: ret 804} 805 806define i32 @test54(i32 %X, i32 %Y) { 807 %A = ashr exact i32 %X, %Y 808 %B = icmp eq i32 %A, 0 809 %C = select i1 %B, i32 %A, i32 1 810 ret i32 %C 811; CHECK-LABEL: @test54( 812; CHECK-NOT: ashr 813; CHECK-NOT: select 814; CHECK: icmp ne i32 %X, 0 815; CHECK: zext 816; CHECK: ret 817} 818 819define i1 @test55(i1 %X, i32 %Y, i32 %Z) { 820 %A = ashr exact i32 %Y, %Z 821 %B = select i1 %X, i32 %Y, i32 %A 822 %C = icmp eq i32 %B, 0 823 ret i1 %C 824; CHECK-LABEL: @test55( 825; CHECK-NOT: ashr 826; CHECK-NOT: select 827; CHECK: icmp eq 828; CHECK: ret i1 829} 830 831define i32 @test56(i16 %x) nounwind { 832 %tobool = icmp eq i16 %x, 0 833 %conv = zext i16 %x to i32 834 %cond = select i1 %tobool, i32 0, i32 %conv 835 ret i32 %cond 836; CHECK-LABEL: @test56( 837; CHECK-NEXT: zext 838; CHECK-NEXT: ret 839} 840 841define i32 @test57(i32 %x, i32 %y) nounwind { 842 %and = and i32 %x, %y 843 %tobool = icmp eq i32 %x, 0 844 %.and = select i1 %tobool, i32 0, i32 %and 845 ret i32 %.and 846; CHECK-LABEL: @test57( 847; CHECK-NEXT: and i32 %x, %y 848; CHECK-NEXT: ret 849} 850 851define i32 @test58(i16 %x) nounwind { 852 %tobool = icmp ne i16 %x, 1 853 %conv = zext i16 %x to i32 854 %cond = select i1 %tobool, i32 %conv, i32 1 855 ret i32 %cond 856; CHECK-LABEL: @test58( 857; CHECK-NEXT: zext 858; CHECK-NEXT: ret 859} 860 861define i32 @test59(i32 %x, i32 %y) nounwind { 862 %and = and i32 %x, %y 863 %tobool = icmp ne i32 %x, %y 864 %.and = select i1 %tobool, i32 %and, i32 %y 865 ret i32 %.and 866; CHECK-LABEL: @test59( 867; CHECK-NEXT: and i32 %x, %y 868; CHECK-NEXT: ret 869} 870 871define i1 @test60(i32 %x, i1* %y) nounwind { 872 %cmp = icmp eq i32 %x, 0 873 %load = load i1, i1* %y, align 1 874 %cmp1 = icmp slt i32 %x, 1 875 %sel = select i1 %cmp, i1 %load, i1 %cmp1 876 ret i1 %sel 877; CHECK-LABEL: @test60( 878; CHECK: select 879} 880 881@glbl = constant i32 10 882define i32 @test61(i32* %ptr) { 883 %A = load i32, i32* %ptr 884 %B = icmp eq i32* %ptr, @glbl 885 %C = select i1 %B, i32 %A, i32 10 886 ret i32 %C 887; CHECK-LABEL: @test61( 888; CHECK: ret i32 10 889} 890 891; PR14131 892define void @test64(i32 %p, i16 %b) noreturn nounwind { 893entry: 894 %p.addr.0.insert.mask = and i32 %p, -65536 895 %conv2 = and i32 %p, 65535 896 br i1 undef, label %lor.rhs, label %lor.end 897 898lor.rhs: 899 %p.addr.0.extract.trunc = trunc i32 %p.addr.0.insert.mask to i16 900 %phitmp = zext i16 %p.addr.0.extract.trunc to i32 901 br label %lor.end 902 903lor.end: 904 %t.1 = phi i32 [ 0, %entry ], [ %phitmp, %lor.rhs ] 905 %conv6 = zext i16 %b to i32 906 %div = udiv i32 %conv6, %t.1 907 %tobool8 = icmp eq i32 %div, 0 908 %cmp = icmp eq i32 %t.1, 0 909 %cmp12 = icmp ult i32 %conv2, 2 910 %cmp.sink = select i1 %tobool8, i1 %cmp12, i1 %cmp 911 br i1 %cmp.sink, label %cond.end17, label %cond.false16 912 913cond.false16: 914 br label %cond.end17 915 916cond.end17: 917 br label %while.body 918 919while.body: 920 br label %while.body 921; CHECK-LABEL: @test64( 922; CHECK-NOT: select 923} 924 925@under_aligned = external global i32, align 1 926 927define i32 @test76(i1 %flag, i32* %x) { 928; The load here must not be speculated around the select. One side of the 929; select is trivially dereferencable but may have a lower alignment than the 930; load does. 931; CHECK-LABEL: @test76( 932; CHECK: store i32 0, i32* %x 933; CHECK: %[[P:.*]] = select i1 %flag, i32* @under_aligned, i32* %x 934; CHECK: load i32, i32* %[[P]] 935 936 store i32 0, i32* %x 937 %p = select i1 %flag, i32* @under_aligned, i32* %x 938 %v = load i32, i32* %p 939 ret i32 %v 940} 941 942declare void @scribble_on_i32(i32*) 943 944define i32 @test77(i1 %flag, i32* %x) { 945; The load here must not be speculated around the select. One side of the 946; select is trivially dereferencable but may have a lower alignment than the 947; load does. 948; CHECK-LABEL: @test77( 949; CHECK: %[[A:.*]] = alloca i32, align 1 950; CHECK: call void @scribble_on_i32(i32* nonnull %[[A]]) 951; CHECK: store i32 0, i32* %x 952; CHECK: %[[P:.*]] = select i1 %flag, i32* %[[A]], i32* %x 953; CHECK: load i32, i32* %[[P]] 954 955 %under_aligned = alloca i32, align 1 956 call void @scribble_on_i32(i32* %under_aligned) 957 store i32 0, i32* %x 958 %p = select i1 %flag, i32* %under_aligned, i32* %x 959 %v = load i32, i32* %p 960 ret i32 %v 961} 962 963define i32 @test78(i1 %flag, i32* %x, i32* %y, i32* %z) { 964; Test that we can speculate the loads around the select even when we can't 965; fold the load completely away. 966; CHECK-LABEL: @test78( 967; CHECK: %[[V1:.*]] = load i32, i32* %x 968; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y 969; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]] 970; CHECK-NEXT: ret i32 %[[S]] 971entry: 972 store i32 0, i32* %x 973 store i32 0, i32* %y 974 ; Block forwarding by storing to %z which could alias either %x or %y. 975 store i32 42, i32* %z 976 %p = select i1 %flag, i32* %x, i32* %y 977 %v = load i32, i32* %p 978 ret i32 %v 979} 980 981define i32 @test78_deref(i1 %flag, i32* dereferenceable(4) %x, i32* dereferenceable(4) %y, i32* %z) { 982; Test that we can speculate the loads around the select even when we can't 983; fold the load completely away. 984; CHECK-LABEL: @test78_deref( 985; CHECK: %[[V1:.*]] = load i32, i32* %x 986; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y 987; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]] 988; CHECK-NEXT: ret i32 %[[S]] 989entry: 990 %p = select i1 %flag, i32* %x, i32* %y 991 %v = load i32, i32* %p 992 ret i32 %v 993} 994 995define i32 @test78_neg(i1 %flag, i32* %x, i32* %y, i32* %z) { 996; The same as @test78 but we can't speculate the load because it can trap 997; if under-aligned. 998; CHECK-LABEL: @test78_neg( 999; CHECK: %p = select i1 %flag, i32* %x, i32* %y 1000; CHECK-NEXT: %v = load i32, i32* %p, align 16 1001; CHECK-NEXT: ret i32 %v 1002entry: 1003 store i32 0, i32* %x 1004 store i32 0, i32* %y 1005 ; Block forwarding by storing to %z which could alias either %x or %y. 1006 store i32 42, i32* %z 1007 %p = select i1 %flag, i32* %x, i32* %y 1008 %v = load i32, i32* %p, align 16 1009 ret i32 %v 1010} 1011 1012define i32 @test78_deref_neg(i1 %flag, i32* dereferenceable(2) %x, i32* dereferenceable(4) %y, i32* %z) { 1013; The same as @test78_deref but we can't speculate the load because 1014; one of the arguments is not sufficiently dereferenceable. 1015; CHECK-LABEL: @test78_deref_neg( 1016; CHECK: %p = select i1 %flag, i32* %x, i32* %y 1017; CHECK-NEXT: %v = load i32, i32* %p 1018; CHECK-NEXT: ret i32 %v 1019entry: 1020 %p = select i1 %flag, i32* %x, i32* %y 1021 %v = load i32, i32* %p 1022 ret i32 %v 1023} 1024 1025define float @test79(i1 %flag, float* %x, i32* %y, i32* %z) { 1026; Test that we can speculate the loads around the select even when we can't 1027; fold the load completely away. 1028; CHECK-LABEL: @test79( 1029; CHECK: %[[V1:.*]] = load float, float* %x 1030; CHECK-NEXT: %[[V2:.*]] = load float, float* %y 1031; CHECK-NEXT: %[[S:.*]] = select i1 %flag, float %[[V1]], float %[[V2]] 1032; CHECK-NEXT: ret float %[[S]] 1033entry: 1034 %x1 = bitcast float* %x to i32* 1035 %y1 = bitcast i32* %y to float* 1036 store i32 0, i32* %x1 1037 store i32 0, i32* %y 1038 ; Block forwarding by storing to %z which could alias either %x or %y. 1039 store i32 42, i32* %z 1040 %p = select i1 %flag, float* %x, float* %y1 1041 %v = load float, float* %p 1042 ret float %v 1043} 1044 1045define i32 @test80(i1 %flag) { 1046; Test that when we speculate the loads around the select they fold throug 1047; load->load folding and load->store folding. 1048; CHECK-LABEL: @test80( 1049; CHECK: %[[X:.*]] = alloca i32 1050; CHECK-NEXT: %[[Y:.*]] = alloca i32 1051; CHECK: %[[V:.*]] = load i32, i32* %[[X]] 1052; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]] 1053; CHECK-NEXT: ret i32 %[[V]] 1054entry: 1055 %x = alloca i32 1056 %y = alloca i32 1057 call void @scribble_on_i32(i32* %x) 1058 call void @scribble_on_i32(i32* %y) 1059 %tmp = load i32, i32* %x 1060 store i32 %tmp, i32* %y 1061 %p = select i1 %flag, i32* %x, i32* %y 1062 %v = load i32, i32* %p 1063 ret i32 %v 1064} 1065 1066define float @test81(i1 %flag) { 1067; Test that we can speculate the load around the select even though they use 1068; differently typed pointers. 1069; CHECK-LABEL: @test81( 1070; CHECK: %[[X:.*]] = alloca i32 1071; CHECK-NEXT: %[[Y:.*]] = alloca i32 1072; CHECK: %[[V:.*]] = load i32, i32* %[[X]] 1073; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]] 1074; CHECK-NEXT: %[[C:.*]] = bitcast i32 %[[V]] to float 1075; CHECK-NEXT: ret float %[[C]] 1076entry: 1077 %x = alloca float 1078 %y = alloca i32 1079 %x1 = bitcast float* %x to i32* 1080 %y1 = bitcast i32* %y to float* 1081 call void @scribble_on_i32(i32* %x1) 1082 call void @scribble_on_i32(i32* %y) 1083 %tmp = load i32, i32* %x1 1084 store i32 %tmp, i32* %y 1085 %p = select i1 %flag, float* %x, float* %y1 1086 %v = load float, float* %p 1087 ret float %v 1088} 1089 1090define i32 @test82(i1 %flag) { 1091; Test that we can speculate the load around the select even though they use 1092; differently typed pointers. 1093; CHECK-LABEL: @test82( 1094; CHECK: %[[X:.*]] = alloca float 1095; CHECK-NEXT: %[[Y:.*]] = alloca i32 1096; CHECK-NEXT: %[[X1:.*]] = bitcast float* %[[X]] to i32* 1097; CHECK-NEXT: %[[Y1:.*]] = bitcast i32* %[[Y]] to float* 1098; CHECK: %[[V:.*]] = load float, float* %[[X]] 1099; CHECK-NEXT: store float %[[V]], float* %[[Y1]] 1100; CHECK-NEXT: %[[C:.*]] = bitcast float %[[V]] to i32 1101; CHECK-NEXT: ret i32 %[[C]] 1102entry: 1103 %x = alloca float 1104 %y = alloca i32 1105 %x1 = bitcast float* %x to i32* 1106 %y1 = bitcast i32* %y to float* 1107 call void @scribble_on_i32(i32* %x1) 1108 call void @scribble_on_i32(i32* %y) 1109 %tmp = load float, float* %x 1110 store float %tmp, float* %y1 1111 %p = select i1 %flag, i32* %x1, i32* %y 1112 %v = load i32, i32* %p 1113 ret i32 %v 1114} 1115 1116declare void @scribble_on_i64(i64*) 1117declare void @scribble_on_i128(i128*) 1118 1119define i8* @test83(i1 %flag) { 1120; Test that we can speculate the load around the select even though they use 1121; differently typed pointers and requires inttoptr casts. 1122; CHECK-LABEL: @test83( 1123; CHECK: %[[X:.*]] = alloca i8* 1124; CHECK-NEXT: %[[Y:.*]] = alloca i8* 1125; CHECK-DAG: %[[X2:.*]] = bitcast i8** %[[X]] to i64* 1126; CHECK-DAG: %[[Y2:.*]] = bitcast i8** %[[Y]] to i64* 1127; CHECK: %[[V:.*]] = load i64, i64* %[[X2]] 1128; CHECK-NEXT: store i64 %[[V]], i64* %[[Y2]] 1129; CHECK-NEXT: %[[C:.*]] = inttoptr i64 %[[V]] to i8* 1130; CHECK-NEXT: ret i8* %[[S]] 1131entry: 1132 %x = alloca i8* 1133 %y = alloca i64 1134 %x1 = bitcast i8** %x to i64* 1135 %y1 = bitcast i64* %y to i8** 1136 call void @scribble_on_i64(i64* %x1) 1137 call void @scribble_on_i64(i64* %y) 1138 %tmp = load i64, i64* %x1 1139 store i64 %tmp, i64* %y 1140 %p = select i1 %flag, i8** %x, i8** %y1 1141 %v = load i8*, i8** %p 1142 ret i8* %v 1143} 1144 1145define i64 @test84(i1 %flag) { 1146; Test that we can speculate the load around the select even though they use 1147; differently typed pointers and requires a ptrtoint cast. 1148; CHECK-LABEL: @test84( 1149; CHECK: %[[X:.*]] = alloca i8* 1150; CHECK-NEXT: %[[Y:.*]] = alloca i8* 1151; CHECK: %[[V:.*]] = load i8*, i8** %[[X]] 1152; CHECK-NEXT: store i8* %[[V]], i8** %[[Y]] 1153; CHECK-NEXT: %[[C:.*]] = ptrtoint i8* %[[V]] to i64 1154; CHECK-NEXT: ret i64 %[[C]] 1155entry: 1156 %x = alloca i8* 1157 %y = alloca i64 1158 %x1 = bitcast i8** %x to i64* 1159 %y1 = bitcast i64* %y to i8** 1160 call void @scribble_on_i64(i64* %x1) 1161 call void @scribble_on_i64(i64* %y) 1162 %tmp = load i8*, i8** %x 1163 store i8* %tmp, i8** %y1 1164 %p = select i1 %flag, i64* %x1, i64* %y 1165 %v = load i64, i64* %p 1166 ret i64 %v 1167} 1168 1169define i8* @test85(i1 %flag) { 1170; Test that we can't speculate the load around the select. The load of the 1171; pointer doesn't load all of the stored integer bits. We could fix this, but it 1172; would require endianness checks and other nastiness. 1173; CHECK-LABEL: @test85( 1174; CHECK: %[[T:.*]] = load i128, i128* 1175; CHECK-NEXT: store i128 %[[T]], i128* 1176; CHECK-NEXT: %[[X:.*]] = load i8*, i8** 1177; CHECK-NEXT: %[[Y:.*]] = load i8*, i8** 1178; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i8* %[[X]], i8* %[[Y]] 1179; CHECK-NEXT: ret i8* %[[V]] 1180entry: 1181 %x = alloca [2 x i8*] 1182 %y = alloca i128 1183 %x1 = bitcast [2 x i8*]* %x to i8** 1184 %x2 = bitcast i8** %x1 to i128* 1185 %y1 = bitcast i128* %y to i8** 1186 call void @scribble_on_i128(i128* %x2) 1187 call void @scribble_on_i128(i128* %y) 1188 %tmp = load i128, i128* %x2 1189 store i128 %tmp, i128* %y 1190 %p = select i1 %flag, i8** %x1, i8** %y1 1191 %v = load i8*, i8** %p 1192 ret i8* %v 1193} 1194 1195define i128 @test86(i1 %flag) { 1196; Test that we can't speculate the load around the select when the integer size 1197; is larger than the pointer size. The store of the pointer doesn't store to all 1198; the bits of the integer. 1199; 1200; CHECK-LABEL: @test86( 1201; CHECK: %[[T:.*]] = load i8*, i8** 1202; CHECK-NEXT: store i8* %[[T]], i8** 1203; CHECK-NEXT: %[[X:.*]] = load i128, i128* 1204; CHECK-NEXT: %[[Y:.*]] = load i128, i128* 1205; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i128 %[[X]], i128 %[[Y]] 1206; CHECK-NEXT: ret i128 %[[V]] 1207entry: 1208 %x = alloca [2 x i8*] 1209 %y = alloca i128 1210 %x1 = bitcast [2 x i8*]* %x to i8** 1211 %x2 = bitcast i8** %x1 to i128* 1212 %y1 = bitcast i128* %y to i8** 1213 call void @scribble_on_i128(i128* %x2) 1214 call void @scribble_on_i128(i128* %y) 1215 %tmp = load i8*, i8** %x1 1216 store i8* %tmp, i8** %y1 1217 %p = select i1 %flag, i128* %x2, i128* %y 1218 %v = load i128, i128* %p 1219 ret i128 %v 1220} 1221 1222define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { 1223 ; CHECK-LABEL: @test_select_select0( 1224 ; CHECK: %[[C0:.*]] = icmp sge i32 %a, %v1 1225 ; CHECK-NEXT: %[[C1:.*]] = icmp slt i32 %a, %v2 1226 ; CHECK-NEXT: %[[C:.*]] = and i1 %[[C1]], %[[C0]] 1227 ; CHECK-NEXT: %[[SEL:.*]] = select i1 %[[C]], i32 %r0, i32 %r1 1228 ; CHECK-NEXT: ret i32 %[[SEL]] 1229 %c0 = icmp sge i32 %a, %v1 1230 %s0 = select i1 %c0, i32 %r0, i32 %r1 1231 %c1 = icmp slt i32 %a, %v2 1232 %s1 = select i1 %c1, i32 %s0, i32 %r1 1233 ret i32 %s1 1234} 1235 1236define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) { 1237 ; CHECK-LABEL: @test_select_select1( 1238 ; CHECK: %[[C0:.*]] = icmp sge i32 %a, %v1 1239 ; CHECK-NEXT: %[[C1:.*]] = icmp slt i32 %a, %v2 1240 ; CHECK-NEXT: %[[C:.*]] = or i1 %[[C1]], %[[C0]] 1241 ; CHECK-NEXT: %[[SEL:.*]] = select i1 %[[C]], i32 %r0, i32 %r1 1242 ; CHECK-NEXT: ret i32 %[[SEL]] 1243 %c0 = icmp sge i32 %a, %v1 1244 %s0 = select i1 %c0, i32 %r0, i32 %r1 1245 %c1 = icmp slt i32 %a, %v2 1246 %s1 = select i1 %c1, i32 %r0, i32 %s0 1247 ret i32 %s1 1248} 1249 1250define i32 @PR23757(i32 %x) { 1251; CHECK-LABEL: @PR23757 1252; CHECK: %[[cmp:.*]] = icmp eq i32 %x, 2147483647 1253; CHECK-NEXT: %[[add:.*]] = add nsw i32 %x, 1 1254; CHECK-NEXT: %[[sel:.*]] = select i1 %[[cmp]], i32 -2147483648, i32 %[[add]] 1255; CHECK-NEXT: ret i32 %[[sel]] 1256 %cmp = icmp eq i32 %x, 2147483647 1257 %add = add nsw i32 %x, 1 1258 %sel = select i1 %cmp, i32 -2147483648, i32 %add 1259 ret i32 %sel 1260} 1261 1262; max(max(~a, -1), -1) --> max(~a, -1) 1263 1264define i32 @PR27137(i32 %a) { 1265; CHECK-LABEL: @PR27137( 1266; CHECK-NEXT: [[NOT_A:%.*]] = xor i32 %a, -1 1267; CHECK-NEXT: [[C0:%.*]] = icmp slt i32 %a, 0 1268; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0]], i32 [[NOT_A]], i32 -1 1269; CHECK-NEXT: ret i32 [[S0]] 1270; 1271 1272 %not_a = xor i32 %a, -1 1273 %c0 = icmp slt i32 %a, 0 1274 %s0 = select i1 %c0, i32 %not_a, i32 -1 1275 %c1 = icmp sgt i32 %s0, -1 1276 %s1 = select i1 %c1, i32 %s0, i32 -1 1277 ret i32 %s1 1278} 1279 1280define i32 @select_icmp_slt0_xor(i32 %x) { 1281; CHECK-LABEL: @select_icmp_slt0_xor( 1282; CHECK-NEXT: [[TMP1:%.*]] = or i32 %x, -2147483648 1283; CHECK-NEXT: ret i32 [[TMP1]] 1284; 1285 %cmp = icmp slt i32 %x, zeroinitializer 1286 %xor = xor i32 %x, 2147483648 1287 %x.xor = select i1 %cmp, i32 %x, i32 %xor 1288 ret i32 %x.xor 1289} 1290 1291define <2 x i32> @select_icmp_slt0_xor_vec(<2 x i32> %x) { 1292; CHECK-LABEL: @select_icmp_slt0_xor_vec( 1293; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> %x, <i32 -2147483648, i32 -2147483648> 1294; CHECK-NEXT: ret <2 x i32> [[TMP1]] 1295; 1296 %cmp = icmp slt <2 x i32> %x, zeroinitializer 1297 %xor = xor <2 x i32> %x, <i32 2147483648, i32 2147483648> 1298 %x.xor = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %xor 1299 ret <2 x i32> %x.xor 1300} 1301 1302; Make sure that undef elements of the select condition are translated into undef elements of the shuffle mask. 1303 1304define <4 x i32> @canonicalize_to_shuffle(<4 x i32> %a, <4 x i32> %b) { 1305; CHECK-LABEL: @canonicalize_to_shuffle( 1306; CHECK-NEXT: [[SEL:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 6, i32 undef> 1307; CHECK-NEXT: ret <4 x i32> [[SEL]] 1308; 1309 %sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> %a, <4 x i32> %b 1310 ret <4 x i32> %sel 1311} 1312 1313; Don't die or try if the condition mask is a constant expression or contains a constant expression. 1314 1315@g = global i32 0 1316 1317define <4 x i32> @cannot_canonicalize_to_shuffle1(<4 x i32> %a, <4 x i32> %b) { 1318; CHECK-LABEL: @cannot_canonicalize_to_shuffle1( 1319; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> %a, <4 x i32> %b 1320; CHECK-NEXT: ret <4 x i32> [[SEL]] 1321; 1322 %sel = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> %a, <4 x i32> %b 1323 ret <4 x i32> %sel 1324} 1325 1326define <4 x i32> @cannot_canonicalize_to_shuffle2(<4 x i32> %a, <4 x i32> %b) { 1327; CHECK-LABEL: @cannot_canonicalize_to_shuffle2( 1328; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> %a, <4 x i32> %b 1329; CHECK-NEXT: ret <4 x i32> [[SEL]] 1330; 1331 %sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> %a, <4 x i32> %b 1332 ret <4 x i32> %sel 1333} 1334 1335