1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; Tests to make sure elimination of casts is working correctly
3; RUN: opt < %s -instcombine -S | FileCheck %s
4target datalayout = "E-p:64:64:64-p1:32:32:32-p2:64:64:64-p3:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n8:16:32:64"
5
6@inbuf = external global [32832 x i8]           ; <[32832 x i8]*> [#uses=1]
7
8define i32 @test1(i32 %A) {
9; CHECK-LABEL: @test1(
10; CHECK-NEXT:    ret i32 %A
11;
12  %c1 = bitcast i32 %A to i32             ; <i32> [#uses=1]
13  %c2 = bitcast i32 %c1 to i32            ; <i32> [#uses=1]
14  ret i32 %c2
15}
16
17define i64 @test2(i8 %A) {
18; CHECK-LABEL: @test2(
19; CHECK-NEXT:    [[RET:%.*]] = zext i8 %A to i64
20; CHECK-NEXT:    ret i64 [[RET]]
21;
22  %c1 = zext i8 %A to i16         ; <i16> [#uses=1]
23  %c2 = zext i16 %c1 to i32               ; <i32> [#uses=1]
24  %Ret = zext i32 %c2 to i64              ; <i64> [#uses=1]
25  ret i64 %Ret
26}
27
28; This function should just use bitwise AND
29define i64 @test3(i64 %A) {
30; CHECK-LABEL: @test3(
31; CHECK-NEXT:    [[C2:%.*]] = and i64 %A, 255
32; CHECK-NEXT:    ret i64 [[C2]]
33;
34  %c1 = trunc i64 %A to i8                ; <i8> [#uses=1]
35  %c2 = zext i8 %c1 to i64                ; <i64> [#uses=1]
36  ret i64 %c2
37}
38
39define i32 @test4(i32 %A, i32 %B) {
40; CHECK-LABEL: @test4(
41; CHECK-NEXT:    [[COND:%.*]] = icmp slt i32 %A, %B
42; CHECK-NEXT:    [[RESULT:%.*]] = zext i1 [[COND]] to i32
43; CHECK-NEXT:    ret i32 [[RESULT]]
44;
45  %COND = icmp slt i32 %A, %B             ; <i1> [#uses=1]
46  ; Booleans are unsigned integrals
47  %c = zext i1 %COND to i8                ; <i8> [#uses=1]
48  ; for the cast elim purpose
49  %result = zext i8 %c to i32             ; <i32> [#uses=1]
50  ret i32 %result
51}
52
53define i32 @test5(i1 %B) {
54        ; This cast should get folded into
55; CHECK-LABEL: @test5(
56; CHECK-NEXT:    [[RESULT:%.*]] = zext i1 %B to i32
57; CHECK-NEXT:    ret i32 [[RESULT]]
58;
59  %c = zext i1 %B to i8           ; <i8> [#uses=1]
60  ; this cast
61  %result = zext i8 %c to i32             ; <i32> [#uses=1]
62  ret i32 %result
63}
64
65define i32 @test6(i64 %A) {
66; CHECK-LABEL: @test6(
67; CHECK-NEXT:    [[C1:%.*]] = trunc i64 %A to i32
68; CHECK-NEXT:    ret i32 [[C1]]
69;
70  %c1 = trunc i64 %A to i32               ; <i32> [#uses=1]
71  %res = bitcast i32 %c1 to i32           ; <i32> [#uses=1]
72  ret i32 %res
73}
74
75define i64 @test7(i1 %A) {
76; CHECK-LABEL: @test7(
77; CHECK-NEXT:    [[RES:%.*]] = zext i1 %A to i64
78; CHECK-NEXT:    ret i64 [[RES]]
79;
80  %c1 = zext i1 %A to i32         ; <i32> [#uses=1]
81  %res = sext i32 %c1 to i64              ; <i64> [#uses=1]
82  ret i64 %res
83}
84
85define i64 @test8(i8 %A) {
86; CHECK-LABEL: @test8(
87; CHECK-NEXT:    [[C1:%.*]] = sext i8 %A to i64
88; CHECK-NEXT:    ret i64 [[C1]]
89;
90  %c1 = sext i8 %A to i64         ; <i64> [#uses=1]
91  %res = bitcast i64 %c1 to i64           ; <i64> [#uses=1]
92  ret i64 %res
93}
94
95define i16 @test9(i16 %A) {
96; CHECK-LABEL: @test9(
97; CHECK-NEXT:    ret i16 %A
98;
99  %c1 = sext i16 %A to i32                ; <i32> [#uses=1]
100  %c2 = trunc i32 %c1 to i16              ; <i16> [#uses=1]
101  ret i16 %c2
102}
103
104define i16 @test10(i16 %A) {
105; CHECK-LABEL: @test10(
106; CHECK-NEXT:    ret i16 %A
107;
108  %c1 = sext i16 %A to i32                ; <i32> [#uses=1]
109  %c2 = trunc i32 %c1 to i16              ; <i16> [#uses=1]
110  ret i16 %c2
111}
112
113declare void @varargs(i32, ...)
114
115define void @test11(i32* %P) {
116; CHECK-LABEL: @test11(
117; CHECK-NEXT:    call void (i32, ...) @varargs(i32 5, i32* %P)
118; CHECK-NEXT:    ret void
119;
120  %c = bitcast i32* %P to i16*            ; <i16*> [#uses=1]
121  call void (i32, ...) @varargs( i32 5, i16* %c )
122  ret void
123}
124
125declare i32 @__gxx_personality_v0(...)
126define void @test_invoke_vararg_cast(i32* %a, i32* %b) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
127; CHECK-LABEL: @test_invoke_vararg_cast(
128; CHECK-NEXT:  entry:
129; CHECK-NEXT:    invoke void (i32, ...) @varargs(i32 1, i32* %b, i32* %a)
130; CHECK-NEXT:    to label %invoke.cont unwind label %lpad
131; CHECK:       invoke.cont:
132; CHECK-NEXT:    ret void
133; CHECK:       lpad:
134; CHECK-NEXT:    [[TMP0:%.*]] = landingpad { i8*, i32
135;
136entry:
137  %0 = bitcast i32* %b to i8*
138  %1 = bitcast i32* %a to i64*
139  invoke void (i32, ...) @varargs(i32 1, i8* %0, i64* %1)
140  to label %invoke.cont unwind label %lpad
141
142invoke.cont:                                      ; preds = %entry
143  ret void
144
145lpad:                                             ; preds = %entry
146  %2 = landingpad { i8*, i32 }
147  cleanup
148  ret void
149}
150
151define i8* @test13(i64 %A) {
152; CHECK-LABEL: @test13(
153; CHECK-NEXT:    [[C:%.*]] = getelementptr [32832 x i8], [32832 x i8]* @inbuf, i64 0, i64 %A
154; CHECK-NEXT:    ret i8* [[C]]
155;
156  %c = getelementptr [0 x i8], [0 x i8]* bitcast ([32832 x i8]* @inbuf to [0 x i8]*), i64 0, i64 %A             ; <i8*> [#uses=1]
157  ret i8* %c
158}
159
160define i1 @test14(i8 %A) {
161; CHECK-LABEL: @test14(
162; CHECK-NEXT:    [[X:%.*]] = icmp sgt i8 %A, -1
163; CHECK-NEXT:    ret i1 [[X]]
164;
165  %c = bitcast i8 %A to i8                ; <i8> [#uses=1]
166  %X = icmp ult i8 %c, -128               ; <i1> [#uses=1]
167  ret i1 %X
168}
169
170
171; This just won't occur when there's no difference between ubyte and sbyte
172;bool %test15(ubyte %A) {
173;        %c = cast ubyte %A to sbyte
174;        %X = setlt sbyte %c, 0   ; setgt %A, 127
175;        ret bool %X
176;}
177
178define i1 @test16(i32* %P) {
179; CHECK-LABEL: @test16(
180; CHECK-NEXT:    [[C:%.*]] = icmp ne i32* %P, null
181; CHECK-NEXT:    ret i1 [[C]]
182;
183  %c = icmp ne i32* %P, null              ; <i1> [#uses=1]
184  ret i1 %c
185}
186
187define i16 @test17(i1 %tmp3) {
188; CHECK-LABEL: @test17(
189; CHECK-NEXT:    [[T86:%.*]] = zext i1 %tmp3 to i16
190; CHECK-NEXT:    ret i16 [[T86]]
191;
192  %c = zext i1 %tmp3 to i32               ; <i32> [#uses=1]
193  %t86 = trunc i32 %c to i16              ; <i16> [#uses=1]
194  ret i16 %t86
195}
196
197define i16 @test18(i8 %tmp3) {
198; CHECK-LABEL: @test18(
199; CHECK-NEXT:    [[T86:%.*]] = sext i8 %tmp3 to i16
200; CHECK-NEXT:    ret i16 [[T86]]
201;
202  %c = sext i8 %tmp3 to i32               ; <i32> [#uses=1]
203  %t86 = trunc i32 %c to i16              ; <i16> [#uses=1]
204  ret i16 %t86
205}
206
207define i1 @test19(i32 %X) {
208; CHECK-LABEL: @test19(
209; CHECK-NEXT:    [[Z:%.*]] = icmp slt i32 %X, 12345
210; CHECK-NEXT:    ret i1 [[Z]]
211;
212  %c = sext i32 %X to i64
213  %Z = icmp slt i64 %c, 12345
214  ret i1 %Z
215}
216
217define <2 x i1> @test19vec(<2 x i32> %X) {
218; CHECK-LABEL: @test19vec(
219; CHECK-NEXT:    [[Z:%.*]] = icmp slt <2 x i32> %X, <i32 12345, i32 2147483647>
220; CHECK-NEXT:    ret <2 x i1> [[Z]]
221;
222  %c = sext <2 x i32> %X to <2 x i64>
223  %Z = icmp slt <2 x i64> %c, <i64 12345, i64 2147483647>
224  ret <2 x i1> %Z
225}
226
227define <3 x i1> @test19vec2(<3 x i1> %X) {
228; CHECK-LABEL: @test19vec2(
229; CHECK-NEXT:    [[CMPEQ:%.*]] = xor <3 x i1> %X, <i1 true, i1 true, i1 true>
230; CHECK-NEXT:    ret <3 x i1> [[CMPEQ]]
231;
232  %sext = sext <3 x i1> %X to <3 x i32>
233  %cmpeq = icmp eq <3 x i32> %sext, zeroinitializer
234  ret <3 x i1> %cmpeq
235}
236
237define i1 @test20(i1 %B) {
238; CHECK-LABEL: @test20(
239; CHECK-NEXT:    ret i1 false
240;
241  %c = zext i1 %B to i32          ; <i32> [#uses=1]
242  %D = icmp slt i32 %c, -1                ; <i1> [#uses=1]
243  ;; false
244  ret i1 %D
245}
246
247define i32 @test21(i32 %X) {
248; CHECK-LABEL: @test21(
249; CHECK-NEXT:    [[C21:%.*]] = and i32 %X, 255
250; CHECK-NEXT:    ret i32 [[C21]]
251;
252  %c1 = trunc i32 %X to i8                ; <i8> [#uses=1]
253  ;; sext -> zext -> and -> nop
254  %c2 = sext i8 %c1 to i32                ; <i32> [#uses=1]
255  %RV = and i32 %c2, 255          ; <i32> [#uses=1]
256  ret i32 %RV
257}
258
259define i32 @test22(i32 %X) {
260; CHECK-LABEL: @test22(
261; CHECK-NEXT:    [[SEXT:%.*]] = shl i32 %X, 24
262; CHECK-NEXT:    ret i32 [[SEXT]]
263;
264  %c1 = trunc i32 %X to i8                ; <i8> [#uses=1]
265  ;; sext -> zext -> and -> nop
266  %c2 = sext i8 %c1 to i32                ; <i32> [#uses=1]
267  %RV = shl i32 %c2, 24           ; <i32> [#uses=1]
268  ret i32 %RV
269}
270
271define i32 @test23(i32 %X) {
272        ;; Turn into an AND even though X
273; CHECK-LABEL: @test23(
274; CHECK-NEXT:    [[C2:%.*]] = and i32 %X, 65535
275; CHECK-NEXT:    ret i32 [[C2]]
276;
277  %c1 = trunc i32 %X to i16               ; <i16> [#uses=1]
278  ;; and Z are signed.
279  %c2 = zext i16 %c1 to i32               ; <i32> [#uses=1]
280  ret i32 %c2
281}
282
283define i1 @test24(i1 %C) {
284; CHECK-LABEL: @test24(
285; CHECK-NEXT:    ret i1 true
286;
287  %X = select i1 %C, i32 14, i32 1234             ; <i32> [#uses=1]
288  ;; Fold cast into select
289  %c = icmp ne i32 %X, 0          ; <i1> [#uses=1]
290  ret i1 %c
291}
292
293define i32 @test26(float %F) {
294        ;; no need to cast from float->double.
295; CHECK-LABEL: @test26(
296; CHECK-NEXT:    [[D:%.*]] = fptosi float %F to i32
297; CHECK-NEXT:    ret i32 [[D]]
298;
299  %c = fpext float %F to double           ; <double> [#uses=1]
300  %D = fptosi double %c to i32            ; <i32> [#uses=1]
301  ret i32 %D
302}
303
304define [4 x float]* @test27([9 x [4 x float]]* %A) {
305; CHECK-LABEL: @test27(
306; CHECK-NEXT:    [[C:%.*]] = getelementptr inbounds [9 x [4 x float]], [9 x [4 x float]]* %A, i64 0, i64 0
307; CHECK-NEXT:    ret [4 x float]* [[C]]
308;
309  %c = bitcast [9 x [4 x float]]* %A to [4 x float]*              ; <[4 x float]*> [#uses=1]
310  ret [4 x float]* %c
311}
312
313define float* @test28([4 x float]* %A) {
314; CHECK-LABEL: @test28(
315; CHECK-NEXT:    [[C:%.*]] = getelementptr inbounds [4 x float], [4 x float]* %A, i64 0, i64 0
316; CHECK-NEXT:    ret float* [[C]]
317;
318  %c = bitcast [4 x float]* %A to float*          ; <float*> [#uses=1]
319  ret float* %c
320}
321
322define i32 @test29(i32 %c1, i32 %c2) {
323; CHECK-LABEL: @test29(
324; CHECK-NEXT:    [[TMP2:%.*]] = or i32 %c2, %c1
325; CHECK-NEXT:    [[TMP10:%.*]] = and i32 [[TMP2]], 255
326; CHECK-NEXT:    ret i32 [[TMP10]]
327;
328  %tmp1 = trunc i32 %c1 to i8             ; <i8> [#uses=1]
329  %tmp4.mask = trunc i32 %c2 to i8                ; <i8> [#uses=1]
330  %tmp = or i8 %tmp4.mask, %tmp1          ; <i8> [#uses=1]
331  %tmp10 = zext i8 %tmp to i32            ; <i32> [#uses=1]
332  ret i32 %tmp10
333}
334
335define i32 @test30(i32 %c1) {
336; CHECK-LABEL: @test30(
337; CHECK-NEXT:    [[C3:%.*]] = and i32 %c1, 255
338; CHECK-NEXT:    [[C4:%.*]] = xor i32 [[C3]], 1
339; CHECK-NEXT:    ret i32 [[C4]]
340;
341  %c2 = trunc i32 %c1 to i8               ; <i8> [#uses=1]
342  %c3 = xor i8 %c2, 1             ; <i8> [#uses=1]
343  %c4 = zext i8 %c3 to i32                ; <i32> [#uses=1]
344  ret i32 %c4
345}
346
347define i1 @test31(i64 %A) {
348; CHECK-LABEL: @test31(
349; CHECK-NEXT:    [[C:%.*]] = and i64 %A, 42
350; CHECK-NEXT:    [[D:%.*]] = icmp eq i64 [[C]], 10
351; CHECK-NEXT:    ret i1 [[D]]
352;
353  %B = trunc i64 %A to i32
354  %C = and i32 %B, 42
355  %D = icmp eq i32 %C, 10
356  ret i1 %D
357}
358
359; FIXME: Vectors should fold too...or not?
360; Does this depend on the whether the source/dest types of the trunc are legal in the data layout?
361define <2 x i1> @test31vec(<2 x i64> %A) {
362; CHECK-LABEL: @test31vec(
363; CHECK-NEXT:    [[B:%.*]] = trunc <2 x i64> %A to <2 x i32>
364; CHECK-NEXT:    [[C:%.*]] = and <2 x i32> [[B]], <i32 42, i32 42>
365; CHECK-NEXT:    [[D:%.*]] = icmp eq <2 x i32> [[C]], <i32 10, i32 10>
366; CHECK-NEXT:    ret <2 x i1> [[D]]
367;
368  %B = trunc <2 x i64> %A to <2 x i32>
369  %C = and <2 x i32> %B, <i32 42, i32 42>
370  %D = icmp eq <2 x i32> %C, <i32 10, i32 10>
371  ret <2 x i1> %D
372}
373
374; Verify that the 'and' was narrowed, the zext was eliminated, and the compare was narrowed
375; even for vectors. Earlier folds should ensure that the icmp(and(zext)) pattern never occurs.
376
377define <2 x i1> @test32vec(<2 x i8> %A) {
378; CHECK-LABEL: @test32vec(
379; CHECK-NEXT:    [[TMP1:%.*]] = and <2 x i8> %A, <i8 42, i8 42>
380; CHECK-NEXT:    [[D:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 10, i8 10>
381; CHECK-NEXT:    ret <2 x i1> [[D]]
382;
383  %B = zext <2 x i8> %A to <2 x i16>
384  %C = and <2 x i16> %B, <i16 42, i16 42>
385  %D = icmp eq <2 x i16> %C, <i16 10, i16 10>
386  ret <2 x i1> %D
387}
388
389define i32 @test33(i32 %c1) {
390; CHECK-LABEL: @test33(
391; CHECK-NEXT:    ret i32 %c1
392;
393  %x = bitcast i32 %c1 to float           ; <float> [#uses=1]
394  %y = bitcast float %x to i32            ; <i32> [#uses=1]
395  ret i32 %y
396}
397
398define i16 @test34(i16 %a) {
399; CHECK-LABEL: @test34(
400; CHECK-NEXT:    [[TMP21:%.*]] = lshr i16 %a, 8
401; CHECK-NEXT:    ret i16 [[TMP21]]
402;
403  %c1 = zext i16 %a to i32                ; <i32> [#uses=1]
404  %tmp21 = lshr i32 %c1, 8                ; <i32> [#uses=1]
405  %c2 = trunc i32 %tmp21 to i16           ; <i16> [#uses=1]
406  ret i16 %c2
407}
408
409define i16 @test35(i16 %a) {
410; CHECK-LABEL: @test35(
411; CHECK-NEXT:    [[TMP2:%.*]] = lshr i16 %a, 8
412; CHECK-NEXT:    ret i16 [[TMP2]]
413;
414  %c1 = bitcast i16 %a to i16             ; <i16> [#uses=1]
415  %tmp2 = lshr i16 %c1, 8         ; <i16> [#uses=1]
416  %c2 = bitcast i16 %tmp2 to i16          ; <i16> [#uses=1]
417  ret i16 %c2
418}
419
420; rdar://6480391
421define i1 @test36(i32 %a) {
422; CHECK-LABEL: @test36(
423; CHECK-NEXT:    [[D:%.*]] = icmp sgt i32 %a, -1
424; CHECK-NEXT:    ret i1 [[D]]
425;
426  %b = lshr i32 %a, 31
427  %c = trunc i32 %b to i8
428  %d = icmp eq i8 %c, 0
429  ret i1 %d
430}
431
432define <2 x i1> @test36vec(<2 x i32> %a) {
433; CHECK-LABEL: @test36vec(
434; CHECK-NEXT:    [[D:%.*]] = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
435; CHECK-NEXT:    ret <2 x i1> [[D]]
436;
437  %b = lshr <2 x i32> %a, <i32 31, i32 31>
438  %c = trunc <2 x i32> %b to <2 x i8>
439  %d = icmp eq <2 x i8> %c, zeroinitializer
440  ret <2 x i1> %d
441}
442
443define i1 @test37(i32 %a) {
444; CHECK-LABEL: @test37(
445; CHECK-NEXT:    ret i1 false
446;
447  %b = lshr i32 %a, 31
448  %c = or i32 %b, 512
449  %d = trunc i32 %c to i8
450  %e = icmp eq i8 %d, 11
451  ret i1 %e
452}
453
454define i64 @test38(i32 %a) {
455; CHECK-LABEL: @test38(
456; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i32 %a, -2
457; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i64
458; CHECK-NEXT:    ret i64 [[TMP2]]
459;
460  %1 = icmp eq i32 %a, -2
461  %2 = zext i1 %1 to i8
462  %3 = xor i8 %2, 1
463  %4 = zext i8 %3 to i64
464  ret i64 %4
465}
466
467define i16 @test39(i16 %a) {
468; CHECK-LABEL: @test39(
469; CHECK-NEXT:    [[TMP_UPGRD_32:%.*]] = call i16 @llvm.bswap.i16(i16 %a)
470; CHECK-NEXT:    ret i16 [[TMP_UPGRD_32]]
471;
472  %tmp = zext i16 %a to i32
473  %tmp21 = lshr i32 %tmp, 8
474  %tmp5 = shl i32 %tmp, 8
475  %tmp.upgrd.32 = or i32 %tmp21, %tmp5
476  %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16
477  ret i16 %tmp.upgrd.3
478}
479
480define i16 @test40(i16 %a) {
481; CHECK-LABEL: @test40(
482; CHECK-NEXT:    [[TMP21:%.*]] = lshr i16 %a, 9
483; CHECK-NEXT:    [[TMP5:%.*]] = shl i16 %a, 8
484; CHECK-NEXT:    [[TMP_UPGRD_32:%.*]] = or i16 [[TMP21]], [[TMP5]]
485; CHECK-NEXT:    ret i16 [[TMP_UPGRD_32]]
486;
487  %tmp = zext i16 %a to i32
488  %tmp21 = lshr i32 %tmp, 9
489  %tmp5 = shl i32 %tmp, 8
490  %tmp.upgrd.32 = or i32 %tmp21, %tmp5
491  %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16
492  ret i16 %tmp.upgrd.3
493}
494
495; PR1263
496define i32* @test41(i32* %tmp1) {
497; CHECK-LABEL: @test41(
498; CHECK-NEXT:    ret i32* %tmp1
499;
500  %tmp64 = bitcast i32* %tmp1 to { i32 }*
501  %tmp65 = getelementptr { i32 }, { i32 }* %tmp64, i32 0, i32 0
502  ret i32* %tmp65
503}
504
505define i32 addrspace(1)* @test41_addrspacecast_smaller(i32* %tmp1) {
506; CHECK-LABEL: @test41_addrspacecast_smaller(
507; CHECK-NEXT:    [[TMP65:%.*]] = addrspacecast i32* %tmp1 to i32 addrspace(1)*
508; CHECK-NEXT:    ret i32 addrspace(1)* [[TMP65]]
509;
510  %tmp64 = addrspacecast i32* %tmp1 to { i32 } addrspace(1)*
511  %tmp65 = getelementptr { i32 }, { i32 } addrspace(1)* %tmp64, i32 0, i32 0
512  ret i32 addrspace(1)* %tmp65
513}
514
515define i32* @test41_addrspacecast_larger(i32 addrspace(1)* %tmp1) {
516; CHECK-LABEL: @test41_addrspacecast_larger(
517; CHECK-NEXT:    [[TMP65:%.*]] = addrspacecast i32 addrspace(1)* %tmp1 to i32*
518; CHECK-NEXT:    ret i32* [[TMP65]]
519;
520  %tmp64 = addrspacecast i32 addrspace(1)* %tmp1 to { i32 }*
521  %tmp65 = getelementptr { i32 }, { i32 }* %tmp64, i32 0, i32 0
522  ret i32* %tmp65
523}
524
525define i32 @test42(i32 %X) {
526; CHECK-LABEL: @test42(
527; CHECK-NEXT:    [[Z:%.*]] = and i32 %X, 255
528; CHECK-NEXT:    ret i32 [[Z]]
529;
530  %Y = trunc i32 %X to i8         ; <i8> [#uses=1]
531  %Z = zext i8 %Y to i32          ; <i32> [#uses=1]
532  ret i32 %Z
533}
534
535; rdar://6598839
536define zeroext i64 @test43(i8 zeroext %on_off) nounwind readonly {
537; CHECK-LABEL: @test43(
538; CHECK-NEXT:    [[A:%.*]] = zext i8 %on_off to i64
539; CHECK-NEXT:    [[B:%.*]] = add nsw i64 [[A]], -1
540; CHECK-NEXT:    ret i64 [[B]]
541;
542  %A = zext i8 %on_off to i32
543  %B = add i32 %A, -1
544  %C = sext i32 %B to i64
545  ret i64 %C  ;; Should be (add (zext i8 -> i64), -1)
546}
547
548define i64 @test44(i8 %T) {
549; CHECK-LABEL: @test44(
550; CHECK-NEXT:    [[A:%.*]] = zext i8 %T to i64
551; CHECK-NEXT:    [[B:%.*]] = or i64 [[A]], 1234
552; CHECK-NEXT:    ret i64 [[B]]
553;
554  %A = zext i8 %T to i16
555  %B = or i16 %A, 1234
556  %C = zext i16 %B to i64
557  ret i64 %C
558}
559
560define i64 @test45(i8 %A, i64 %Q) {
561; CHECK-LABEL: @test45(
562; CHECK-NEXT:    [[B:%.*]] = sext i8 %A to i64
563; CHECK-NEXT:    [[C:%.*]] = or i64 [[B]], %Q
564; CHECK-NEXT:    [[E:%.*]] = and i64 [[C]], 4294967295
565; CHECK-NEXT:    ret i64 [[E]]
566;
567  %D = trunc i64 %Q to i32  ;; should be removed
568  %B = sext i8 %A to i32
569  %C = or i32 %B, %D
570  %E = zext i32 %C to i64
571  ret i64 %E
572}
573
574
575define i64 @test46(i64 %A) {
576; CHECK-LABEL: @test46(
577; CHECK-NEXT:    [[C:%.*]] = shl i64 %A, 8
578; CHECK-NEXT:    [[D:%.*]] = and i64 [[C]], 10752
579; CHECK-NEXT:    ret i64 [[D]]
580;
581  %B = trunc i64 %A to i32
582  %C = and i32 %B, 42
583  %D = shl i32 %C, 8
584  %E = zext i32 %D to i64
585  ret i64 %E
586}
587
588define i64 @test47(i8 %A) {
589; CHECK-LABEL: @test47(
590; CHECK-NEXT:    [[B:%.*]] = sext i8 %A to i64
591; CHECK-NEXT:    [[C:%.*]] = and i64 [[B]], 4294967253
592; CHECK-NEXT:    [[E:%.*]] = or i64 [[C]], 42
593; CHECK-NEXT:    ret i64 [[E]]
594;
595  %B = sext i8 %A to i32
596  %C = or i32 %B, 42
597  %E = zext i32 %C to i64
598  ret i64 %E
599}
600
601define i64 @test48(i8 %A1, i8 %a2) {
602; CHECK-LABEL: @test48(
603; CHECK-NEXT:    [[Z2:%.*]] = zext i8 %A1 to i32
604; CHECK-NEXT:    [[C:%.*]] = shl nuw nsw i32 [[Z2]], 8
605; CHECK-NEXT:    [[D:%.*]] = or i32 [[C]], [[Z2]]
606; CHECK-NEXT:    [[E:%.*]] = zext i32 [[D]] to i64
607; CHECK-NEXT:    ret i64 [[E]]
608;
609  %Z1 = zext i8 %a2 to i32
610  %Z2 = zext i8 %A1 to i32
611  %C = shl i32 %Z2, 8
612  %D = or i32 %C, %Z2
613  %E = zext i32 %D to i64
614  ret i64 %E
615}
616
617define i64 @test49(i64 %A) {
618; CHECK-LABEL: @test49(
619; CHECK-NEXT:    [[C:%.*]] = shl i64 %A, 32
620; CHECK-NEXT:    [[SEXT:%.*]] = ashr exact i64 [[C]], 32
621; CHECK-NEXT:    [[D:%.*]] = or i64 [[SEXT]], 1
622; CHECK-NEXT:    ret i64 [[D]]
623;
624  %B = trunc i64 %A to i32
625  %C = or i32 %B, 1
626  %D = sext i32 %C to i64
627  ret i64 %D
628}
629
630define i64 @test50(i64 %A) {
631; CHECK-LABEL: @test50(
632; CHECK-NEXT:    [[A:%.*]] = lshr i64 %A, 2
633; CHECK-NEXT:    [[D:%.*]] = shl i64 [[A]], 32
634; CHECK-NEXT:    [[SEXT:%.*]] = add i64 [[D]], -4294967296
635; CHECK-NEXT:    [[E:%.*]] = ashr exact i64 [[SEXT]], 32
636; CHECK-NEXT:    ret i64 [[E]]
637;
638  %a = lshr i64 %A, 2
639  %B = trunc i64 %a to i32
640  %D = add i32 %B, -1
641  %E = sext i32 %D to i64
642  ret i64 %E
643; lshr+shl will be handled by DAGCombine.
644}
645
646define i64 @test51(i64 %A, i1 %cond) {
647; CHECK-LABEL: @test51(
648; CHECK-NEXT:    [[C:%.*]] = and i64 %A, 4294967294
649; CHECK-NEXT:    [[D:%.*]] = or i64 %A, 1
650; CHECK-NEXT:    [[E:%.*]] = select i1 %cond, i64 [[C]], i64 [[D]]
651; CHECK-NEXT:    [[SEXT:%.*]] = shl i64 [[E]], 32
652; CHECK-NEXT:    [[F:%.*]] = ashr exact i64 [[SEXT]], 32
653; CHECK-NEXT:    ret i64 [[F]]
654;
655  %B = trunc i64 %A to i32
656  %C = and i32 %B, -2
657  %D = or i32 %B, 1
658  %E = select i1 %cond, i32 %C, i32 %D
659  %F = sext i32 %E to i64
660  ret i64 %F
661}
662
663define i32 @test52(i64 %A) {
664; CHECK-LABEL: @test52(
665; CHECK-NEXT:    [[B:%.*]] = trunc i64 %A to i32
666; CHECK-NEXT:    [[C:%.*]] = and i32 [[B]], 7224
667; CHECK-NEXT:    [[D:%.*]] = or i32 [[C]], 32962
668; CHECK-NEXT:    ret i32 [[D]]
669;
670  %B = trunc i64 %A to i16
671  %C = or i16 %B, -32574
672  %D = and i16 %C, -25350
673  %E = zext i16 %D to i32
674  ret i32 %E
675}
676
677define i64 @test53(i32 %A) {
678; CHECK-LABEL: @test53(
679; CHECK-NEXT:    [[TMP1:%.*]] = and i32 %A, 7224
680; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[TMP1]], 32962
681; CHECK-NEXT:    [[D:%.*]] = zext i32 [[TMP2]] to i64
682; CHECK-NEXT:    ret i64 [[D]]
683;
684  %B = trunc i32 %A to i16
685  %C = or i16 %B, -32574
686  %D = and i16 %C, -25350
687  %E = zext i16 %D to i64
688  ret i64 %E
689}
690
691define i32 @test54(i64 %A) {
692; CHECK-LABEL: @test54(
693; CHECK-NEXT:    [[B:%.*]] = trunc i64 %A to i32
694; CHECK-NEXT:    [[C:%.*]] = and i32 [[B]], 7224
695; CHECK-NEXT:    [[D:%.*]] = or i32 [[C]], -32574
696; CHECK-NEXT:    ret i32 [[D]]
697;
698  %B = trunc i64 %A to i16
699  %C = or i16 %B, -32574
700  %D = and i16 %C, -25350
701  %E = sext i16 %D to i32
702  ret i32 %E
703}
704
705define i64 @test55(i32 %A) {
706; CHECK-LABEL: @test55(
707; CHECK-NEXT:    [[TMP1:%.*]] = and i32 %A, 7224
708; CHECK-NEXT:    [[C:%.*]] = zext i32 [[TMP1]] to i64
709; CHECK-NEXT:    [[D:%.*]] = or i64 [[C]], -32574
710; CHECK-NEXT:    ret i64 [[D]]
711;
712  %B = trunc i32 %A to i16
713  %C = or i16 %B, -32574
714  %D = and i16 %C, -25350
715  %E = sext i16 %D to i64
716  ret i64 %E
717}
718
719define i64 @test56(i16 %A) nounwind {
720; CHECK-LABEL: @test56(
721; CHECK-NEXT:    [[TMP353:%.*]] = sext i16 %A to i64
722; CHECK-NEXT:    [[TMP354:%.*]] = lshr i64 [[TMP353]], 5
723; CHECK-NEXT:    [[TMP355:%.*]] = and i64 [[TMP354]], 134217727
724; CHECK-NEXT:    ret i64 [[TMP355]]
725;
726  %tmp353 = sext i16 %A to i32
727  %tmp354 = lshr i32 %tmp353, 5
728  %tmp355 = zext i32 %tmp354 to i64
729  ret i64 %tmp355
730}
731
732define i64 @test57(i64 %A) nounwind {
733; CHECK-LABEL: @test57(
734; CHECK-NEXT:    [[C:%.*]] = lshr i64 %A, 8
735; CHECK-NEXT:    [[E:%.*]] = and i64 [[C]], 16777215
736; CHECK-NEXT:    ret i64 [[E]]
737;
738  %B = trunc i64 %A to i32
739  %C = lshr i32 %B, 8
740  %E = zext i32 %C to i64
741  ret i64 %E
742}
743
744define i64 @test58(i64 %A) nounwind {
745; CHECK-LABEL: @test58(
746; CHECK-NEXT:    [[C:%.*]] = lshr i64 %A, 8
747; CHECK-NEXT:    [[D:%.*]] = and i64 [[C]], 16777087
748; CHECK-NEXT:    [[E:%.*]] = or i64 [[D]], 128
749; CHECK-NEXT:    ret i64 [[E]]
750;
751  %B = trunc i64 %A to i32
752  %C = lshr i32 %B, 8
753  %D = or i32 %C, 128
754  %E = zext i32 %D to i64
755  ret i64 %E
756
757}
758
759define i64 @test59(i8 %A, i8 %B) nounwind {
760; CHECK-LABEL: @test59(
761; CHECK-NEXT:    [[C:%.*]] = zext i8 %A to i64
762; CHECK-NEXT:    [[D:%.*]] = shl nuw nsw i64 [[C]], 4
763; CHECK-NEXT:    [[E:%.*]] = and i64 [[D]], 48
764; CHECK-NEXT:    [[F:%.*]] = zext i8 %B to i64
765; CHECK-NEXT:    [[G:%.*]] = lshr i64 [[F]], 4
766; CHECK-NEXT:    [[H:%.*]] = or i64 [[G]], [[E]]
767; CHECK-NEXT:    ret i64 [[H]]
768;
769  %C = zext i8 %A to i32
770  %D = shl i32 %C, 4
771  %E = and i32 %D, 48
772  %F = zext i8 %B to i32
773  %G = lshr i32 %F, 4
774  %H = or i32 %G, %E
775  %I = zext i32 %H to i64
776  ret i64 %I
777}
778
779define <3 x i32> @test60(<4 x i32> %call4) nounwind {
780; CHECK-LABEL: @test60(
781; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <4 x i32> %call4, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
782; CHECK-NEXT:    ret <3 x i32> [[TMP10]]
783;
784  %tmp11 = bitcast <4 x i32> %call4 to i128
785  %tmp9 = trunc i128 %tmp11 to i96
786  %tmp10 = bitcast i96 %tmp9 to <3 x i32>
787  ret <3 x i32> %tmp10
788
789}
790
791define <4 x i32> @test61(<3 x i32> %call4) nounwind {
792; CHECK-LABEL: @test61(
793; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <3 x i32> %call4, <3 x i32> <i32 0, i32 undef, i32 undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
794; CHECK-NEXT:    ret <4 x i32> [[TMP10]]
795;
796  %tmp11 = bitcast <3 x i32> %call4 to i96
797  %tmp9 = zext i96 %tmp11 to i128
798  %tmp10 = bitcast i128 %tmp9 to <4 x i32>
799  ret <4 x i32> %tmp10
800}
801
802define <4 x i32> @test62(<3 x float> %call4) nounwind {
803; CHECK-LABEL: @test62(
804; CHECK-NEXT:    [[TMP1:%.*]] = bitcast <3 x float> %call4 to <3 x i32>
805; CHECK-NEXT:    [[TMP10:%.*]] = shufflevector <3 x i32> [[TMP1]], <3 x i32> <i32 0, i32 undef, i32 undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
806; CHECK-NEXT:    ret <4 x i32> [[TMP10]]
807;
808  %tmp11 = bitcast <3 x float> %call4 to i96
809  %tmp9 = zext i96 %tmp11 to i128
810  %tmp10 = bitcast i128 %tmp9 to <4 x i32>
811  ret <4 x i32> %tmp10
812}
813
814; PR7311 - Don't create invalid IR on scalar->vector cast.
815define <2 x float> @test63(i64 %tmp8) nounwind {
816; CHECK-LABEL: @test63(
817; CHECK-NEXT:  entry:
818; CHECK-NEXT:    [[A:%.*]] = bitcast i64 %tmp8 to <2 x i32>
819; CHECK-NEXT:    [[VCVT_I:%.*]] = uitofp <2 x i32> [[A]] to <2 x float>
820; CHECK-NEXT:    ret <2 x float> [[VCVT_I]]
821;
822entry:
823  %a = bitcast i64 %tmp8 to <2 x i32>
824  %vcvt.i = uitofp <2 x i32> %a to <2 x float>
825  ret <2 x float> %vcvt.i
826}
827
828define <4 x float> @test64(<4 x float> %c) nounwind {
829; CHECK-LABEL: @test64(
830; CHECK-NEXT:    ret <4 x float> %c
831;
832  %t0 = bitcast <4 x float> %c to <4 x i32>
833  %t1 = bitcast <4 x i32> %t0 to <4 x float>
834  ret <4 x float> %t1
835}
836
837define <4 x float> @test65(<4 x float> %c) nounwind {
838; CHECK-LABEL: @test65(
839; CHECK-NEXT:    ret <4 x float> %c
840;
841  %t0 = bitcast <4 x float> %c to <2 x double>
842  %t1 = bitcast <2 x double> %t0 to <4 x float>
843  ret <4 x float> %t1
844}
845
846define <2 x float> @test66(<2 x float> %c) nounwind {
847; CHECK-LABEL: @test66(
848; CHECK-NEXT:    ret <2 x float> %c
849;
850  %t0 = bitcast <2 x float> %c to double
851  %t1 = bitcast double %t0 to <2 x float>
852  ret <2 x float> %t1
853}
854
855define float @test2c() {
856; CHECK-LABEL: @test2c(
857; CHECK-NEXT:    ret float -1.000000e+00
858;
859  ret float extractelement (<2 x float> bitcast (double bitcast (<2 x float> <float -1.000000e+00, float -1.000000e+00> to double) to <2 x float>), i32 0)
860}
861
862define i64 @test_mmx(<2 x i32> %c) nounwind {
863; CHECK-LABEL: @test_mmx(
864; CHECK-NEXT:    [[C:%.*]] = bitcast <2 x i32> %c to i64
865; CHECK-NEXT:    ret i64 [[C]]
866;
867  %A = bitcast <2 x i32> %c to x86_mmx
868  %B = bitcast x86_mmx %A to <2 x i32>
869  %C = bitcast <2 x i32> %B to i64
870  ret i64 %C
871}
872
873define i64 @test_mmx_const(<2 x i32> %c) nounwind {
874; CHECK-LABEL: @test_mmx_const(
875; CHECK-NEXT:    ret i64 0
876;
877  %A = bitcast <2 x i32> zeroinitializer to x86_mmx
878  %B = bitcast x86_mmx %A to <2 x i32>
879  %C = bitcast <2 x i32> %B to i64
880  ret i64 %C
881}
882
883; PR12514
884define i1 @test67(i1 %a, i32 %b) {
885; CHECK-LABEL: @test67(
886; CHECK-NEXT:    ret i1 false
887;
888  %tmp2 = zext i1 %a to i32
889  %conv6 = xor i32 %tmp2, 1
890  %and = and i32 %b, %conv6
891  %sext = shl nuw nsw i32 %and, 24
892  %neg.i = xor i32 %sext, -16777216
893  %conv.i.i = ashr exact i32 %neg.i, 24
894  %trunc = trunc i32 %conv.i.i to i8
895  %tobool.i = icmp eq i8 %trunc, 0
896  ret i1 %tobool.i
897}
898
899%s = type { i32, i32, i16 }
900
901define %s @test68(%s *%p, i64 %i) {
902; CHECK-LABEL: @test68(
903; CHECK-NEXT:    [[PP1:%.*]] = getelementptr %s, %s* %p, i64 %i
904; CHECK-NEXT:    [[L:%.*]] = load %s, %s* [[PP1]], align 4
905; CHECK-NEXT:    ret %s [[L]]
906;
907  %o = mul i64 %i, 12
908  %q = bitcast %s* %p to i8*
909  %pp = getelementptr inbounds i8, i8* %q, i64 %o
910  %r = bitcast i8* %pp to %s*
911  %l = load %s, %s* %r
912  ret %s %l
913}
914
915; addrspacecasts should be eliminated.
916define %s @test68_addrspacecast(%s* %p, i64 %i) {
917; CHECK-LABEL: @test68_addrspacecast(
918; CHECK-NEXT:    [[PP1:%.*]] = getelementptr %s, %s* %p, i64 %i
919; CHECK-NEXT:    [[L:%.*]] = load %s, %s* [[PP1]], align 4
920; CHECK-NEXT:    ret %s [[L]]
921;
922  %o = mul i64 %i, 12
923  %q = addrspacecast %s* %p to i8 addrspace(2)*
924  %pp = getelementptr inbounds i8, i8 addrspace(2)* %q, i64 %o
925  %r = addrspacecast i8 addrspace(2)* %pp to %s*
926  %l = load %s, %s* %r
927  ret %s %l
928}
929
930define %s @test68_addrspacecast_2(%s* %p, i64 %i) {
931; CHECK-LABEL: @test68_addrspacecast_2(
932; CHECK-NEXT:    [[PP1:%.*]] = getelementptr %s, %s* %p, i64 %i
933; CHECK-NEXT:    [[R:%.*]] = addrspacecast %s* [[PP1]] to %s addrspace(1)*
934; CHECK-NEXT:    [[L:%.*]] = load %s, %s addrspace(1)* [[R]], align 4
935; CHECK-NEXT:    ret %s [[L]]
936;
937  %o = mul i64 %i, 12
938  %q = addrspacecast %s* %p to i8 addrspace(2)*
939  %pp = getelementptr inbounds i8, i8 addrspace(2)* %q, i64 %o
940  %r = addrspacecast i8 addrspace(2)* %pp to %s addrspace(1)*
941  %l = load %s, %s addrspace(1)* %r
942  ret %s %l
943}
944
945define %s @test68_as1(%s addrspace(1)* %p, i32 %i) {
946; CHECK-LABEL: @test68_as1(
947; CHECK-NEXT:    [[PP1:%.*]] = getelementptr %s, %s addrspace(1)* %p, i32 %i
948; CHECK-NEXT:    [[L:%.*]] = load %s, %s addrspace(1)* [[PP1]], align 4
949; CHECK-NEXT:    ret %s [[L]]
950;
951  %o = mul i32 %i, 12
952  %q = bitcast %s addrspace(1)* %p to i8 addrspace(1)*
953  %pp = getelementptr inbounds i8, i8 addrspace(1)* %q, i32 %o
954  %r = bitcast i8 addrspace(1)* %pp to %s addrspace(1)*
955  %l = load %s, %s addrspace(1)* %r
956  ret %s %l
957}
958
959define double @test69(double *%p, i64 %i) {
960; CHECK-LABEL: @test69(
961; CHECK-NEXT:    [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 %i
962; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
963; CHECK-NEXT:    ret double [[L]]
964;
965  %o = shl nsw i64 %i, 3
966  %q = bitcast double* %p to i8*
967  %pp = getelementptr inbounds i8, i8* %q, i64 %o
968  %r = bitcast i8* %pp to double*
969  %l = load double, double* %r
970  ret double %l
971}
972
973define %s @test70(%s *%p, i64 %i) {
974; CHECK-LABEL: @test70(
975; CHECK-NEXT:    [[O:%.*]] = mul nsw i64 %i, 3
976; CHECK-NEXT:    [[PP1:%.*]] = getelementptr inbounds %s, %s* %p, i64 [[O]]
977; CHECK-NEXT:    [[L:%.*]] = load %s, %s* [[PP1]], align 4
978; CHECK-NEXT:    ret %s [[L]]
979;
980  %o = mul nsw i64 %i, 36
981  %q = bitcast %s* %p to i8*
982  %pp = getelementptr inbounds i8, i8* %q, i64 %o
983  %r = bitcast i8* %pp to %s*
984  %l = load %s, %s* %r
985  ret %s %l
986}
987
988define double @test71(double *%p, i64 %i) {
989; CHECK-LABEL: @test71(
990; CHECK-NEXT:    [[O:%.*]] = shl i64 %i, 2
991; CHECK-NEXT:    [[PP1:%.*]] = getelementptr double, double* %p, i64 [[O]]
992; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
993; CHECK-NEXT:    ret double [[L]]
994;
995  %o = shl i64 %i, 5
996  %q = bitcast double* %p to i8*
997  %pp = getelementptr i8, i8* %q, i64 %o
998  %r = bitcast i8* %pp to double*
999  %l = load double, double* %r
1000  ret double %l
1001}
1002
1003define double @test72(double *%p, i32 %i) {
1004; CHECK-LABEL: @test72(
1005; CHECK-NEXT:    [[O:%.*]] = sext i32 %i to i64
1006; CHECK-NEXT:    [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 [[O]]
1007; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
1008; CHECK-NEXT:    ret double [[L]]
1009;
1010  %so = shl nsw i32 %i, 3
1011  %o = sext i32 %so to i64
1012  %q = bitcast double* %p to i8*
1013  %pp = getelementptr inbounds i8, i8* %q, i64 %o
1014  %r = bitcast i8* %pp to double*
1015  %l = load double, double* %r
1016  ret double %l
1017}
1018
1019define double @test73(double *%p, i128 %i) {
1020; CHECK-LABEL: @test73(
1021; CHECK-NEXT:    [[O:%.*]] = trunc i128 %i to i64
1022; CHECK-NEXT:    [[PP1:%.*]] = getelementptr double, double* %p, i64 [[O]]
1023; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
1024; CHECK-NEXT:    ret double [[L]]
1025;
1026  %lo = shl nsw i128 %i, 3
1027  %o = trunc i128 %lo to i64
1028  %q = bitcast double* %p to i8*
1029  %pp = getelementptr inbounds i8, i8* %q, i64 %o
1030  %r = bitcast i8* %pp to double*
1031  %l = load double, double* %r
1032  ret double %l
1033}
1034
1035define double @test74(double *%p, i64 %i) {
1036; CHECK-LABEL: @test74(
1037; CHECK-NEXT:    [[PP1:%.*]] = getelementptr inbounds double, double* %p, i64 %i
1038; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
1039; CHECK-NEXT:    ret double [[L]]
1040;
1041  %q = bitcast double* %p to i64*
1042  %pp = getelementptr inbounds i64, i64* %q, i64 %i
1043  %r = bitcast i64* %pp to double*
1044  %l = load double, double* %r
1045  ret double %l
1046}
1047
1048define i32* @test75(i32* %p, i32 %x) {
1049; CHECK-LABEL: @test75(
1050; CHECK-NEXT:    [[Y:%.*]] = shl i32 %x, 3
1051; CHECK-NEXT:    [[Z:%.*]] = sext i32 [[Y]] to i64
1052; CHECK-NEXT:    [[Q:%.*]] = bitcast i32* %p to i8*
1053; CHECK-NEXT:    [[R:%.*]] = getelementptr i8, i8* [[Q]], i64 [[Z]]
1054; CHECK-NEXT:    [[S:%.*]] = bitcast i8* [[R]] to i32*
1055; CHECK-NEXT:    ret i32* [[S]]
1056;
1057  %y = shl i32 %x, 3
1058  %z = sext i32 %y to i64
1059  %q = bitcast i32* %p to i8*
1060  %r = getelementptr i8, i8* %q, i64 %z
1061  %s = bitcast i8* %r to i32*
1062  ret i32* %s
1063}
1064
1065define %s @test76(%s *%p, i64 %i, i64 %j) {
1066; CHECK-LABEL: @test76(
1067; CHECK-NEXT:    [[O2:%.*]] = mul i64 %i, %j
1068; CHECK-NEXT:    [[PP1:%.*]] = getelementptr %s, %s* %p, i64 [[O2]]
1069; CHECK-NEXT:    [[L:%.*]] = load %s, %s* [[PP1]], align 4
1070; CHECK-NEXT:    ret %s [[L]]
1071;
1072  %o = mul i64 %i, 12
1073  %o2 = mul nsw i64 %o, %j
1074  %q = bitcast %s* %p to i8*
1075  %pp = getelementptr inbounds i8, i8* %q, i64 %o2
1076  %r = bitcast i8* %pp to %s*
1077  %l = load %s, %s* %r
1078  ret %s %l
1079}
1080
1081define %s @test77(%s *%p, i64 %i, i64 %j) {
1082; CHECK-LABEL: @test77(
1083; CHECK-NEXT:    [[O:%.*]] = mul nsw i64 %i, 3
1084; CHECK-NEXT:    [[O2:%.*]] = mul nsw i64 [[O]], %j
1085; CHECK-NEXT:    [[PP1:%.*]] = getelementptr inbounds %s, %s* %p, i64 [[O2]]
1086; CHECK-NEXT:    [[L:%.*]] = load %s, %s* [[PP1]], align 4
1087; CHECK-NEXT:    ret %s [[L]]
1088;
1089  %o = mul nsw i64 %i, 36
1090  %o2 = mul nsw i64 %o, %j
1091  %q = bitcast %s* %p to i8*
1092  %pp = getelementptr inbounds i8, i8* %q, i64 %o2
1093  %r = bitcast i8* %pp to %s*
1094  %l = load %s, %s* %r
1095  ret %s %l
1096}
1097
1098define %s @test78(%s *%p, i64 %i, i64 %j, i32 %k, i32 %l, i128 %m, i128 %n) {
1099; CHECK-LABEL: @test78(
1100; CHECK-NEXT:    [[A:%.*]] = mul nsw i32 %k, 3
1101; CHECK-NEXT:    [[B:%.*]] = mul nsw i32 [[A]], %l
1102; CHECK-NEXT:    [[C:%.*]] = sext i32 [[B]] to i128
1103; CHECK-NEXT:    [[D:%.*]] = mul nsw i128 [[C]], %m
1104; CHECK-NEXT:    [[E:%.*]] = mul i128 [[D]], %n
1105; CHECK-NEXT:    [[F:%.*]] = trunc i128 [[E]] to i64
1106; CHECK-NEXT:    [[G:%.*]] = mul i64 [[F]], %i
1107; CHECK-NEXT:    [[H:%.*]] = mul i64 [[G]], %j
1108; CHECK-NEXT:    [[PP1:%.*]] = getelementptr %s, %s* %p, i64 [[H]]
1109; CHECK-NEXT:    [[LOAD:%.*]] = load %s, %s* [[PP1]], align 4
1110; CHECK-NEXT:    ret %s [[LOAD]]
1111;
1112  %a = mul nsw i32 %k, 36
1113  %b = mul nsw i32 %a, %l
1114  %c = sext i32 %b to i128
1115  %d = mul nsw i128 %c, %m
1116  %e = mul i128 %d, %n
1117  %f = trunc i128 %e to i64
1118  %g = mul nsw i64 %f, %i
1119  %h = mul nsw i64 %g, %j
1120  %q = bitcast %s* %p to i8*
1121  %pp = getelementptr inbounds i8, i8* %q, i64 %h
1122  %r = bitcast i8* %pp to %s*
1123  %load = load %s, %s* %r
1124  ret %s %load
1125}
1126
1127define %s @test79(%s *%p, i64 %i, i32 %j) {
1128; CHECK-LABEL: @test79(
1129; CHECK-NEXT:    [[A:%.*]] = mul nsw i64 %i, 36
1130; CHECK-NEXT:    [[B:%.*]] = trunc i64 [[A]] to i32
1131; CHECK-NEXT:    [[C:%.*]] = mul i32 [[B]], %j
1132; CHECK-NEXT:    [[Q:%.*]] = bitcast %s* %p to i8*
1133; CHECK-NEXT:    [[TMP1:%.*]] = sext i32 [[C]] to i64
1134; CHECK-NEXT:    [[PP:%.*]] = getelementptr inbounds i8, i8* [[Q]], i64 [[TMP1]]
1135; CHECK-NEXT:    [[R:%.*]] = bitcast i8* [[PP]] to %s*
1136; CHECK-NEXT:    [[L:%.*]] = load %s, %s* [[R]], align 4
1137; CHECK-NEXT:    ret %s [[L]]
1138;
1139  %a = mul nsw i64 %i, 36
1140  %b = trunc i64 %a to i32
1141  %c = mul i32 %b, %j
1142  %q = bitcast %s* %p to i8*
1143  %pp = getelementptr inbounds i8, i8* %q, i32 %c
1144  %r = bitcast i8* %pp to %s*
1145  %l = load %s, %s* %r
1146  ret %s %l
1147}
1148
1149define double @test80([100 x double]* %p, i32 %i) {
1150; CHECK-LABEL: @test80(
1151; CHECK-NEXT:    [[TMP1:%.*]] = sext i32 %i to i64
1152; CHECK-NEXT:    [[PP1:%.*]] = getelementptr [100 x double], [100 x double]* %p, i64 0, i64 [[TMP1]]
1153; CHECK-NEXT:    [[L:%.*]] = load double, double* [[PP1]], align 8
1154; CHECK-NEXT:    ret double [[L]]
1155;
1156  %tmp = shl nsw i32 %i, 3
1157  %q = bitcast [100 x double]* %p to i8*
1158  %pp = getelementptr i8, i8* %q, i32 %tmp
1159  %r = bitcast i8* %pp to double*
1160  %l = load double, double* %r
1161  ret double %l
1162}
1163
1164define double @test80_addrspacecast([100 x double] addrspace(1)* %p, i32 %i) {
1165; CHECK-LABEL: @test80_addrspacecast(
1166; CHECK-NEXT:    [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* %p, i32 0, i32 %i
1167; CHECK-NEXT:    [[L:%.*]] = load double, double addrspace(1)* [[PP1]], align 8
1168; CHECK-NEXT:    ret double [[L]]
1169;
1170  %tmp = shl nsw i32 %i, 3
1171  %q = addrspacecast [100 x double] addrspace(1)* %p to i8 addrspace(2)*
1172  %pp = getelementptr i8, i8 addrspace(2)* %q, i32 %tmp
1173  %r = addrspacecast i8 addrspace(2)* %pp to double addrspace(1)*
1174  %l = load double, double addrspace(1)* %r
1175  ret double %l
1176}
1177
1178define double @test80_addrspacecast_2([100 x double] addrspace(1)* %p, i32 %i) {
1179; CHECK-LABEL: @test80_addrspacecast_2(
1180; CHECK-NEXT:    [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* %p, i32 0, i32 %i
1181; CHECK-NEXT:    [[R:%.*]] = addrspacecast double addrspace(1)* [[PP1]] to double addrspace(3)*
1182; CHECK-NEXT:    [[L:%.*]] = load double, double addrspace(3)* [[R]], align 8
1183; CHECK-NEXT:    ret double [[L]]
1184;
1185  %tmp = shl nsw i32 %i, 3
1186  %q = addrspacecast [100 x double] addrspace(1)* %p to i8 addrspace(2)*
1187  %pp = getelementptr i8, i8 addrspace(2)* %q, i32 %tmp
1188  %r = addrspacecast i8 addrspace(2)* %pp to double addrspace(3)*
1189  %l = load double, double addrspace(3)* %r
1190  ret double %l
1191}
1192
1193define double @test80_as1([100 x double] addrspace(1)* %p, i16 %i) {
1194; CHECK-LABEL: @test80_as1(
1195; CHECK-NEXT:    [[TMP1:%.*]] = sext i16 %i to i32
1196; CHECK-NEXT:    [[PP1:%.*]] = getelementptr [100 x double], [100 x double] addrspace(1)* %p, i32 0, i32 [[TMP1]]
1197; CHECK-NEXT:    [[L:%.*]] = load double, double addrspace(1)* [[PP1]], align 8
1198; CHECK-NEXT:    ret double [[L]]
1199;
1200  %tmp = shl nsw i16 %i, 3
1201  %q = bitcast [100 x double] addrspace(1)* %p to i8 addrspace(1)*
1202  %pp = getelementptr i8, i8 addrspace(1)* %q, i16 %tmp
1203  %r = bitcast i8 addrspace(1)* %pp to double addrspace(1)*
1204  %l = load double, double addrspace(1)* %r
1205  ret double %l
1206}
1207
1208define double @test81(double *%p, float %f) {
1209; CHECK-LABEL: @test81(
1210; CHECK-NEXT:    [[I:%.*]] = fptosi float %f to i64
1211; CHECK-NEXT:    [[Q:%.*]] = bitcast double* %p to i8*
1212; CHECK-NEXT:    [[PP:%.*]] = getelementptr i8, i8* [[Q]], i64 [[I]]
1213; CHECK-NEXT:    [[R:%.*]] = bitcast i8* [[PP]] to double*
1214; CHECK-NEXT:    [[L:%.*]] = load double, double* [[R]], align 8
1215; CHECK-NEXT:    ret double [[L]]
1216;
1217  %i = fptosi float %f to i64
1218  %q = bitcast double* %p to i8*
1219  %pp = getelementptr i8, i8* %q, i64 %i
1220  %r = bitcast i8* %pp to double*
1221  %l = load double, double* %r
1222  ret double %l
1223}
1224
1225define i64 @test82(i64 %A) nounwind {
1226; CHECK-LABEL: @test82(
1227; CHECK-NEXT:    [[TMP1:%.*]] = shl i64 %A, 1
1228; CHECK-NEXT:    [[E:%.*]] = and i64 [[TMP1]], 4294966784
1229; CHECK-NEXT:    ret i64 [[E]]
1230;
1231  %B = trunc i64 %A to i32
1232  %C = lshr i32 %B, 8
1233  %D = shl i32 %C, 9
1234  %E = zext i32 %D to i64
1235  ret i64 %E
1236}
1237
1238; PR15959
1239define i64 @test83(i16 %a, i64 %k) {
1240; CHECK-LABEL: @test83(
1241; CHECK-NEXT:    [[CONV:%.*]] = sext i16 %a to i32
1242; CHECK-NEXT:    [[SUB:%.*]] = add i64 %k, 4294967295
1243; CHECK-NEXT:    [[SH_PROM:%.*]] = trunc i64 [[SUB]] to i32
1244; CHECK-NEXT:    [[SHL:%.*]] = shl i32 [[CONV]], [[SH_PROM]]
1245; CHECK-NEXT:    [[SH_PROM1:%.*]] = zext i32 [[SHL]] to i64
1246; CHECK-NEXT:    ret i64 [[SH_PROM1]]
1247;
1248  %conv = sext i16 %a to i32
1249  %sub = add nsw i64 %k, -1
1250  %sh_prom = trunc i64 %sub to i32
1251  %shl = shl i32 %conv, %sh_prom
1252  %sh_prom1 = zext i32 %shl to i64
1253  ret i64 %sh_prom1
1254}
1255
1256define i8 @test84(i32 %a) {
1257; CHECK-LABEL: @test84(
1258; CHECK-NEXT:    [[ADD:%.*]] = add i32 %a, 2130706432
1259; CHECK-NEXT:    [[SHR:%.*]] = lshr exact i32 [[ADD]], 23
1260; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[SHR]] to i8
1261; CHECK-NEXT:    ret i8 [[TRUNC]]
1262;
1263  %add = add nsw i32 %a, -16777216
1264  %shr = lshr exact i32 %add, 23
1265  %trunc = trunc i32 %shr to i8
1266  ret i8 %trunc
1267}
1268
1269define i8 @test85(i32 %a) {
1270; CHECK-LABEL: @test85(
1271; CHECK-NEXT:    [[ADD:%.*]] = add i32 %a, 2130706432
1272; CHECK-NEXT:    [[SHR:%.*]] = lshr exact i32 [[ADD]], 23
1273; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[SHR]] to i8
1274; CHECK-NEXT:    ret i8 [[TRUNC]]
1275;
1276  %add = add nuw i32 %a, -16777216
1277  %shr = lshr exact i32 %add, 23
1278  %trunc = trunc i32 %shr to i8
1279  ret i8 %trunc
1280}
1281
1282define i16 @test86(i16 %v) {
1283; CHECK-LABEL: @test86(
1284; CHECK-NEXT:    [[S1:%.*]] = ashr i16 %v, 4
1285; CHECK-NEXT:    ret i16 [[S1]]
1286;
1287  %a = sext i16 %v to i32
1288  %s = ashr i32 %a, 4
1289  %t = trunc i32 %s to i16
1290  ret i16 %t
1291}
1292
1293define i16 @test87(i16 %v) {
1294; CHECK-LABEL: @test87(
1295; CHECK-NEXT:    [[A1:%.*]] = ashr i16 %v, 12
1296; CHECK-NEXT:    ret i16 [[A1]]
1297;
1298  %c = sext i16 %v to i32
1299  %m = mul nsw i32 %c, 16
1300  %a = ashr i32 %m, 16
1301  %t = trunc i32 %a to i16
1302  ret i16 %t
1303}
1304
1305; Do not optimize to ashr i16 (shift by 18)
1306define i16 @test88(i16 %v) {
1307; CHECK-LABEL: @test88(
1308; CHECK-NEXT:    [[A:%.*]] = sext i16 %v to i32
1309; CHECK-NEXT:    [[S:%.*]] = ashr i32 [[A]], 18
1310; CHECK-NEXT:    [[T:%.*]] = trunc i32 [[S]] to i16
1311; CHECK-NEXT:    ret i16 [[T]]
1312;
1313  %a = sext i16 %v to i32
1314  %s = ashr i32 %a, 18
1315  %t = trunc i32 %s to i16
1316  ret i16 %t
1317}
1318
1319; Overflow on a float to int or int to float conversion is undefined (PR21130).
1320
1321define i8 @overflow_fptosi() {
1322; CHECK-LABEL: @overflow_fptosi(
1323; CHECK-NEXT:    ret i8 undef
1324;
1325  %i = fptosi double 1.56e+02 to i8
1326  ret i8 %i
1327}
1328
1329define i8 @overflow_fptoui() {
1330; CHECK-LABEL: @overflow_fptoui(
1331; CHECK-NEXT:    ret i8 undef
1332;
1333  %i = fptoui double 2.56e+02 to i8
1334  ret i8 %i
1335}
1336
1337; The maximum float is approximately 2 ** 128 which is 3.4E38.
1338; The constant below is 4E38. Use a 130 bit integer to hold that
1339; number; 129-bits for the value + 1 bit for the sign.
1340define float @overflow_uitofp() {
1341; CHECK-LABEL: @overflow_uitofp(
1342; CHECK-NEXT:    ret float undef
1343;
1344  %i = uitofp i130 400000000000000000000000000000000000000 to float
1345  ret float %i
1346}
1347
1348define float @overflow_sitofp() {
1349; CHECK-LABEL: @overflow_sitofp(
1350; CHECK-NEXT:    ret float undef
1351;
1352  %i = sitofp i130 400000000000000000000000000000000000000 to float
1353  ret float %i
1354}
1355
1356define i32 @PR21388(i32* %v) {
1357; CHECK-LABEL: @PR21388(
1358; CHECK-NEXT:    [[ICMP:%.*]] = icmp slt i32* %v, null
1359; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[ICMP]] to i32
1360; CHECK-NEXT:    ret i32 [[SEXT]]
1361;
1362  %icmp = icmp slt i32* %v, null
1363  %sext = sext i1 %icmp to i32
1364  ret i32 %sext
1365}
1366
1367define float @sitofp_zext(i16 %a) {
1368; CHECK-LABEL: @sitofp_zext(
1369; CHECK-NEXT:    [[SITOFP:%.*]] = uitofp i16 %a to float
1370; CHECK-NEXT:    ret float [[SITOFP]]
1371;
1372  %zext = zext i16 %a to i32
1373  %sitofp = sitofp i32 %zext to float
1374  ret float %sitofp
1375}
1376
1377define i1 @PR23309(i32 %A, i32 %B) {
1378; CHECK-LABEL: @PR23309(
1379; CHECK-NEXT:    [[SUB:%.*]] = sub i32 %A, %B
1380; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[SUB]], 1
1381; CHECK-NEXT:    [[TRUNC:%.*]] = icmp ne i32 [[TMP1]], 0
1382; CHECK-NEXT:    ret i1 [[TRUNC]]
1383;
1384  %add = add i32 %A, -4
1385  %sub = sub nsw i32 %add, %B
1386  %trunc = trunc i32 %sub to i1
1387  ret i1 %trunc
1388}
1389
1390define i1 @PR23309v2(i32 %A, i32 %B) {
1391; CHECK-LABEL: @PR23309v2(
1392; CHECK-NEXT:    [[SUB:%.*]] = add i32 %A, %B
1393; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[SUB]], 1
1394; CHECK-NEXT:    [[TRUNC:%.*]] = icmp ne i32 [[TMP1]], 0
1395; CHECK-NEXT:    ret i1 [[TRUNC]]
1396;
1397  %add = add i32 %A, -4
1398  %sub = add nuw i32 %add, %B
1399  %trunc = trunc i32 %sub to i1
1400  ret i1 %trunc
1401}
1402
1403define i16 @PR24763(i8 %V) {
1404; CHECK-LABEL: @PR24763(
1405; CHECK-NEXT:    [[L:%.*]] = ashr i8 %V, 1
1406; CHECK-NEXT:    [[T:%.*]] = sext i8 [[L]] to i16
1407; CHECK-NEXT:    ret i16 [[T]]
1408;
1409  %conv = sext i8 %V to i32
1410  %l = lshr i32 %conv, 1
1411  %t = trunc i32 %l to i16
1412  ret i16 %t
1413}
1414
1415define i64 @PR28745() {
1416; CHECK-LABEL: @PR28745(
1417; CHECK-NEXT:    ret i64 1
1418
1419  %b = zext i32 extractvalue ({ i32 } select (i1 icmp eq (i16 extractelement (<2 x i16> bitcast (<1 x i32> <i32 1> to <2 x i16>), i32 0), i16 0), { i32 } { i32 1 }, { i32 } zeroinitializer), 0) to i64
1420  ret i64 %b
1421}
1422
1423define i32 @test89() {
1424; CHECK-LABEL: @test89(
1425; CHECK-NEXT:    ret i32 393216
1426  ret i32 bitcast (<2 x i16> <i16 6, i16 undef> to i32)
1427}
1428
1429define <2 x i32> @test90() {
1430; CHECK-LABEL: @test90(
1431; CHECK: ret <2 x i32> <i32 0, i32 15360>
1432  %tmp6 = bitcast <4 x half> <half undef, half undef, half undef, half 0xH3C00> to <2 x i32>
1433  ret <2 x i32> %tmp6
1434}
1435